纳米电子／纳米光电子技术

主要介绍纳米技术领域里纳米电子学／纳米光电子学的基本概念、纳米电子学的分类、纳米电子器件、纳米光电子器件、纳米电子学和纳米光电子学的发展模式以及纳米高技术群。     

纳米电子/纳米光电子技术

主要介绍纳米技术领域里纳米电子学/纳米光电子学的基本概念、纳米电子学的分类、纳米电子器件、纳米光电子器件、纳米电子学和纳米光电子学的发展模式以及纳米高技术群。     

面向21世纪的纳米电子/纳米光电子技术

引言 信息社会对集成电路的集成度要求越来越高,促使人们不断探索能够突破器件尺寸极限的途径。纳米电子学和纳米光电子学在此背景下应运而生。 纳米电子学 1.纳米电子学的基本概念     

纳米局域的飞秒光谱学和纳米光刻术

纳米电子学和光电子学方面的纳米物理和技术的进展与进入更小空间和时间尺度范围有关。为此需要纳米结构全新的制造方法和无损检验法。纳米物理的一个重要课题是发展能够用高的空间、时间和光谱分辨率来研究单个纳米结构、团族和分子的超快过程。因此我们讨论激光脉冲作用于扫描探针显微镜的探针 -衬底系统上的几个问题及与此有关的在纳米光学和纳米技术中的可能应用。首先讨论扫描探针显微镜的金属探针 -衬底系统中的局域等离子体振荡及其激光激发辅助问题 (参阅文献 [1,2 ]及其引用文献 )。如果针端至衬底的距离 d颇小于针的曲率半径 R,…     

动态

美科学家设计出纳米电线制造方法 美国一联合研究小组称，他们在利用石墨烯制造纳米电路领域获得突破：设计出了简便、快速的纳米电线制造方法，能够调谐石墨烯的电学特征，使氧化石墨烯从绝缘物质变成导电物质。这被认定为石墨烯电子学领域的一项重要发现。     

技术动态

美科学家设计出纳米电线制造方法美国一联合研究小组称,他们在利用石墨烯制造纳米电路领域获得突破:设计出了简便、快速的纳米电线制造方法,能够调谐石墨烯的电学特征,使氧化石墨烯从绝缘物质变成导电物质。这被认定为石墨烯电子学领域的一项重要发现。     

混合模式与深亚微米设计面临的新挑战

基于硅的VLSI设计和制造技术在取得极大进展的同时面临纳米新材料新工艺的挑战,世界各大公司相继开发成功纳米晶体管和纳米器件制造工艺.可以说,模拟电路的设计和制造在电子学领域起着举足轻重的作用,它是大系统前端和后端信号处理和转换的关键部件.     

纳米电子学

纳米电子学是纳米技术的重要科学基础,纳米电子学将成为21世纪信息时代的科学核心,将使未来社会产生重大变革。本文介绍了纳米电子学的基本概念、纳米电子学的产生、纳米电子学的研究内容、纳米器件的基本结构及工作机理、纳米结构的微加工技术、纳米结构的检测与表征、纳米电子学的应用及发展对策。     

纳米技术在微电子领域中的应用

纳米电子学是纳米技术的重要组成部分，其主要思想是基于纳米粒子的量子效应来设计并制备纳米量子器件，它包括纳米有序(无序)阵列体系、纳米微粒与微孔固体组装体系、纳米超结构组装体系。纳米电子学的最终目标是将集成电路进一步减小，研制出由单原子或单分子构成的在室温能使用的各种器件。     

面向21世纪的纳米电子学

评论了纳米电子学的沿革路程,介绍了纳米电子学的研究内容,并预测了它的发展趋势。进而指出,纳米电子学的崛起与发展将会对21世纪的量子计算机、量子通信以及量子信息处理等产生革命性的影响。     

纳米科学技术的新进展

纳米科学技术在20世纪最后10年诞生并得到迅速发展。讨论和论述了新兴的纳米科学技术的进展，展望了包括量子功能器件、薄膜传感器、纳米材料、生物技术和原子工程等的应用前景，同时给出了某些实验结果。     

微电子技术向纳电子技术的进化

本文先扼要回顾电子技术的进展历程,从晶体管至微电子集成电路,并引伸至光电子器件,近来又有倾向从微米尺度缩小至纳米尺度,即从微电子技术向纳电子技术进化。文中估测大规模集成电路发展遇到的极限,又说明光电子器件激光管和开关管及集成的现状和趋向,以及超级计算机硅和砷化镓集成芯片的现状和推测。最后,简单叙述微加工技术现状和纳加工技术的开端,包括薄膜形成、版图制备、刻蚀工艺和测试仪器等技术,从而看出纳电子技术有可能开始起步。     

纳米材料的电学、光学和光电性能及应用前景

简要介绍了纳米材料的电学性能以及单电子器件的基本原理和应用；纳米材料的光学性能和光电性能，高的光吸收系数和光致荧光现象可使其应用于敏感元件，由于其光电特性具有超快响应速度，可望在超快光电子器件中得到应用。     

Bilateral Testing of Nano-scale Fault-Tolerant Circuits

As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. Because fault-tolerant hardwares help to mask the effects caused by increased levels of defects, testing the functionality of the chip together with the embedded fault-tolerance becomes a tremendous challenge. In this paper, a new bilateral testing framework for nano circuits is proposed, where multiple stuck-at faults across different modules in a triple module redundancy (TMR) architecture are considered. In addition, a new test generator is presented for the bilateral testing that takes into account the enormous number of bilateral stuck-at faults possible with new types of guidance in the search, and it can generate a set of vectors that can test the TMR-based nano circuit as a single entity. Experimental results reported for ISCAS’85 and ITC99 circuits demonstrate that the bilateral testing can help to capture many more defects which the single stuck-at fault misses.     

“Clinging‐Microdroplet” Patterning Upon High‐Adhesion,Pillar‐Structured Silicon Substrates

The rapidly increasing research interest in nanodevices, including nanoelectronics, nano‐optoelectronics, and sensing, requires the development of surface‐patterning techniques to obtain large‐scale arrays of nanounits (mostly nanocrystals and/or nanoparticles) on a silicon substrate. Herein, we demonstrate a “clinging‐microdroplet” method to fabricate patterning crystal arrays based on the employment of high‐adhesion, superhydrophobic, pillar‐structured silicon substrates. Different from the previous hydrophilic/hydrophobic patterned self‐assembly monolayer technique, this method provides a novel strategy to fabricate patterning crystal arrays upon pillar‐structured silicon substrates of homogenous superhydrophobicity and high adhesion, which greatly simplifies the modification process of the supporting substrates. Ordered crystal arrays with a tunable size and distribution density were successfully generated, and individual crystals grew on the top of each micropillar. Besides soluble inorganic materials, protein microspheres and suspending Ag‐nanoparticle or polystyrene‐microsphere aggregations could also be patterned in regular arrays, showing the wide adaptation of such an adhesive patterning technique. This novel and low‐cost technique for patterning crystal arrays upon silicon substrates could yield breakthroughs in areas ranging from nanodevices to nanoelectronics.     

Assembly of nanodevices with carbon nanotubes through nanorobotic manipulations

Properties and potential applications of carbon nanotubes are summarized by emphasizing the aspects of nanoelectronics and nanoelectromechanical systems (NEMS). The main technologies for the assembly of nanodevices through nanomanipulations with scanning probe microscopes and nanorobotic manipulators are overviewed, focusing on that of nanotubes. Key techniques for nanoassembly include the preparation of nano building blocks and property characterization of them, the positioning of the building blocks with nanometer-scale resolution, and the connection of them. Nanorobotic manipulations, which are characterized by multiple degrees of freedom (DOFs) with both position and orientation control, independently actuated multiprobes, and a real-time observation system, are one of the most promising technologies for assembling complex nanodevices in three-dimensional space. With a nano laboratory, a prototype nanomanufacturing system based on a 16-DOF nanorobotic manipulation system, the assembly of nanodevices with multiwalled carbon nanotubes are presented. Nanotube-based building blocks are prepared by directly picking up, in situ property characterization, destructive fabrication, and shape modifications. Kinds of nanotube junctions, the fundamental elements for both nanoelectronics and NEMS, are constructed by positioning the building blocks together under the real-time observation with a field-emission scanning electron microscope, connecting them with naturally existing van der Waals forces, electron-beam-induced deposition, or mechanochemical bonding.     

日本纳米科技相关专利分析

通过分析1993～2000年日本纳米科技相关专利的数目、专利的领域以及企业申请专利的情况,了解日本纳米科技及其纳米产业,可供我国从事纳米科技研究时参考。     

日本纳米科技专利公开势态与分析

分析了日本纳米科技专利的数量与领域的分布情况,介绍了日本产业界发展纳米科技的现状,为我国纳米科技研究工作者提供借鉴。     

Highly Uniform Trilayer Molybdenum Disulfide for Wafer‐Scale Device Fabrication

Molybdenum disulfide (MoS₂) is a layered semiconducting material with a tunable bandgap that is promising for the next generation nanoelectronics as a substitute for graphene or silicon. Despite recent progress, the synthesis of high‐quality and highly uniform MoS₂ on a large scale is still a challenge. In this work, a temperature‐dependent synthesis study of large‐area MoS₂ by direct sulfurization of evaporated Mo thin films on SiO₂ is presented. A variety of physical characterization techniques is employed to investigate the structural quality of the material. The film quality is shown to be similar to geological MoS₂, if synthesized at sufficiently high temperatures (1050 °C). In addition, a highly uniform growth of trilayer MoS₂ with an unprecedented uniformity of ±0.07 nm over a large area (> 10 cm²) is achieved. These films are used to fabricate field‐effect transistors following a straightforward wafer‐scale UV lithography process. The intrinsic field‐effect mobility is estimated to be about cm² V^–1 s^–1 and compared to previous studies. These results represent a significant step towards application of MoS₂ in nanoelectronics and sensing.