共查询到19条相似文献,搜索用时 78 毫秒
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A novel analytical model of pinch-off voltage for CMOS image pixels with a pinned photodiode structure is proposed. The derived model takes account of the gradient doping distributions in the N buried layer due to the impurity compensation formed by manufacturing processes; the impurity distribution characteristics of two boundary PN junctions located in the region for particular spectrum response of a pinned photodiode are quantitative analyzed. By solving Poisson's equation in vertical barrier regions, the relationships between the pinch-off voltage and the corresponding process parameters such as peak doping concentration, N type width and doping concentration gradient of the N buried layer are established. Test results have shown that the derived model features the variations of the pinch-off voltage versus the process implant conditions more accurately than the traditional model. The research conclusions in this paper provide theoretical evidence for evaluating the pinch-off voltage design. 相似文献
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随着多媒体、数字电视,可视通信等领域的热点增加,CMOS图像传感器应用前景更加广阔,在实现小像素尺寸方面,CMOS图像传感器取得了快速的进步,已有3.3μm×3.3μm像素尺寸的报道。采用0.25μm CMOS工艺技术,将生产出高性能的CMOS图像传感器,高性能CMOS摄像机有希望短期内大量出现,彩色CMOS摄像机在 相似文献
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比较了CMOS图像传感器与CCD图像传感器的优缺点,分析了CMOS图像传感器的结构、研制现状、应用及市场前景。提出了随着CMOS图像传感器技术的发展,CMOS图像传感器可以代替CCD图像传感器,并对其发展趋势作了预见。 相似文献
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CMOS图像传感器 总被引:3,自引:0,他引:3
<正> 图像传感器是传感技术中最主要的一个分支,是PC机多媒体大世界今后不可缺少的外设,也是保安监控产业中最核心的器件。在知识经济和信息社会已经到来的今天,它在我们的社会生活和个人生活中会有数不胜数的应用。 CMOS图像传感器和CCD摄像器件在20年前几乎是同时起步的。由于CCD器件有光照灵敏度高、噪音低、像素小等优点,所以在过去15年里它一直主宰着图像传感器市场。与之相反,CMOS图像传感器过去存在着像素大、信噪比小、分辨率低这些缺点,一直无法和CCD技术抗衡。但是随着大规模集成电路技术的不断发展,过去CMOS图像传感器制造工艺中不易解决的技术难关现已都能找到相应解决的途径,从而大大改善了CMOS图像传感器的图像质量。目前CMOS单元面积的像素数已可与CCD单元面积的像素数相 相似文献
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为改善小尺寸背照式CMOS图像传感器像素单元满阱容量不足缺点,本文基于提高光电二极管电容的角度,提出了一种通过改变光电二极管结构来提升满阱容量的新方法。该结构优化由两步实现。第一步,通过在传统光电二极管N型区域下额外注入高能量、低剂量N型掺杂,形成一个浓度渐变,深度扩展的新光电二极管N型区。这种光电二极管的满阱容量将因侧壁结电容的扩展而显著提高;第二步,为了帮助扩展的阱容量实现全耗尽,一个由两步不同能量的P型杂质形成的P型插入区被嵌入到深度得以扩展的光电二极管N型区域内。这个纵向插入的P型插入区保证了该光电二极管结构可以在复位完成后实现电子的全耗尽。仿真结果显示,像素单元满阱容量可以由初始的1289e- 提升到6390e-,且该阱容量扩展技术不会以恶化图像拖尾为代价。除此之外,量子效率在全波段下均得以提升,尤其在520nm处提升6.3%。这项改进不仅可以用于背照式像素结构,而且可以被用于任何PD型正面照射式像素结构中。 相似文献
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CMOS图像传感器研究 总被引:4,自引:0,他引:4
结合CMOS图像传感感器的研究背景,从5个方面对CMOS图像传感器与CCD图像传感器的优缺点进行了比较,重点分析了CMOS图像传感器的结构、工作原理以及影响传感器性能的主要因素,并给出了相应的解决方法。最后,预测CMOS图像传感器的技术发展趋势。 相似文献
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数码相机和可拍照式便携设备的兴起,使得CMOS图像传感器这个名词进入大众的视野,而这种产品也成为了半导体产品中增长最快的一种。其实,在几年前,CMOS传感器还没有今天这样耀眼的地位,那时的它还只能仰望强大的对手CCD传感器。但是,仅仅是几年的功夫,它就可以同CCD分庭抗礼了。 相似文献
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Design of an APS CMOS Image Sensor for Low Light Level Applications Using Standard CMOS Technology 总被引:2,自引:0,他引:2
J. Goy B. Courtois J. M. Karam F. Pressecq 《Analog Integrated Circuits and Signal Processing》2001,29(1-2):95-104
CMOS image sensors (or APS: Active pixel sensors) are now the technology of choice for most imaging applications, such as digital video cameras. Whereas their sensitivity doesn't reach the one of the best actual CCD's (whose fill factor is about 100%), they are now commonly used because of their multiple functionalities (windowing, on-chip signal processing) and their easy serial fabrication. In this paper, we present a study of different pixel photodiodes and architectures, in order to increase their sensitivity and reduce their spatial and temporal noise. These chips will be used in satellite star trackers, and should be hardened to radiation.Two different architectures are investigated. The first one uses the photodiode capacitance for signal integration, as it is usually done in literature [1–3]. This capacitance should be as lower as possible, to increase conversion factor (the gain of the pixel) and reduce reset noise, and that's why different standard CMOS photodiodes have been studied and quantified.The second architecture uses a low-value poly1/poly2 capacitor inside each pixel for signal integration, thus resulting in increasing the gain but degrading the fill factor. 相似文献
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CMOS图像传感器的三种新技术 总被引:4,自引:0,他引:4
介绍了CMOS传感器的发展现状及应用新技术,阐述了C3D技术、Aramis技术和超小型CMOS传感器技术对CMOS传感器性能的改善,并预示了CMOS传感器的未来发展趋势。 相似文献
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A new active digital pixel circuit for CMOS image sensor is designed consisting of four components: a photo-transducer, a preamplifier, a sample & hold (S & H) circuit and an A/D converter with an inverter. It is optimized by simulation and adjustment based on 2 μm standard CMOS process. Each circuit of the components is designed with specific parameters. The simulation results of the whole pixel circuits show that the circuit has such advantages as low distortion, low power consumption, and improvement of the output performances by using an inverter. 相似文献