基区Ge组分分布对SiGe HBT热学特性的影响

建立了SiGe HBT热电反馈模型,对基区Ge组分矩形分布、三角形分布和梯形分布的SiGe HBT的热特性进行研究。结果表明,在Ge总量一定的前提下,Ge组分为三角形和梯形分布结构的SiGe HBT峰值温度较低、温差较小,温度分布的均匀性优于Ge组分矩形分布结构的SiGeHBT,具有更好的热特性。对不同Ge组分分布下器件增益与温度的依赖关系进行研究,发现当基区Ge组分为三角形和梯形分布时,随着温度升高,器件增益始终低于Ge组分矩形分布的器件,且增益变化较小,提高了器件的热学和电学稳定性,扩大了器件的应用范围。     

全温区超薄基区SiGe HBT参数特性研究

分析了不同温度下超薄基区 Si Ge HBT中载流子温度及扩散系数随基区结构参数的变化 ,并给出了实验比较     

SBFL结构SiGe HBT器件的击穿特性研究

对高频SiGe HBT器件的击穿特性进行了研究。借助TCAD仿真工具,对超结结构引入器件集电区后的击穿特性进行了分析,提出了一种采用分裂浮空埋层结构(SBFL)的SiGe异质结器件。这种结构改善了器件的内部电场分布,电场分布由原来的单三角形分布变成双三角形分布。仿真结果表明,该器件结构的击穿电压由原有的3.6 V提高到5.4 V,提高了50%。     

Ge组分对SiGe HBT直流特性的影响

制作了基区Ge组分分别为0.20和0.23的多发射极指数双台面结构SiGe异质结双极型晶体管(HBT)。实验结果表明,基区Ge组分的微小增加,引起了较大的基极复合电流,但减小了总的基极电流,提高了发射结的注入效率,电流增益成倍地提高。Ge组分从0.20增加到0.23,HBT的最大直流电流增益从60增加到158,提高了约2.6倍。     

一种结构新颖的锗硅NPN HBT器件特性研究

对一种结构新颖的锗硅NPN HBT器件的特性进行了研究。通过分析器件发射极窗口宽度W和长度L对器件直流和交流特性的影响,对器件在结构上和制作工艺上进行了优化,得到性能与业界可比的三种不同耐压水平的器件(高速器件、标准器件和高压器件),并且成功地被应用于光通讯和射频功放等商业产品中。     

SiGe HBT技术进展

首先论述了 Si Ge技术的优势、发展历史和应用领域 ,并介绍了 Si Ge工艺和器件的进展 ,最后详细描述了 Si Ge IC的进展     

Microwave and noise performance of SiGe BiCMOS HBT under cryogenic temperatures

In this letter, the microwave and noise performance of SiGe heterojunction bipolar transistors (HBTs) has been characterized when cooling down the temperature. It was found that SiGe HBTs (fabricated in the framework of BiCMOS process) exhibit a maximum oscillation frequency f/sub max/ of about 292 GHz at 78 K, which represents an increase of about 30% with the value measured at room temperature. The noise performance has also been characterized at cryogenic temperatures, using an original de-embedding approach. Then, using the Hawkin's noise model in conjunction with an accurate small signal equivalent extraction, the four noise parameters have been estimated. The noise figure with a 50 /spl Omega/ source impedance was measured to be equal to 1.5 dB at 40 GHz at 78 K, which is one of the lowest value reported for BiCMOS SiGe HBT in the millimeter-wave range.     

pnp型SiGe HBT的制备研究

从pnp型Si/SiGe HBT的能带结构出发，阐述pnp型Si/SiGe HBT的较大原理，采用MBE方法生长Si/Si1-xGex合金材料，并对Si/Si1-xGex合金材料的物理特性和异质结特性进行表征，在重庆固体电子研究所工艺线上，研制出了pnp型Si/SiGe HBT器件，器件参数为：Vcb0=9V,Vcc0=2.5V,Veb0=5V,β＝10。     

SiGe HBT传输电流模型研究

基于SiGe异质结双极晶体管(HBT)大信号等效电路模型,建立了SiGe HBT传输电流模型.重点考虑发射结能带的不连续对载流子输运产生的影响,通过求解流过发射结界面的载流子密度,建立了SiGe HBT传输电流模型.该模型物理意义清晰,拓扑结构简单.对该模型进行了模拟,模拟结果与文献报道的结果符合得较好.将该模型嵌入PSPICE软件中,实现了对SiGe HBT器件与电路的模拟分析,并对器件进行了直流分析,分析结果与文献报道的结果符合得较好.     

SiGe HBT传输电流模型研究

基于SiGe异质结双极晶体管(HBT)大信号等效电路模型,建立了SiGe HBT传输电流模型.重点考虑发射结能带的不连续对载流子输运产生的影响,通过求解流过发射结界面的载流子密度,建立了SiGe HBT传输电流模型.该模型物理意义清晰,拓扑结构简单.对该模型进行了模拟,模拟结果与文献报道的结果符合得较好.将该模型嵌入PSPICE软件中,实现了对SiGe HBT器件与电路的模拟分析,并对器件进行了直流分析,分析结果与文献报道的结果符合得较好.     

SiGe HBT60Coγ射线辐照效应及退火特性

研究了国产SiGe异质结双极晶体管(HBT)60Co γ射线100Gy(Si)～10kGy(Si)总剂量辐照后的辐照效应及辐照后的退火特性.测试了辐照及退火后的直流电参数.实验结果显示,辐照后基极电流(Ib)明显增大,而集电极电流(Ic)基本不变,表明Ib的增加是电流增益退化的主要原因.退火结果表现为电流增益(β=Ic/Ib)继续衰降,表明SiGe HBT具有"后损伤"效应.对其机理进行了探讨,结果表明其主要原因是室温退火中界面态继续增长引起的.     

SiGe HBT的线性度研究（英文）

应用一种改进的片上线性度测试方法来对上海华虹宏力半导体制造有限公司生产的SiGe HBT进行测试,得到了一个较好的测试结果,同时对其线性度随偏置情况的变化以及引起变化的机制进行了分析和讨论。通过分析表明:在集电极偏置电流较小时,SiGe HBT的线性度主要受器件跨导和雪崩倍增效应的限制;在中等大小的集电极偏置电流下,SiGe HBT的非线性主要由集电结势垒电容所产生;在大的集电极偏置电流下,大电流效应是产生非线性的主要原因。     

SiGe HBT器件的研究设计

研制了一种平面集成多晶发射极SiGe HBT,并对SiGe HBT设计进行了研究分析。给出了双极晶体管的结构和关键工艺参数,并进行了流片测试,结果表明,在室温下电流增益β大于1500,最大达到3000,Vceo为5V,厄利电压VA大于10V,βVA乘积达到15000以上。这种器件对多晶Si发射极As杂质浓度分布十分敏感。     

An Exploration of Substrate Coupling at K-Band Between a SiGe HBT Power Amplifier and a SiGe HBT Voltage-Controlled-Oscillator

This work presents a case study of circuit-to-circuit substrate coupling between a 24-GHz power amplifier (PA) and a 23-GHz voltage-controlled oscillator (VCO) implemented in a commercially-available SiGe heterojunction bipolar transistor BiCMOS technology. The concurrent operation of these two circuits on the same silicon die results in -33dB of coupling between the PA's output and the VCO's output. Different testing configurations are considered to verify the dominant path of the coupling. These results highlight the potential challenges for silicon-based monolithic systems targeting microwave operational frequencies     

Evaluation of SiGe:C HBT intrinsic reliability using conventional and step stress methodologies

The reliability of SiGe:C HBT devices fabricated using the Freescale’s 0.35-μm RF-BICMOS process was evaluated using both conventional and step stress methodologies. This device technology was assessed to determine its capability for various power amplifier applications (e.g., WLAN, Bluetooth, and cellular phone), which are more demanding than conventional circuit designs. The step stress method was developed to allow a rapid evaluation of product reliability, as well as, a quick method to monitor product reliability. For all tests the collector current I_C and collector voltage V_C were kept constant throughout the test, and the current gain β (I_C/I_B) was continuously monitored. The nominal bias condition was V_C = 3.5-V and J_C = 50-kA/cm² (or 0.5-mA/μm²). The “failure criterion” for all reliability evaluations was −10% degradation in β from the initial value at the start of each stress test or interval. The median time to failure (MTTF) at a junction temperature (T_JCN) of 150 °C for the conventional stress test was 1.86E6-h, and the thermal activation energy was 1.33-eV. In contrast for the temperature step stress tests the combined results gave an MTTF at T_JCN = 150 °C of 5.2E6-h and a thermal activation energy of 1.44-eV. Considering the differences in the two test methods, these results are quite close to one another. The intrinsic reliability of this device at the nominal bias condition and T_JCN = 150 °C is more than adequate for a 5-year system life.     

Investigation of a SiGe HBT during ESD stress in a 0.18-/spl mu/m SiGe BiCMOS process

This paper investigates the electrostatic discharge (ESD) characteristics of the silicon-germanium heterojunction bipolar transistor (SiGe HBT) in a 0.18-/spl mu/m SiGe BiCMOS process. According to this letter, the open base configuration in the SiGe HBT has lower trigger voltage and higher ESD robustness than a common base configuration. As compared to the gate-grounded NMOS and PMOS in a bulk CMOS process, the SiGe HBT has a higher ESD efficiency from the layout area point of view. Additionally, any trigger biases used to improve the ESD robustness of the SiGe HBT are observed as invalid, and even they can work successfully in bulk CMOS process.     

Improvement on Frequency Performance of SOI SiGe HBT

Based on the advantages of SOI technology, the frequency performance of SiGe HBT with SOI structure has been simulated. Compared with bulk SiGe HBT, the results show that the buried oxide layer （BOX） can reduce collector-base capacitance CCB with the maximum value 89.3%, substrate-base capacitance CSB with 94. 6%, and the maximum oscillation frequency is improved by 2.7. The SOl structure improves the frequency performance of SiGe HBT, which is adaptable to high-speed and high power applications.     

SiGe HBT超宽带低噪声放大器设计

采用ADS软件设计并仿真了一种应用于UWB标准的低噪声放大器。该低噪声放大器基于JAZZ 0.35μmSiGe工艺,工作带宽为3.1～10.6GHz。电路的输入极采用共发射极结构,利用反馈电感来进行输入匹配,第二级采用达林顿结构对信号提供合适的增益。使用ADS2006软件进行设计、优化和仿真。仿真结果显示,在3.1～10.6GHz带宽内,放大器的电源电压在3.3V时,噪声系数低于2.5dB,增益大于24dB,功耗为28mV,输出三阶交调为17dBm。     

基区Ge组分分布对SiGe pnp HBT的影响

采用SiGe异质结结构提高pnp晶体管的性能,重点研究了Ge组分在基区的三角形分布对晶体管电流增益β和特征频率fτ的影响。三角形分布,又分为起点为零和不为零两种情况。同时为了消除集电结处SiGe异质结的价带势垒对空穴输运的影响,Ge组分向集电区延伸进一步提高了晶体管的性能。得到最大电流增益β可达150和特征频率fτ可达15GHz的pnp SiGe HBT,可以广泛地应用到通信、微波和射频领域。     

Applications and processing of SiGe and SiGe:C for high-speed HBT devices

The continued growth of high-speed-digital data transmission and wireless communications technology has motivated increased integration levels for ICs serving these markets. Further, the increasing use of portable wireless communications tools requiring long battery lifetimes necessitates low power consumption by the semiconductor devices within these tools. The SiGe and SiGe:C materials systems provide solutions to both of these market needs in that they are fully monolithically integratible with Si BiCMOS technology. Also, the use of SiGe or SiGe:C HBTs for the high-frequency bipolar elements in the BiCMOS circuits results in greatly decreased power consumption when compared to Si BJT devices.Either a DFT (graded Ge content across the base) or a true HBT (constant Ge content across the base) bipolar transistor can be fabricated using SiGe or SiGe:C. Historically, the graded profile has been favored in the industry since the average Ge content in the pseudomorphic base is less than that of a true HBT and, therefore, the DFT is tolerant of higher thermal budget processing after deposition of the base. The inclusion of small amounts of C (e.g. <0.5%) in SiGe is effective in suppressing the diffusion of B such that very narrow extremely heavily doped base regions can be built. Thus the f_T and f_max of a SiGe:C HBT/DFT are capable of being much higher than that of a SiGe HBT/DFT.The growth of the base region can be accomplished by either nonselective mixed deposition or by selective epitaxy. The nonselective process has the advantage of reduced complexity, higher deposition rate and, therefore, higher productivity than the selective epitaxy process. The selective epi process, however, requires fewer changes to an existing fabrication sequence in order to accommodate SiGe or SiGe:C HBT/DFT devices into the BiCMOS circuit.