Evaluation of turn-on performance of P-i-N rectifiers and IGBT'sunder zero voltage switching

This paper compares the turn-on performance of two vertical power bipolar devices, viz, P-I-N diode and IGBT, under Zero Voltage Switching (ZVS). Although both the devices are “conductivity modulated” during turn-on, the IGBT carrier dynamics distinctly differ from that of a P-i-N rectifier. It is shown that, for identical drift region parameters, the conductivity modulation in the IGBT is significantly lower compared to that in a P-i-N rectifier mainly because of carrier flow constraints in the IGBT and the inherent bipolar transistor-like carrier distribution in the IGBT. 2-D mixed device and circuit simulations were performed to understand the behavior of the two devices during turn-on under ZVS. The mixed device and circuit simulator was also used to study the effects of variations in the rate of change of current (di/dt) through the device during turn-on, carrier lifetime and temperature on the turn-on behavior of the two bipolar devices under ZVS     

ESD circuit model based protection network optimisation for extended-voltage NMOS drivers

New snapback circuit models for drain extended MOS (DEMOS) and complementary DEMOS-SCR structures used for ESD protection in high-voltage tolerant applications have been developed. The models were experimentally validated in a standard 0.35 μm CMOS process which requires 20 V compatible structures. It is shown that the new ESD models provide accurate representation of the structure breakdown, turn-on behaviour into conductivity modulation mode and dV/dt triggering effect, both in static and ESD transient conditions. A major application of this model is for initial ESD optimisation of complex mixed voltage analog circuits.     

Zero-Current Soft-Switching Performance of 1200-V PT Clustered Insulated Gate Bipolar Transistor

Zero-current soft-switching performance of a 1200-V, 20-A punch-through (PT) clustered insulated gate bipolar transistor (CIGBT) is evaluated in this paper. Turn-on over-voltage transients have been witnessed in 2D numerical simulations and experimental results. These have been shown to be influenced by circuit parameters and internal device structure. Conductivity modulation lag within the device is found to be dependant upon dI/dt; however, this alone does not explain the significant over-voltages at turn-on. The device structure is found to influence the magnitude of such voltage peaks. By optimization of the structure, over-voltages can be minimized, resulting in a significant improvement in losses compared to an IGBT. The current bump associated with zero-current turn-off has been analyzed under various dV/dt values and is influenced by circuit capacitance, switching timings, and carrier lifetime. Internal dynamics of the CIGBT have been analyzed to give an insight into the performance under zero-current switching (ZCS). ZCS tests at 600 V, 20 A have shown that the CIGBT performs well with respect to a commercial IGBT of the same rating. Dynamic saturation voltage of the CIGBT has been shown to be 15% lower at room temperatures to that of an equivalent IGBT.     

p-n-p-n charge dynamics

A simple unified charge model applicable to both unsaturated and saturated p-n-p-n dynamic behavior is analyzed. Expressions are obtained for three important dynamic conditions: di/dt prior to saturation, voltage drop during turn-on, and reverse current during recovery. Comparison with measurement shows that interdigitated gate p-n-p-n devices match one-dimensional turn-on theory and closely approximate the behavior of p-i-n rectifiers under similar pulsed conditiom. The major analytical simplifications of the one-dimensional theory are examined in the Appendixes. The limitations imposed by these simplifications can be avoided by use of numerical integration techniques.     

金属氧化物半导体控制晶闸管的di/dt优化

金属氧化物半导体控制晶闸管(MCT)相比于绝缘栅双极型晶体管(IGBT)具有高电流密度、低导通压降和快速开启等优势,在高压脉冲功率领域具有广阔的应用前景.作为脉冲功率开关,MCT开启过程对输出脉冲信号质量有很大影响.采用理论分析并结合仿真优化重点研究了MCT开启瞬态特性.通过对MCT开启过程进行详细地理论分析推导,给出了MCT开启过程中阳极电流和上升时间的表达式.结合Sentaurus TCAD仿真优化,将MCT开启过程中电流上升速率(di/dt)由40 kA/s提升至80 kA/s,极大地改善了器件开启瞬态特性.最后,总结提出了提高器件开启瞬间di/dt的设计途径.     

Correlation between forward voltage drop and local carrier lifetimefor a large area segmented thyristor

The forward voltage drop for individual segments of a large area thyristor has been correlated to the local, bulk carrier lifetime by lifetime mapping of the the wafer after final device processing. The lifetime mapping was performed under high injection conditions using an all-optical technique where carriers were generated by a short YAG laser pulse and the subsequent carrier decay was monitored by an IR laser beam using free carrier absorption. The lateral resolution was ~100 μm. The lifetime map revealed heavily contaminated areas where the lifetime was reduced by more than an order of magnitude. The forward voltage drop for corresponding thyristor segments was high and, for some areas, no stable turn-on could be achieved. Deep Level Transient Spectroscopy characterization of contaminated areas confirmed the lifetime measurement results and suggest that the contamination is most likely due to metal impurities introduced in the first extended-time/high-temperature drive-in of the p-base. Device simulations showed qualitative agreement between the bulk carrier lifetime and the corresponding voltage drop     

具有P型浮空层的新型载流子存储槽栅双极晶体管

文中提出了一种具有P型浮空层的载流子存储槽栅双极晶体管。引入P型浮空层,可以增加载流子存储层厚度和掺杂浓度,有效地提高了近发射极的电导调制作用,降低积累层电阻和扩展电阻,使得导通损耗大大减小。同时,P型浮空层改善了传统结构中的电场分布,提高器件击穿电压。仿真结果表明：新结构较传统槽栅IGBT和载流子存储槽栅双极晶体管正向导通压降分别降低约20%和17%,正向阻断电压提高了100V以上,且没有使得短路安全工作区（SCSOA）减小。     

A passive lossless snubber cell for nonisolated PWM DC/DCconverters

A passive lossless snubber cell is proposed to improve the turn-on and turnoff transients of the MOSFETs in nonisolated pulsewidth modulated (PWM) DC/DC converters. Switching losses and EMI noise are reduced by restricting di/dt of the reverse-recovery current and dv/dt of the drain-source voltage. The MOSFET operates at zero-voltage-switching (ZVS) turnoff and near zero-current-switching (ZCS) turn-on. The freewheeling diode is also commutated under ZVS. As an example, operation principles, theoretical analysis, relevant equations, and experimental results of a boost converter equipped with the proposed snubber cell are presented in detail. Efficiency of 96% has also been measured in the experimental results reported for a 1 kW 100 kHz prototype in the laboratory, Six basic nonisolated PWM DC/DC converters (buck, boost, buck-boost, Cuk, Sepic, and Zeta) equipped with the proposed general snubber cells are also shown in this paper     

Low-loss high-speed switching devices, 2300-V 150-A static induction thyristor

Focussing attention to the performance of high-speed high off-state voltage and large current provided in the buried-gate-type static induction (SI) thyristor, a 2300-V 150-A low-voltage-drop high-speed medium-power SI thyristor was developed. Irrespective of the magnitude of switching current, the SI thyristor has the characteristics of fast turn-on time and less on-gate current compared to that of the GTO thyristor. The characteristics of this SI thyristor obtained as the result of manufacturing this prototype were such that the forward blocking voltage was 2300 V at a gate reverse voltage of -5 V, the reverse blocking voltage was 2350 V, and the forward voltage drop was 1.4 V at an anode current of 150 A and 2.2 V at an anode current of 450 A. The switching characteristics were such that the turn-on time was 1.5 µs when an anode current IAof 150 A becomes ON, turnoff time was 2.5 µs at IA= 100 A and 3.6 µs at IA= 200 A. This SI thyristor is able to break the anode current of 1000 A at a gate current of 95 A. Performance exceeding 1100 A/µs was confirmed for the di/dt capability and even for dv/dt, and these normally can be operatable even at 100 times higher current compared with maximum average current.     

Voltage shifts in the forward V-I characteristics of p-n-p-n power switches

The forward V-I characteristics of p-n-p-n power switches usually consist of one or more voltage shifts having negative resistance characteristics at small forward current. This phenomenon is attributed to local turning on of the switch due to shorted emitter and/or shorting dots used to enhance the dv/dt capability of the device, since lateral current flow plays a significant role in determining the V-I characteristics at small current, It is shown that the threshold current responsible for the voltage shift phenomenon has an empirical temperature dependence of the formI_{T} sim exp [- a(T - T_{0})]over the temperature range 20-125°C. The hysteresis loop associated with each negative resistance region can be explained in terms of the difference in turn-on current and holding current of a localized area in the vicinity of shorted emitter or shorting dots.     

Carrier stored trench-gate bipolar transistor with P-floating layer

A carrier stored trench-gate bipolar transistor(CSTBT)with a p-floating layer(PF-CSTBT)is proposed.Due to the p-floating layer.the thick and highly doped carrier stored layer can be induced,and the conductivity modulation effect will be enhanced near the emitter.The accumulation resistance and the spreading resistance are reduced.The on-state loss will be much lower than in a conventional CSTBT.With the p-floating layer,the distribution of electric fields of the conventional IGBT is reformed,and the breakdown voltage is remarkably improved.The simulation resuits have shown that the forward voltage drop(VCE-on)of the novel structure is reduced by 20%and 17%respectively,compared with the conventional trench IGBT(TIGBT)and CSTBT under the same conditions.Moreover,an increment of more than 100 V of the breakdown voltage is achieved without sacrificing the SCSOA(short circuit safety operation area)compared with the conventional TIGBT.     

Power Converter EMI Analysis Including IGBT Nonlinear Switching Transient Model

It is well known that very high dv/dt and di/dt during the switching instant is the major high-frequency electromagnetic interference (EMI) source. This paper proposes an improved and simplified EMI-modeling method considering the insulated gate bipolar transistor switching-behavior model. The device turn-on and turn-off dynamics are investigated by dividing the nonlinear transition by several stages. The real device switching voltage and current are approximated by piecewise linear lines and expressed using multiple dv/dt and di/dt superposition. The derived EMI spectra suggest that the high-frequency noise is modeled with an acceptable accuracy. The proposed methodology is verified by experimental results using a dc-dc buck converter     

On the Origin of Hysteresis in Perovskite Solar Cells

The origin of hysteresis behavior is probed in perovskite solar cells (PSCs) with simultaneous measurements of cell open circuit voltage (V_oc) and photoluminescence intensity over time following illumination of the cell. It is shown, for the first time, that the transient changes in terminal voltage and luminescent intensity do not follow the relationship that would be predicted by the generalized Plank radiation law. A mechanism is proposed based on the presence of a resistive barrier to majority carrier flow at the interface between the perovskite film and the electron or hole transport layer, in combination with significant interface recombination. This results in a decoupling of the internal quasi‐Fermi level separation and the externally measured voltage. A simple numerical model is used to provide in‐principle validation for the proposed mechanism and it is confirmed that mobile ionic species are a likely candidate for creating the time‐varying majority carrier bottleneck by its reduced conductivity. The findings show that the V_oc of PSCs may be lower than the limit imposed by the cell luminescence efficiency, even under steady‐state conditions.     

The dV/dt capability of MOS-gated thyristors

In this paper, a detailed study of the dV/dt capability of MOS-gated thyristors is performed. It is shown that in addition to the conventional mode of dV/dt-induced turn-on in thyristors, termed the intrinsic mode, there exists another distinct mode of dV/dt-induced turn-on, peculiar to the MOS-gated thyristor structure, which the authors term the extrinsic dV/dt mode. The effective dV/dt capability is determined by both modes and is degraded by the presence of an external gate-cathode resistance and parasitic gate-anode capacitance. The existence of these two modes of dV/dt-induced turn-on is demonstrated experimentally, and the effect of device parameters on the dV/dt capability is studied     

Dynamics of reverse recovery of high-power P-i-N diodes

The reverse recovery of high-power P-i-N diodes is studied under resistive (step recovery) and inductive (ramp recovery) switching conditions. It is shown that, under resistive switching, the reverse recovery characteristics of P-i-N diodes depend significantly on whether it is turned off during the turn-on transients (forward recovery) or whether it is turned off when the diode has reached a steady forward conducting state. It is pointed out that, under inductive switching, the voltage across the diode becomes negative even when the current in the diode is still, ramping down in the reverse direction. It is also shown that the ramp recovery characteristics of P-i-N diodes depend quite significantly on the circuit operating conditions and the reverse recovery characteristics can be different even if the current that the diode turns-off and the rate at which the diode current ramps down are the same. Finally, a novel test circuit is proposed and employed to carry out accurate reverse recovery measurements of high-power P-i-N diodes under resistive switching     

DV/DT related spurious gate turn-on of bidirectional switches in a high-frequency cycloconverter

We identified a failure mode in a two stage dc/ac converter, comprising a high-frequency dc/ac inverter followed by an ac/ac cycloconverter, both operating at the same switching frequency. The failure-mode is a short-circuit condition, which is a combined effect of the reverse recovery of the MOSFET body diode and simultaneous spurious turn-on of the bidirectional switches of the cycloconverter, owing to a significantly high dv/dt (>2/spl times/10/sup 8/V/ns). A high dv/dt causes appreciable current to flow through the gate-to-drain (Miller) capacitance, thereby producing a significant amount of voltage drop across the external gate resistance. Consequently, the gate-to-source voltage of the power MOSFET may exceed the threshold voltage of the device, which turns the device on. We explain the mechanism for the dv/dt-related gate turn-on and present experimental results to validate the explanation. We also demonstrate, how a two-fold increase in the value of external gate resistance of the inverter switches (to reduce the dv/dt applied to the cycloconverter) reduces the periodicity of the short-circuit condition.     

Zero-current and zero-voltage soft-transition commutation cell for PWM inverters

This paper presents a universal auxiliary commutation cell for pulse-width modulated (PWM) inverters termed zero current and zero voltage transition (ZCZVT) commutation cell. It provides zero current and zero voltage commutation, simultaneously, during main power devices turn-on and turn-off, with controlled di/dt and dv/dt. As a result, commutations of the main power devices occur without any losses. This unique characteristic is not achieved by any other soft-switching commutation cell for inverters hitherto presented in the literature, making it a strong candidate for use in low-power (MOSFET), medium-power (IGBT) or high-power applications (GTO, thyristor). Furthermore, reverse recovery losses of main diodes are minimized and auxiliary switches commutate at zero current. To demonstrate the operation of the proposed universal auxiliary commutation cell, a ZCZVT PWM full-bridge inverter is analyzed. To evaluate the operation of the auxiliary circuit in different conditions, prototypes with both IGBTs and MOSFETs for different output powers levels were implemented and their performances compared. Experimental results confirm that there is no overlap between main switch current and voltage, and that waveform ringing is practically eliminated.     

Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors

As the characteristics of insulated gate transistors [like metal-oxide-semiconductor field-effect transistors and insulated gate bipolar transistors (IGBTs)] have been constantly improving, their utilization in power converters operating at higher and higher frequencies has become more common. However, this, in turn, leads to fast current and voltage transitions that generate large amounts of electromagnetic interferences over wide frequency ranges. In this paper, a new active gate voltage control (AGVC) method is presented. It allows us to control the values of di/dt at turn-on and dv/dt at turn-off for insulated gate power transistors, by acting directly on the input gate voltage shape. In an elementary switching cell, it enables us to strongly reduce over-current generated by the reverse recovery of the free-wheeling diode at turn-on, and oscillations of the output voltage across the transistor at turn-off. In the following sections, the AGVC in open and closed-loop for IGBT is presented, and its performance is compared with that of a more conventional method, i.e., increasing the gate resistance. Robustness of the AGVC is estimated under variations of dc-voltage supply and transistor switched current.     

Scaling constraints imposed by self-heating in submicron SOIMOSFET's

The presence of a buried oxide layer in silicon causes enhanced self-heating in Silicon-On-Insulator (SOI) n-channel MOSFETs. The self-heating becomes more pronounced as device dimensions are reduced into the submicron regime because of increased electric field density and reduced silicon volume available for heat removal. Two-dimensional numerical simulations are used to show that self-heating manifests itself in the form of degraded drive current due to mobility reduction and premature breakdown. The heat flow equation was consistently solved with the classical semiconductor equations to study the effect of power dissipation on carrier transport. The simulated temperature increases in the channel region are shown to be in close agreement with recently measured data. Numerical simulation results also demonstrated accelerated turn-on of the parasitic bipolar transistor due to self-heating. Simulation results were used to identify scaling constraints caused by the parasitic bipolar transistor turn-on effect in SOI CMOS ULSI. For a quarter-micron n-channel SOI MOSFET, results suggest a maximum power supply of 1.8 V. In the deep submicron regime, SOI devices exhibited a negative differential resistance due to increased self-heating with drain bias voltage. Detailed comparison with bulk devices suggested significant reduction in the drain-source avalanche breakdown voltage due to increased carrier injection at the source-body junction     

Controlled turn-on thyristors

In a one or more amplified stage thyristor design it is possible to control the peak current level of all but the final stage with impedance built into the p-base zone. This impedance reduces both the current and the duty cycle of the protected amplifying stage effectively protecting it from undesirable temperature rises during turn-on. A further bonus and perhaps equally important is the fact that the amplifying stage and its current control impedance can be used to reduce and essentially fix the voltage level at which the following stage turns on. This results in a lower voltage, lower stress turn-on of the following stage, and a device essentially protected from di/dt turn-on failure. This paper describes several aspects of controlled turn-on in the context of a 2.6- and 6-kV light triggered thyristor. In particular we discuss selection of the resistor value, the problem of unwanted current control resistor modulation by device current as well as some factors affecting the proper wattage of such resistors. We also discuss the role current control resistors can play in controlling avalanche current from known locations on the device.