共查询到20条相似文献,搜索用时 46 毫秒
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在溅射淀积HfO2栅介质之前,采用NO、N2O、O2+CHCCl3(TCE)进行表面预处理。结果表明,预处理能改善界面和近界面特性,减小界面层厚度,尤其是新颖的TCE+少量O2的表面处理工艺,能有效抑制界面层的生长,大大降低界面态密度,减小栅极漏电流。其机理在于TCE分解产生的Cl2和HCl能有效地钝化界面附近Si悬挂键和其它结构缺陷,并能去除离子污染。 相似文献
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CCD多晶硅交叠区域绝缘介质对成品率和器件可靠性具有重要的影响.采用扫描电子显微镜和电学测试系统研究了CCD栅介质工艺对多晶硅层间介质的影响.研究结果表明:栅介质工艺对多晶硅层间介质形貌具有显著的影响.栅介质氮化硅淀积后进行氧化,随着氧化时间延长,靠近栅介质氮化硅区域的多晶硅层间介质层厚度增大.增加氮化硅氧化时间到320 min,多晶硅层间薄弱区氧化层厚度增加到227 nm.在前一次多晶硅氧化后淀积一层15 nm厚氮化硅,能够很好地填充多晶硅层间介质空隙区,不会对CCD工作电压产生不利的影响. 相似文献
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采用干 O2 +CHCCl3(TCE)氧化并进干 /湿 NO退火工艺生长 6H-Si C MOS器件栅介质 ,研究了 Si O2 /Si C界面特性。结果表明 ,NO退火进一步降低了 Si O2 /Si C的界面态密度和边界陷阱密度 ,减小了高场应力下平带电压漂移 ,增强了器件可靠性 ,尤其是湿 NO退火的效果更为明显。 相似文献
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基于流体动力学能量输运模型 ,对沟道杂质浓度不同的深亚微米槽栅和平面 PMOSFET中施主型界面态引起的器件特性的退化进行了研究 .研究结果表明同样浓度的界面态密度在槽栅器件中引起的器件特性的漂移远大于平面器件 ,且电子施主界面态密度对器件特性的影响远大于空穴界面态 .特别是沟道杂质浓度不同 ,界面态引起的器件特性的退化不同 .沟道掺杂浓度提高 ,同样的界面态密度造成的漏极特性漂移增大 . 相似文献
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R. Sauleau D. Thouroude Ph. Coquet J. P. Daniel 《Journal of Infrared, Millimeter and Terahertz Waves》1999,20(2):325-340
Reflection properties of square apertures metal mesh mirrors are studied theoretically with the Finite-Difference Time-Domain (FDTD) method associated to Floquet Boundary Conditions. The reflector is illuminated by a normally incident plane wave and is located at an interface between two semi infinite low loss dielectric materials. Reflectivity and phase of the reflection coefficient are given in the non diffraction region for a wide range of square apertures, and for the four situations corresponding to an interface between free space and fused quartz. 相似文献
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The Impedance of a Wire Grid Parallel to a Dielectric Interface 总被引:1,自引:0,他引:1
《Microwave Theory and Techniques》1957,5(2):99-102
Analysis is given for the problem of reflection of a plane wave at oblique incidence on a wire grid which is parallel to a plane interface between two homogeneous dielectrics. It is assumed that the wire grid is a periodic structure and consists of thin cylindrical wires of homogeneous material. The equivalent circuit is derived where it is shown that the space on either side of the interface can by a transmission line, and the grid itself is represented by a pure shunt element across one of the lines. 相似文献
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Lin C.-T. Fang Y.-K. Yeh W.-K. Lee T.-H. Chen M.-S. Hsu C.-H. Chen L.-W. Cheng L.-W. Ma M. 《Electron Device Letters, IEEE》2006,27(12):963-965
In this letter, based on both experimental investigations and simulation confirmation, it was found that a strained contact etch stop layer over the thin silicon layer of a partially depleted silicon-on-insulator (PD-SOI) will induce high stress on the buried-oxide/silicon interface. Additionally, the interface stress increases with decrease of silicon thickness TSI, thus enhancing the current of the MOSFET, e.g., as TSI shrinks from 90 to 50 nm, current enhancement for PD-SOI n-channel MOS increased from 7% to 12% due to the increase of interface stress. The results are expected to be more significant for devices with thinner TSI such as fully depleted silicon-on-insulator and multigate devices 相似文献
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针对金属硅化物/硅接触存在过渡层,提出了分析这种结构的肖特基接触特性的模型;讨论了过渡层厚度、界面电行及有关参数的影响,分析了不同退火条件下PtSi/Si肖特基二极管的特性。 相似文献
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CCD信号采集系统的USB接口设计 总被引:7,自引:0,他引:7
为解决针对每一个CCD象素的高速采集和实时计算机处理的问题,提出一种利用通用串行总线(USB)技术对CCD信号的每一个象素进行高速采集的方法。本文着重介绍了利用USB技术实现图像采集系统和计算机进行通信的软硬件设计方案。 相似文献
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采用真空蒸发、溅射和化学镀铜的方法分别对研制的PTFE基复合介质进行了金属化处理。试验结果表明:经萘钠溶液处理后的介质,镀铜后铜层致密光亮,且剥离强度明显高于物理方法金属化的剥离强度。 相似文献
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S. Y. Tan 《Journal of Electronic Materials》2010,39(11):2435-2440
The effects of postdeposition annealing (PDA) on the interface between HfO2 high-k dielectric and bulk silicon were studied in detail. The key challenges of successfully adopting the high-k dielectric/Si gate stack into advanced complementary metal–oxide–semiconductor (CMOS) technology are mostly due to interfacial properties. We have proposed a PDA treatment at 600°C for several different durations (5 min to 25 min) in nitrogen or oxygen (95% N2 + 5% O2) ambient with a 5-nm-thick HfO2 film on a silicon substrate. We found that oxidation of the HfO2/Si interface, removal of the deep trap centers, and crystallization of the film take place during the postdeposition annealing (PDA). The optimal PDA conditions for low interface trap density were found to be dependent on the PDA duration. The formation of an amorphous interface layer (IL) at the HfO2/Si interface was observed. The growth was due to oxygen incorporated during thermal annealing that reacts with the Si substrate. The interface traps of the bonding features, defect states, and hysteresis under different PDA conditions were studied using x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD), transmission electron microscopy (TEM), and leakage current density–voltage (J–V) and capacitance–voltage (C–V) techniques. The results showed that the HfO2/Si stack with PDA in oxygen showed better physical and electrical performance than with PDA in nitrogen. Therefore, PDA can improve the interface properties of HfO2/Si and the densification of HfO2 thin films. 相似文献