Efficient Si Nanowire Array Transfer via Bi‐Layer Structure Formation Through Metal‐Assisted Chemical Etching

Nanowires (NWs) have shown great potential for applications in flexible and transparent electronics. The main challenges lie in improving the transfer yield and reducing the cost of NW fabrication. Here, it is shown that a bilayer SiNW structure can spontaneously form during metal‐assisted chemical etching (MaCE). The bilayer structure formation is in turn accompanied by horizontal weak point formation that facilitates efficient nanowire transfer to diverse substrates. A mass‐transport model is developed to explain the bilayer structure and horizontal crack formation effects. Significantly, these results allow repeated SiNW etch/transfer from the same Si wafer, thus potentially greatly reducing the fabrication cost of NW‐based electronics. SiNW array‐based transistors fabricated from two sequential etch/transfer processes using a single wafer are successfully demonstrated on Si and plastic substrates.     

3D Out‐of‐Plane Rotational Etching with Pinned Catalysts in Metal‐Assisted Chemical Etching of Silicon

Pinned structures in conjunction with shaped catalysts are used in metal‐assisted chemical etching (MACE) of silicon to induce out‐of‐plane rotational etching. Sub‐micro‐ and nanostructures are fabricated in silicon, which include scooped‐out channels and curved subsurface horns, along with vertically oriented thin metal structures. Five different etching modes induced by catalyst and pinning geometry are identified: 1) fully pinned–no etching, 2) rotation via twist, 3) rotation via delamination, 4) in‐plane bending, and 5) swinging. The rotation angle is roughly controlled through catalyst geometry. The force and pressure experienced by the catalyst are calculated from the deformation of the catalyst and range between 0.5–3.5 μN and 0.5–3.9 MPa, respectively. This is a new, simple method to fabricate 3D, heterogeneous sub‐micro‐ and nanostructures in silicon with high feature fidelity on the order of tens of nanometers while providing a method to measure the forces responsible for catalyst motion during MACE.     

Direct Imprinting of Porous Silicon via Metal‐Assisted Chemical Etching

Conventional lithographical techniques used for bulk semiconductors produce dramatically poor results when used for micro and mesoporous materials such as porous silicon (PS). In this work, for the first time, a high‐throughput, single‐step, direct imprinting process for PS not involving plastic deformation or high‐temperature processing is reported. Based on the underlying mechanism of metal‐assisted chemical etching (MACE), this process uses a pre‐patterned polymer stamp coated with a noble metal catalyst to etch PS immersed in an HF‐oxidizer mixture. The process not only overcomes the difficulties in patterning PS but it does so with a stamp that may be reused multiple times depending on its chemical and mechanical degradation. The process is shown to be capable of centimeter‐scale parallel 3D patterning with sub‐20 nm resolution. It is found that PS facilitates mass transport of reactants and products, and the overall etch rate is limited by local depletion of reactants. The versatility of this direct imprinting technique is demonstrated by its ability to produce curvilinear and planar 3D features (e.g., paraboloids, parabolic cylinders, sinusoidal waves, and straight sidewall channels). Miniaturized optical elements such as diffraction gratings and microconcentrators are built and characterized highlighting potential use of PS in silicon photonics.     

Decoupling Diameter and Pitch in Silicon Nanowire Arrays Made by Metal‐Assisted Chemical Etching

The fabrication of well‐separated, narrow, and relatively smooth silicon nanowires with good periodicity is demonstrated, using non‐close‐packed arrays of nanospheres with precisely controlled diameters, pitch, and roughness. Controlled reactive ion etching in an inductively coupled plasma reduces the self‐assembled nanospheres to approximately a tenth of their original diameter, while retaining their surface smoothness and periodic placement. A titanium adhesion layer between the silicon substrate and gold film allows much thinner catalyst layers to be continuous, facilitating the film liftoff and formation of the perforated pattern without influencing catalyzed etching of silicon. Using these methods, a periodic array of silicon nanowires with a large pitch and small diameter (e.g., a 490 nm pitch and 55 nm diameter) is created, a combination not typically found in the open literature. This approach extends the types and quality of silicon nanostructures that can be fabricated using the combined nanosphere lithography and metal‐assisted chemical etching techniques.     

Fabrication of Single‐Crystalline Silicon Nanowires by Scratching a Silicon Surface with Catalytic Metal Particles

A novel strategy for preparing large‐area, oriented silicon nanowire (SiNW) arrays on silicon substrates at near room temperature by localized chemical etching is presented. The strategy is based on metal‐induced (either by Ag or Au) excessive local oxidation and dissolution of a silicon substrate in an aqueous fluoride solution. The density and size of the as‐prepared SiNWs depend on the distribution of the patterned metal particles on the silicon surface. High‐density metal particles facilitate the formation of silicon nanowires. Well‐separated, straight nanoholes are dug along the Si block when metal particles are well dispersed with a large space between them. The etching technique is weakly dependent on the orientation and doping type of the silicon wafer. Therefore, SiNWs with desired axial crystallographic orientations and doping characteristics are readily obtained. Detailed scanning electron microscopy observations reveal the formation process of the silicon nanowires, and a reasonable mechanism is proposed on the basis of the electrochemistry of silicon and the experimental results.     

体微加工技术在MEMS中的应用

微机电系统(MEMS)技术的基础是由微电子加工技术发展起来的微结构加工技术，包括表面微加工技术和体微加工技术。其中体微加工技术是微传感器、微执行器制造中最重要的加工技术。该文主要介绍以加工金属、聚合物以及陶瓷为主的LIGA技术，先进硅刻蚀技术(ASE)和石英晶体深槽湿法刻蚀技术。最后给出用LIGA技术和牺牲层技术制作微加速度传感器的例子。     

Cl2/Ar感应耦合等离子体刻蚀Si工艺研究

采用Cl2/Ar感应耦合等离子体（ICP）对单晶硅进行了刻蚀,工艺中用光刻胶作掩膜。研究了气体组分、ICP功率和RF功率等工艺参数对硅刻蚀速率和硅与光刻胶刻蚀选择比的影响,同时还研究了不同工艺条件对侧壁形貌的影响。结果表明,由于物理刻蚀机制和化学刻蚀机制的相对强度受到混合气体中Cl2和Ar比例的影响,硅刻蚀速率随着Ar组分的增加而降低,同时选择比也随之降低。硅刻蚀速率随着ICP功率的增大先增大继而减小,选择比则成上升趋势。硅刻蚀速率和选择比均随RF功率的增大单调增大。在Cl2/Ar混合气体的刻蚀过程中,离子辅助溅射是决定硅刻蚀效果的重要因素。同时,文中还研究分析了刻蚀工艺对于微槽效应和刻蚀侧壁形貌的影响,结果表明,通过提高ICP功率可以有效减小微槽和平滑侧壁。进一步研究了SiO2掩膜下,压强改变对于硅刻蚀形貌的影响,发现通过降低压强,可以明显地抑制杂草的产生。     

The effect of cathode materials on reactive ion etching of silicon and silicon dioxide in a CF4 plasma

Silicon and silicon dioxide have been Reactive Ion Etched in a CF₄ plasma using a diode sputtering configuration to achieve etching. Pressures ranged from 20 to 100 millitorr and power densities to the RF cathode were between 0.1 and 1.0 W/cm². The effect of cathode material on the quality of etched surfaces and on etch rates has been investigated. It has been observed that the etch rate of silicon decreases as the area of silicon exposed to the plasma is increased and that this silicon loading effect is strongly influenced by the material covering the balance of the cathode. For instance, the silicon loading effect is much more pronounced when silicon dioxide rather than aluminum is used to cover the balance of the cathode. This silicon loading effect was investigated further by varying RF power. It was found that loading a silicon dioxide covered cathode with silicon wafers decreases the dependence of silicon etch rate on power. The silicon dioxide etch rate and its dependence on RF power are the same whether silicon, silicon dioxide or aluminum is used to cover the balance of the cathode. Possible explanations for these experimental results will be discussed.     

双重掩蔽层实现石英晶体高深宽比刻蚀

由于石英晶体的刻蚀速率小,要实现石英晶体的高深宽比刻蚀,常用的光刻胶或金属掩膜不能满足工艺要求。提出使用双重掩蔽层的方法实现石英晶体的高深宽比刻蚀,即石英晶体和单晶硅键合,然后在单晶硅表面生长二氧化硅,二氧化硅作为刻蚀单晶硅的掩蔽层,单晶硅作为刻蚀石英晶体的掩蔽层。ICP刻蚀过程使用SF6作为刻蚀气体、C4H8作为钝化气体、He作为冷却气体。控制好气体的流量和配比,选择合适的射频功率,能刻蚀出深度为30μm,宽度为50μm的深槽。该工艺对开发新型石英晶体器件有积极的意义。     

Metal‐Catalyzed Etching of Vertically Aligned Polysilicon and Amorphous Silicon Nanowire Arrays by Etching Direction Confinement

A systematic study of metal‐catalyzed etching of (100), (110), and (111) silicon substrates using gold catalysts with three varying geometrical characteristics: isolated nanoparticles, metal meshes with small hole spacings, and metal meshes with large hole spacings is carried out. It is shown that for both isolated metal catalyst nanoparticles and meshes with small hole spacings, etching proceeds in the crystallographically preferred <100> direction. However, the etching is confined to the single direction normal to the substrate surface when a catalyst meshes with large hole spacings is used. We have also demonstrated that the metal catalyzed etching method when used with metal mesh with large hole spacings can be extended to create arrays of polycrystalline and amorphous vertically aligned silicon nanowire by confining the etching to proceed in the normal direction to the substrate surface. The ability to pattern wires from polycrystalline and amorphous silicon thin films opens the possibility of making silicon nanowire array‐based devices on a much wider range of substrates.     

Scaling the Aspect Ratio of Nanoscale Closely Packed Silicon Vias by MacEtch: Kinetics of Carrier Generation and Mass Transport

Metal‐assisted chemical etching (MacEtch) has shown tremendous success as an anisotropic wet etching method to produce ultrahigh aspect ratio semiconductor nanowire arrays, where a metal mesh pattern serves as the catalyst. However, producing vertical via arrays using MacEtch, which requires a pattern of discrete metal disks as the catalyst, has often been challenging because of the detouring of individual catalyst disks off the vertical path while descending, especially at submicron scales. Here, the realization of ordered, vertical, and high aspect ratio silicon via arrays by MacEtch is reported, with diameters scaled from 900 all the way down to sub‐100 nm. Systematic variation of the diameter and pitch of the metal catalyst pattern and the etching solution composition allows the extraction of a physical model that, for the first time, clearly reveals the roles of the two fundamental kinetic mechanisms in MacEtch, carrier generation and mass transport. Ordered submicron diameter silicon via arrays with record aspect ratio are produced, which can directly impact the through‐silicon‐via technology, high density storage, photonic crystal membrane, and other related applications.     

Pyrex玻璃的湿法刻蚀研究

对Pyrex 7740玻璃的湿法刻蚀工艺进行了研究。实验中采用了几种不同的材料(光刻胶、Cr／Au、TiW／Au)作为刻蚀玻璃的掩膜，通过实验发现TiW／Au掩膜相对目前比较常用的Cr／Au掩膜有很多优点，如减少了玻璃的横向腐蚀，增加了深宽比，刻蚀图形边缘更加平滑等。还研究了腐蚀液成分配比对刻蚀结果的影响，发现刻蚀速率随HF浓度的增加而增加，且在HF浓度一定时，加入少量HNO3可以明显提高刻蚀速率。本文的实验结果对一些MEMS器件特别是微流体器件的制作有一定参考作用。     

氮化硅的ECCP刻蚀特性研究

本文对氮化硅的增强电容耦合等离子刻蚀进行研究,为氮化硅刻蚀工艺的优化提供参考。针对SF_6+O_2气体体系,通过设计实验考察了功率、压强、气体比、氦气等对刻蚀速率和均一性的影响,并对结果进行机理分析和讨论。实验结果表明:功率越大,刻蚀速率越大,与源极射频电力相比,偏置射频电力对刻蚀速率的影响更为显著;压强增大,刻蚀速率增大,但压强增大到一定程度后,刻蚀速率基本不变,刻蚀均匀性随着压强增大而变差;在保证SF_6/O_2总流量保持不变下,O_2的比例增大,刻蚀速率先增大后减小,刻蚀均匀性逐步变好;He的添加可以改善刻蚀均匀性,但He的添加量过多时,会造成刻蚀速率降低。     

Porous Si Nanowires from Cheap Metallurgical Silicon Stabilized by a Surface Oxide Layer for Lithium Ion Batteries

In the quest to develop next generation lithium ion battery anode materials, satisfactory electrochemical performance and low material/fabrication cost are the most desirable features. In this article, porous Si nanowires are synthesized by a cost‐effective metal‐assisted chemical etching method using cheap metallurgical silicon as feedstock. More importantly, a thin oxide layer (≈3 nm) formed on the surface of porous Si nanowires stabilizes the cycling performance of lithium ion batteries. Such an oxide coating is able to constrain the huge volume expansion of the underlying Si, yet it is thin enough to ensure good permeability for both lithium ions and electrons. Therefore, the extraordinary storage capacity of Si can be well retained in prolonged electrochemical cycles. Specifically, Si/SiO_x nanowires deliver a reversible capacity of 1503 mAh g^?1 at the 560th cycle at a current density of 600 mA g^?1, demonstrating an average of only 0.04% drop per cycle compared with its initial capacity. Furthermore, the highly porous structure and thin Si wall facilitate the electrolyte penetration and shorten the solid‐state lithium transportation path, respectively. As a result, stable and satisfactory reversible capacities of 1297, 976, 761, 548, and 282 mAh g^?1 are delivered at current densities of 1200, 2400, 3600, 4800, and 7200 mA g^?1, respectively.     

A preliminary study of SF6 based inductively coupled plasma etching techniques for beta gallium trioxide thin film

Beta phase Gallium trioxide (β-Ga₂O₃) thin film was grown by metal organic chemical vapor deposition technology. Mixture gases of SF₆ and Ar were used for dry etching of β-Ga₂O₃ thin film by inductively coupled plasma (ICP). The effect of SF₆/Ar (etching gas) ratio on etch rate and film etching damage was studied. The etching rate and surface roughness were measured using F20-UN thin film analyzer and atomic force microscopy showing that the etching rate in the range between 30 nm/min and 35 nm/min with an improved surface roughness was obtained when the reactive mixed gas of SF₆/Ar was used. The analysis of X-ray diffraction and transmission spectra further confirmed the non-destructive crystal quality. This work demonstrates that the properly proportioned mixture gases of SF₆/Ar is suitable for the dry etching of β-Ga₂O₃ thin film by ICP and can serve as a guide for future β-Ga₂O₃ device processing.     

Producing Silicon Carbide Micro and Nanostructures by Plasma-Free Metal-Assisted Chemical Etching

Silicon carbide (SiC) is a wide bandgap third-generation semiconductor well suited for harsh environment power electronics, micro and nano electromechanical systems, and emerging quantum technology by serving as hosts for quantum states via defect centers. The chemical inertness of SiC limits viable etching techniques to plasma-based reactive ion etching methods; however, these could have significant undesirable effects for electronic and photonic devices. This paper presents a plasma-free, open-circuit, photo-induced metal-assisted chemical etch for fabricating micro and nanoscale features without the inherent high energy ion-related surface damage. The method presented herein utilizes above bandgap ultraviolet light, patterned noble metal (Pt), and a solution consisting of an oxidant potassium persulfate (K₂S₂O₈) and an acid, hydrofluoric acid, to spatially define the etching morphology. The parameter space is comprehensively explored to demonstrate the controllability and versatility of this technique to produce ordered arrays of micro and nanoscale SiC structures with porous or solid sidewalls, and to elucidate the etching mechanism.     

Experimental analysis of galvanic corrosion of a thin metal film in a multilayer stack for MEMS application

Experimental analysis of galvanic corrosion of an aluminium (Al)–chromium (Cr)–gold (Au) multilayer stack is presented in this paper. The use of two or more stacks of different metal films is common for realisation of various microelectromechanical system (MEMS) devices. However, patterning of the multilayer metal films by lithographic and etching process is very critical due to galvanic corrosion. In a multilayer metal stack film, the knowledge of etch rate of the individual metal layers is very important for designing the process flow for the fabrication of micro-sensors. In the present study, galvanic corrosion characteristics of Al–Cr binary metal stack and Al–Cr–Au ternary metal stack in different etching solutions have been studied. The intermetallic contact area and the exposed metal area in the electrolyte solution were varied using an innovative process step involving silicon shadow mask technique and lithographic process. It is observed from the experimental results that for an intermetallic contact area to exposed metal area ratio of 2, etch rate of aluminium layer is increased by more than two times in aluminium etchant and 80% in Cr etchant as compared to the etch rate of the aluminium layer without intermetallics effect. The results obtained from this study have been applied for designing the fabrication flow and successful realisation of a MEMS piezoresistive accelerometer.     

Controlled Microfabrication of High‐Aspect‐Ratio Structures in Silicon at the Highest Etching Rates: The Role of H2O2 in the Anodic Dissolution of Silicon in Acidic Electrolytes

In this work the authors report on the controlled electrochemical etching of high‐aspect‐ratio (from 5 to 100) structures in silicon at the highest etching rates (from 3 to 10 µm min^?1) at room temperature. This allows silicon microfabrication entering a previously unattainable region where etching of high‐aspect‐ratio structures (beyond 10) at high etching rate (over 3 µm min^?1) was prohibited for both commercial and research technologies. Addition of an oxidant, namely H₂O₂, to a standard aqueous hydrofluoric (HF) acid electrolyte is used to dramatically change the stoichiometry of the silicon dissolution process under anodic biasing without loss of etching control accuracy at the higher depths (up to 200 µm). The authors show that the presence of H₂O₂ reduces the valence of the dissolution process to 1, thus rendering the electrochemical etching more effective, and catalyzes the etching rate by opening a more efficient path for silicon dissolution with respect to the well‐known Gerischer mechanism, thus increasing the etching speed at both shorter and higher depths.     

Study of metal assisted anisotropic chemical etching of silicon for high aspect ratio in crystalline silicon solar cells

Textured surface is commonly used to enhance the efficiency of silicon solar cells by reducing the overall reflectance and improving the light scattering. In this study, a comparison between isotropic and anisotropic etching methods was investigated. The deep funnel shaped structures with high aspect ratio are proposed for better light trapping with low reflectance in crystalline silicon solar cells. The anisotropic metal assisted chemical etching (MACE) was used to form the funnel shaped structures with various aspect ratios. The funnel shaped structures showed an average reflectance of 14.75% while it was 15.77% for the pillar shaped structures. The average reflectance was further reduced to 9.49% using deep funnel shaped structures with an aspect ratio of 1:1.18. The deep funnel shaped structures with high aspect ratios can be employed for high performance of crystalline silicon solar cells.     

The influence of the AlN film texture on the wet chemical etching

The influence of the aluminum nitride (AlN) film texture on the chemical etching in KOH solution was invested. The AlN films with the different texture and crystal quality were prepared by sputtering. It is found that the chemical etching behaviors, including the etch rate, the activation energy, the surface morphology and the anisotropy, are strongly dependent on the film texture. There is a faster etching in the case of mixed (1 0 0) and (0 0 2) texture and a lower rate in the case of only (0 0 2) texture. The etch rate also decreases with the crystal quality. The sample with the only (0 0 2) texture forms discontinuous column structure after etching and exhibits lower porosity compared to that of the mixed (1 0 0) and (0 0 2) texture. Due to the strong anisotropy of the AlN wurtzite structure, the morphology of the film deposited at 700 °C shows the homogeneous pyramid shape after etching. The cross-section micrographs of etching patterns indicate that the anisotropy of the chemical etching is improved with the improving of the crystal quality.