High‐performance high‐efficiency LED‐backlight driving system for LCD panels

Abstract— A high‐performance high‐efficiency LED‐backlight driving system for liquid‐crystal‐display panels is presented. The proposed LED‐backlight driving system is composed of a high‐efficiency DC‐DC converter capable of operating over a universal AC input voltage (75–265 V) and a high‐performance LED‐backlight sector‐dimming controller. The high efficiency of the system is achieved by using an asymmetrical half‐bridge DC‐DC converter that utilizes a new voltage‐driven synchronous rectifier and an LED‐backlight sector‐dimming controller. This controller regulates current using lossless power semiconductor switches (MOSFETs). The power semiconductor switches of the proposed DC‐DC converter, including the synchronous rectifier switch, operate with zero voltage, achieving high efficiency and low switch voltage stress using the asymmetrical‐PWM and synchronous rectifier techniques. To achieve high performance, the proposed driving system performs the sector dimming and the current regulation using low‐cost microcontrollers and MOSFET switching, resulting in high contrast and brightness. A100‐W laboratory prototype was built and tested. The experimental results verify the feasibility of the proposed system.     

A small‐area and low‐power data driver IC using two‐stage DAC with a capacitor array for active matrix flat‐panel displays

A small‐area and low‐power data driver integrated circuit (IC) using a two‐stage digital‐to‐analog converter (DAC) with a capacitor array is proposed for active matrix flat‐panel displays. The proposed data driver IC employs a capacitor array in the two‐stage DAC so as to reduce the DAC area and eliminate the need for a resistor string, which has high‐power consumption. To verify the proposed two‐stage DAC, a 20‐channel data driver IC with the proposed 10‐bit two‐stage DAC was fabricated using a 0.18‐μm complementary metal–oxide–semiconductor process with 1.8 and 6 V complementary metal–oxide–semiconductor devices. The proposed 10‐bit two‐stage DAC occupies only 43.8% of the area of a conventional 10‐bit two‐stage DAC. The measurement results show that the differential nonlinearity and integral nonlinearity are +0.58/?0.52 least significant bit and +0.62/?0.59 least significant bit, respectively. The measured interchannel deviation of the voltage outputs is 8.8 mV, and the measured power consumption of the 20‐channel data driver IC is reduced to 7.1 mW, which is less than half of the power consumed by the conventional one.     

An Adaptive Passivity‐Based Controller of a Buck‐Boost Converter with a Constant Power Load

This paper addresses the problem of regulating the output voltage of a DC‐DC buck‐boost converter feeding a constant power load, which is a problem of current practical interest. Designing a stabilising controller is theoretically challenging because its average model is a bilinear second order system that, due to the presence of the constant power load, is non‐minimum phase with respect to both states. Moreover, to design a high‐performance controller, the knowledge of the extracted load power, which is difficult to measure in industrial applications, is required. In this paper, an adaptive interconnection and damping assignment passivity‐based control—that incorporates the immersion and invariance parameter estimator for the load power—is proposed to solve the problem. Some detailed simulations are provided to validate the transient behaviour of the proposed controller and compare it with the performance of a classical PD scheme.     

电网电压不对称跌落下直驱风电系统控制策略

针对电网电压不对称跌落下直驱风电系统并网运行过程中出现的直流环节过电压、并网电流畸变、并网功率波动问题,在直驱风电系统并网变换器的直流环节并联超导磁储能系统;同时在分析电网电压不对称跌落下网侧变换器数学模型的基础上,采用抑制并网功率波动的正负序电流控制对网侧变换器的控制策略加以改进,从而稳定直流环节电压、改善并网电流品质、抑制并网功率波动。仿真结果验证了该控制策略的正确性和有效性。     

Intrinsic Power Management Strategy based improvement of power stability in a single-phase AC–DC converter system

Nowadays the size of the use of electronic devices like laptops, cell phone chargers, electric vehicles and UPS is rapidly increasing. So AC–DC converters need to incorporate the power factor correction along with voltage regulation. There are many AC–DC converter control methods available, but these methods do not perform well. Therefore In this paper, a smooth transformation on switching will be characterized by a high power factor in a single phase AC–DC converter by the use of intrinsic power management strategy. The proposed AC–DC converter's circuit topology is obtained by integrating a boost and buck converter. The Boost Converter's switching frequency does power factor correction to get less current harmonics at the input line. In this single phase AC–DC converter, the buck-boost converter is an important component that increases system power quality based on advanced PWM technique. So in this work, the Intrinsic Power Management Strategy (IPMS) is proposed to enhance the control over the DC–DC converter performance during unstable or transient operation. Rather than making a quick Pulse Width Modulation (PWM) signal, the computerized signal processor just creates a moderate changing DC signal to decide the PWM ramp function. The power factor correction model has been created and simulated by utilizing MATLAB programming. The simulation model demonstrates that the power factor is improved and the converter has regulated DC output voltage. To validate this simulation, a 1000 W prototype converter has been developed to feed a DC motor and the analysis of the results are presented.     

一种两级式LED恒流驱动电源设计

根据LED驱动电源设计要求,对设计方案进行合理论证,前级功率因素校正采用升压型斩波电路,控制芯片采用仙童公司的FAN7527,后级采用隔离式单端反激电路实现降压型DC/DC变换,控制芯片为TI公司的UC3843;此外为满足LED驱动电源恒流输出特性,设计中采用AP4310设计一个恒流限压控制器。基于以上结构,完成一款实验样机,通过测试和分析,实验波形与理论波形基本一致,完成本次设计要求的性能指标。     

Low power quadrature voltage controlled oscillator

In this article, a low voltage low power quadrature voltage controlled oscillator (QVCO) coupled by four P&N transistors is presented. First, a novel negative resistance inductance capacitor (LC) oscillator is described, the N‐metal oxide semiconductor (NMOS) and P‐metal oxide semiconductor (PMOS) transistors are in series with the LC tank in the direct‐current (DC) path, and they generate the required negative resistance to compensate the energy loss of the LC tank and maintain the steady oscillation of the oscillator. Then, based on two identical LC oscillators, four P&N transistors are used as coupling terminals to generate quadrature outputs. The proposed QVCO is designed and simulated with GlobalFoundries' 0.18 μm CMOS RF process. The Cadence IC design tools postlayout simulation results demonstrate that the oscillation frequency of the QVCO can be tuned from 2.0 to 5.6 GHz by adjusting the bias voltage, and the phase noise of the voltage controlled oscillator is ?114 dBc/Hz at 1 MHz offset. Moreover, the proposed QVCO consumes only 2.31 mW from a 1.2 V supply voltage and it occupies a compact area of 0.45 mm² including the bond pads.     

Observer‐based finite‐time output‐feedback controller for DC‐DC buck converters with unknown load variations

The output voltage regulation problem of a DC‐DC buck converter is investigated in this paper via an observer‐based finite‐time output‐feedback control approach. Considering the effects of unknown load variations and the case without current sensor, by using the technique of adding a power integrator and the idea of nonseparation principle, a finite‐time voltage regulation control algorithm via dynamic output feedback is designed. The main feature of the designed observer and controller does not need any load's information. Theoretically, it is proven that the output voltage can reach the desired voltage in a finite time under the proposed controller. The effectiveness of the proposed control method is illustrated by numerical simulations and experimental results.     

A 1.4‐Gbps intra‐panel interface with low‐power and low‐EMI schemes for Tablet PC applications

An intra‐panel interface addressing all of the high‐speed, low‐power, and low‐electromagnetic interference (EMI) requirements for tablet personal computer applications is presented. This work proposes an adaptive clock window scheme to achieve 1.4‐Gbps data‐rate. For EMI suppression, data scrambling, horizontal blank period pattern scrambling, and novel clock and data recovery circuit are introduced. Lastly, for power‐saving, the proposed interface dynamically biases source driver's output buffers and employs early charge sharing by controlling the configuration data. For verification, a WQXGA thin‐film transistor liquid crystal display system is implemented with the timing controller and source driver ICs that are fabricated using 65‐nm and 180‐nm complementary metal‐oxide semiconductor (CMOS) processes, respectively. The liquid crystal display system demonstrates maximum operation speed of 1.4 Gbps and suppression of EMI noise in LTE Band‐20 and GSM 850 bands. The proposed power‐saving schemes achieve 4.3% reduction in total power consumption by source driver IC, which reaches about 85% of power consumption by enhanced reduced‐voltage differential signaling interface circuit.     

Analysis and design of single-phase power factor corrector with genetic algorithm and adaptive neuro-fuzzy-based sliding mode controller using DC–DC SEPIC

This paper proposes a methodology for single-phase power factor correction with DC–DC single-ended primary inductance converter (SEPIC) using cascade control strategy which comprises of genetic algorithm-based outer PI controller and an inner current controller which uses an adaptive neuro-fuzzy inference system-based sliding mode controller. DC–DC SEPIC is a fourth-order converter, and in order to reduce the complexity in controller design, reduced-order model of the original higher-order system is obtained by using Type-I Hankel matrix method. The performance of the proposed system is analysed using MATLAB/Simulink-based simulation studies. In order to ensure the robustness of the proposed controller, the performance parameters such as percentage total harmonic distortion, power factor, % voltage regulation, and % efficiency are analysed. From the simulation results, it is inferred that the proposed method provides efficient tracking of output voltage and effective source current shaping for load, line, and set point variations.

     

A low-power scan driver employing IZO TFTs including an AC–DC type output module

This paper presents a low-power and simple scan driver with a new output module called as AC–DC type output module. 46 stages of the scan driver are fabricated by integrating In–Zn–O Thin-film transistors (IZO TFTs) with back channel etch (BCE) structure on the glass substrate. Under 100 hours’ test, it is shown that the voltage fluctuation of the output signal can be well suppressed by the proposed AC–DC type output module up to the whole 46 stages. The power consumption can be obviously reduced by using the AC–DC type output module compared with the conventional AC–AC type output module. It is measured that the power consumption of one stage for the proposed scan driver with AC–DC type output module at the clock frequency of 16.7 kHz is 170 μW, as well as 393 μW for the proposed scan driver with the conventional AC–AC type output module. It is shown from the simulation results that there is a good tradeoff between the power consumption and the rising time for the proposed AC–DC type output module compared with AC–AC type output module and DC–DC type output module.     

A novel gate driver circuit for depletion‐mode a‐IGZO TFTs

In this paper, a novel gate driver circuit, which can achieve high reliability for depletion mode in a‐InGaZnO thin‐film transistors (TFTs), was proposed. To prevent the leakage current paths for Q node effectively, the new driving method was proposed by adopting the negative gate‐to‐source voltage (V_GS) value for pull‐down units. The results showed all the V_OUT voltage waveforms were maintained at VGH voltage despite depletion‐mode operation. The proposed circuit could also obtain stable V_OUT voltage when the threshold voltage for all TFTs was changed from ?6.5 to +11.5 V. Therefore, the circuit can achieve high reliability regardless of threshold voltage value for a‐IGZO TFTs. In addition, the output characteristics and total power consumption were shown for the alternating current (AC)–driven and direct current (DC)–driven methods based on 120‐Hz full‐HD graphics (1920 × 1080) display panel. The results showed that the AC‐driven method could achieve improved V_OUT characteristics compared with DC‐driven method since the leakage current path for Q node can be completely eliminated. Although power consumption of the AC‐driven method can be slightly increased compared with the DC‐driven method for enhancement mode, consumption can be lower when the operation has depletion‐mode characteristics by preventing a leakage current path for pull‐down units. Consequently, the proposed gate driver circuit can overcome the problems caused by the characteristics of a‐IGZO TFTs.     

A multimode digital controller IC for flyback converter with high accuracy primary-side feedback

A digital controller IC for the flyback converter with primary-side feedback is proposed. The controller is used for adapter charger or LED driver applications. To obtain high accuracy for the primary-side feedback, a digital primary-side sensing technology is adopted, which can auto-track the knee point of the primary auxiliary winding voltage. Furthermore, an internal digital compensator eliminates the need for external loop compensation components while achieving excellent line and load regulation. The controller could output both constant voltage and constant current depending on the load current. Pulse width modulation and pulse frequency modulation are used in constant voltage mode while quasi-resonant control is used in constant current mode. The digital controller is validated by using FPGA.     

基于模糊PID控制的双向DC/DC变换器研究

双向DC/DC变换器是指在保持变换器两端的直流电压极性不变的情况下,根据实际需要完成能量双向传输的直流变换器。它在直流不间断电源系统、分布式电站、电动汽车以及太阳能电池阵中有广泛的应用。通过对双向半桥变换器的分析,并将其与蓄电池相结合使用,完成能量的双向传输和电池能量对电网的回馈。由于DC/DC变换器在升降压的过程中产生的严重的非线性问题,在控制方案上,采用模糊PID控制的电压、电流双闭环控制。仿真表明,与传统的PID控制相比,该控制方案有效提高了变换器的鲁棒性,减小输出电压波动,能够实现能量的双向流动。     

Dynamic evolution control for synchronous buck DC–DC converter: Theory,model and simulation

This paper proposes a new control technique for synchronous buck DC–DC converter. Theory, design and implementation of the proposed control technique are provided. A new approach for converter controller synthesis based on dynamic evolution control theory is presented. In order to synthesize the converter controller, this method uses a simple analysis of nonlinear equation models of the converter. The synthesis process is simple and requires a quite low bandwidth for the controller. Therefore, this control method is suitable for digital control implementation. As an illustrative example, the synthesis of synchronous buck DC–DC converter controller is discussed in detail. The model of the synchronous buck DC–DC converter system was implemented using SimPowerSystems toolbox of MATLAB-SIMULINK. Performance of the proposed dynamic evolution control under step load change and step input voltage condition was investigated. Simulation results confirm that the proposed control method is superior to traditional PI based controller because of fast transient response and good disturbance rejection.     

基于滑模控制的独立光伏发电系统控制策略

针对独立运行的光伏发电系统,提出了基于滑模控制的最大功率跟踪(MPPT)策略;针对光伏微源输出功率随机性引起的逆变器输入侧直流母线电压波动,通过储能控制实现电压稳定;针对负载变化引起的系统输出电压波动,设计了系统输出电压电流双闭环控制器。通过MatLab/Simulink对提出控制策略进行了仿真验证。分析结果表明,所提出滑模控制策略可实现光伏电池的MPPT;储能控制策略可有效抑制光伏微源输出功率波动引起的直流母线电压波动;输出电压控制策略能稳定系统电压,确保安全可靠运行。     

Non-singular terminal sliding-mode control of DC–DC buck converters

This paper presents a non-singular terminal sliding mode control (NTSMC) method for DC–DC buck converters. The NTSMC method eliminates the singularity problem which arises in the terminal sliding mode due to the fractional power and assures the finite time convergence of the output voltage error to the equilibrium point during the load changes. It is shown that the NTSMC method has the same finite time convergence as that of the terminal sliding mode control (TSMC) method. The influence of the fractional power on the state trajectory of the converter is investigated. It is observed that the slope of the sliding line becomes larger with decreasing value of the fractional power which leads to a faster transient response of the output voltage during the load changes. The theoretical considerations have been verified both by numerical simulations and experimental measurements from a laboratory prototype.     

电网故障下双馈风力发电机网侧变换器的高阶滑模控制

针对电网故障下对双馈风力发电机网侧变换器的影响,本文采用滑模变结构控制方法,提出了采用增加瞬时功率前馈补偿的高阶滑模变结构控制策略,为此首先简要的分析了双馈风力发电机中双脉宽调制（PWM）型变换器的结构和控制原理,然后根据网侧变换器的数学模型,提出对网侧变换器采用电网电压定向欠量控制,以实现交流侧单位功率因数和直流环节电压控制．提出的方法提高了系统响应速度,克服参数变化和外电压波动的影响．仿真结果表明了该策略的有效性．     

Improved self-oscillating control of a quadratic buck converter for constant voltage applications

A great number of switching power supplies are used to provide a variable voltage for resistive-inductive loads. However, some applications in industry, require a regulated current with a constant voltage such as battery charging systems, LED drivers, and laboratory equipment for power converters connected to PV cells. Additionally, some constant voltage systems are intrinsically unstable, and therefore, they cannot be used without a closed-loop compensatory circuit. Hence, this article describes a novel smooth starter system behaving as a current source for constant voltage applications. The proposed technology is implemented by a quadratic buck converter, and then, a self-oscillating control technique is applied for performing the output current regulation of the converter, which is capable of aiding to improve the system performance, stabilize the overall system, protect the converter from transient current oscillations, and provide an acceptable control performance. In addition to practical aspects, soft starter methods and limitation of the constant voltage power converter are mentioned and described in this article. The designed structure has not only the advantages of smooth response and simplicity to construct but also performs a nearly zero steady-state error regulation. The power stage, the control scheme, and the modulator are explained in detail and validated by experiments.     

基于自适应逆控制的有源滤波器的检测算法

提出一种新的并联型电力有源滤波器的检测方法,通过控制有源滤波器直流电容电压来确定电网电流所需的基波有功分量的幅值,首次将自适应逆控制用于电力有源滤波器.将系统的主电路部分及有源滤波器看作广义有源滤波器,通过自适应逆控制方式控制直流电容电压,使其输出跟随参考输入,最终达到抑制谐波和补偿无功的目的.此检测算法简单有效,稳态和暂态的仿真结果均证实了该算法的可行性.