Convection behavior analysis of CMOS MEMS thermal accelerometers using FEM and Hardee’s model

This paper presents convection behavior investigation of CMOS MEMS convective accelerometers using both analytical and FEM techniques. In a first part, a newly developed accelerometer 3D model is used in FEM simulations to model convection behavior as a function of design geometry and temperature. Using various sizes of two different cover shapes, sensitivity reading and its maximum position in cavity are found to be largely affected by both cover size and shape. In addition, a sensor with cavity width of 600 μm produces sensitivity saturation starting at a cavity depth of 200 μm, for both cover shapes. Using FEM data and curve fitting, differential temperature is claimed to be linearly linked to the effective heater temperature to the power of 1.7. Using the same cavity design and from computed heating efficiency values, we found that a 60 μm width heater offers the best efficiency. This cavity and heater designs give an optimal detector position of 120 μm from heater center along the sensitive axis. Moreover, dual axis accelerometers are found to be more power efficient than single axis ones. In the second part, we present Hardee’s spherical model and investigate its possible application on convective accelerometers. It is shown that inner and outer isotherms deformation, caused by accelerometer design and convection process, should be modeled by including sensor geometry parameters in the derived governing equations. Moreover, Hardee’s biasing temperature relation has to be revised if it is to be used for convective accelerometers.     

Fiber Bragg grating based shear-force sensor: modeling and testing

This paper presents the design and fabrication of a novel shear-force sensor using fiber Bragg grating (FBG) as the sensing element. The basic design consists of layers of carbon composite material (CCM) with an embedded FBG. A deformable layer of silicon rubber between the layers of CCM allows the applied shear force to change the grating periodicity and, hence, the reflected Bragg wavelength. The shift in the reflected Bragg wavelength shows a linear variation with the applied shear force. A theoretical model is established to study the shear sensing ability. In addition, numerical modeling is also carried out by the finite-element method (FEM). The experimental results are found to be in good agreement with the theoretical predictions as well as the FEM results. In this paper, the basic concept of shear-force measurement using FBG and related theoretical model and FEM simulation results are discussed together with experimental verification.     

An ANFIS based fuzzy controller for corner compensation

As threshold voltage of CMOS transistors is the main parameter that takes effect from process variations, in this paper a novel method for corner detection is presented which senses the variations of fabrication process through threshold voltage of the devices. A new general purpose 2-input, 2-output, 25 rules, ANFIS based fuzzy controller is proposed to compensate the variations subsequently. In this controller novel structures are presented for each block including membership function generator, Min–Max selector and defuzzifier. As an application, bias points of comparators of a typical flash ADC are controlled through introduced system in order to compensate the process variation effects and minimizing total power consumption consequently. Due to differential structures used in the architecture of the blocks, major part of the power supply noise is rejected. The Hspice (level 49) simulation results are given using a generic 0.35 μm standard CMOS technology parameters and power supply of 3.3 V with total power consumption of 15.6 mW for 7.4 MFLIPS. Because of simple and symmetrical circuitry, layout of the proposed controller is very compact, about 410 μm × 210 μm.     

An ultra-low power energy-efficient microsystem for hydrogen gas sensing applications

This paper presents a fully integrated power management and sensing microsystem that harvests solar energy from a micro-power photovoltaic module for autonomous operation of a miniaturized hydrogen sensor. In order to measure H₂ concentration, conductance change of a miniaturized palladium nanowire sensor is measured and converted to a 13-bit digital value using a fully integrated sensor interface circuit. As these nanowires have temperature cross-sensitivity, temperature is also measured using an integrated temperature sensor for further calibration of the gas sensor. Measurement results are transmitted to the base station, using an external wireless data transceiver. A fully integrated solar energy harvester stores the harvested energy in a rechargeable NiMH microbattery. As the harvested solar energy varies considerably in different lighting conditions, the power consumption and performance of the sensor is reconfigured according to the harvested solar energy, to guarantee autonomous operation of the sensor. For this purpose, the proposed energy-efficient power management circuit dynamically reconfigures the operating frequency of digital circuits and the bias currents of analog circuits. The fully integrated power management and sensor interface circuits have been implemented in a 0.18 μm CMOS process with a core area of 0.25 mm². This circuit operates with a low supply voltage in the 0.9–1.5 V range. When operating at its highest performance, the power management circuit features a low power consumption of less than 300 nW and the whole sensor consumes 14.1 μA.     

Nano Watt CMOS temperature sensor

In this paper, an ultra-low power embedded full CMOS temperature sensor based on sub-threshold MOS operation is designed in a 0.18 μm CMOS technology. It focuses on temperature measurement using the difference between the gate-source voltages of transistors operated in sub-threshold region that is proportional to absolute temperature. By using the proposed scheme the wide range supply voltage of 0.6–2.5 V with inaccuracy of +0.55 °C/V and total power consumption of merely 7 nW at 120 °C is achieved. The performance of the sensor is highly linear and the predicted temperature error is ±2 °C in the range of 10–120 °C. The sensor occupies a small area of 67 × 31 μm². Ultra-low power consumption of the sensor illustrates proper operation for low power applications such as battery powered portable devices, passive RFID tags and wireless sensor network applications.     

Compact modeling of vertical hall-effect devices: electrical behavior

This paper presents the development of a design-oriented compact model of vertical Hall-effect sensors integrated in CMOS technologies. Such a model makes easier the design of integrated Hall systems, permitting designers to co-simulate the Hall sensing element with the biasing and processing electronics thanks to a single electrical simulator. Here focus is put on the electrical behavior, i.e. the resistive behavior of a 5-contact vertical Hall device. The model is based both on theoretical considerations and on FEM numerical simulations performed with COMSOL^®. The result is a new predictive compact model, written in Verilog-A, with 7 input terminals and 14 parameters, mainly sensor geometrical and technological parameters. These parameters can be easily extracted from measurements carried out on a single sensor. The compact model has been validated by FEM simulations, as well as by comparing its response with experimental results obtained from a vertical Hall device fabricated in a CMOS 0.35 μm technology. The root mean square error of the model with respect to experimental results obtained on a wide range of typical sensor biasing conditions is below 2 %. Such a resistive model opens the way to an efficient, complete compact model of the vertical Hall device, i.e. including the Hall-effect as well as all the second-order galvanomagnetic effects.     

Two-Dimensional Long-Wavelength and Very Long-Wavelength Focal-Plane Arrays at AIM

In recent years AIM has expanded its portfolio of standard infrared (IR) focal-plane arrays in the 3 μm to 5 μm (mid-wavelength infrared, MWIR) and 8 μm to 10 μm (long-wavelength infrared, LWIR) spectral ranges with two-dimensional IR detectors, sensitive in the 0.9 μm to 2.5 μm (short-wavelength infrared, SWIR) and especially in the 10 μm to 15 μm (very long-wavelength infrared, VLWIR) spectral ranges. This paper reports on the latest technological advancements that will benefit not only prototype applications for which they are demonstrated but a wide range of AIM products. A reduction of the pixel pitch from 24 μm to 15 μm is the result of increasing demands for compact detection modules with reduced weight, size, power consumption, and cost efficiency. Performance characterization for such a reduced-pitch 640 × 512 module in the LWIR (cut-off 10.5 μm at 67 K) yields mean noise equivalent temperature difference of 32.2 mK and defective pixel rate of only 0.5%. Extending the detection wavelength further into the VLWIR is of major interest for space applications such as the Meteosat Third Generation, which poses challenging requirements for sensor material homogeneity and dark-current density. To meet this requirement, an extrinsic doping approach is utilized on a 256 × 256 mercury cadmium telluride (MCT) focal-plane array with ～14 μm cut-off wavelength at 55 K operating temperature, and a dark- current density of about 1 pA/μm² is demonstrated.     

A 36 ppm/°C BiCMOS current reference without requiring curvature-compensation

A low temperature coefficient and high precision current reference generator, with simplified current biasing circuit with only four MOSFETs, has been designed using CSMC’s 0.5 μm BiCMOS process. Utilizing source follower and emitter follower as the bandgap reference output stage, a high performance bandgap reference with no Early effect and low output resistance is realized. A one diode-connected circuit is introduced to further simplify the current biasing. Simulation results of the proposed current reference generator indicate that the output current of 2 μA exhibit a variation of 0.5 % over the temperature range of ?40 to 125 °C is achieved. The current reference draws 21 μA from a 5 V supply. Corner and two hundred runs Monte Carlo simulation show that the maximum deviation from the desired value of the reference current are less than 3.05 % and ± 2.6 %, respectively. This high precision current reference generator is intended for Organic LED driver circuits.     

Wide Dynamic Range CMOS Amplifier Design for RF Signal Power Detection via Electro-Thermal Coupling

A differential temperature sensor for on-chip signal and DC power monitoring is presented for built-in testing and calibration applications. The amplifiers in the sensor are designed with class AB output stages to extend the dynamic range of the temperature/power measurements. Two high-gain amplification stages are used to achieve high sensitivity to temperature differences at points close to devices under test. Designed in 0.18 μm CMOS technology, the sensor has a simulated sensitivity that is tunable up to 210 mV/°C with a corresponding dynamic range of 13 °C. The sensor consumes 2.23 mW from a 1.8 V supply. A low-power version of the sensor was designed that consumes 1.125 mW from a 1.8 V supply, which has a peak sensitivity of 185.7 mV/°C over a 8 °C dynamic range.     

Time-interleaved CMOS chip design of Manchester and Miller encoder for RFID application

In this paper, we propose a modified Manchester and Miller encoder that can operate in high frequency without a sophisticated circuit structure. Based on the previous proposed architecture, the study has adopted the concept of parallel operation to improve data throughput. In addition, the technique of hardware sharing is adopted in this design to reduce the number of transistors. This circuit is realized by using TSMC CMOS 0.35-μm 2P4M technologies. The simulation results of HSPICE indicate that it functions and works successfully at 200-MHz data rate. An experimental chip had been fabricated and measured. The measured results show that the experimental chip has 50 MHz data throughput rate under 3.3-V supply voltage. The lowest supply voltage 0.6 V is achievable working at 5 kHz data rate. The average power consumption of the circuit under room temperature is 549 μW. The chip area is 70.7 μm × 72.2 μm. The compact structure and high-speed operation are useful for radio frequency identification applications.     

A power efficient,differential multichannel adiabatic electrode stimulator for deep brain stimulation

A fully integrated 4-to-1 transimpedance combining amplifier (TICA)-based static unitary detector (STUD) is developed for high-resolution of laser detection and ranging (LADAR) sensor. With a developed TICA, the STUD is able to have an effective large-area photodetector to enlarge the region of interest (ROI) without the bandwidth deterioration of a receiver for LADAR sensor. The 4-to-1 TICA is fabricated using 0.18-μm standard CMOS technology and it consists of four independent current buffers, a two-stage signal combiner, a balun, an output buffer, and four over-current protectors in one single integrated chip. The core of the TICA dissipates a power of about 7.8 mW. The total power consumption, including that of the balun and the output buffer, is 41 mW from a 1.8-V supply. The average input-referred noise current spectral density is 15.4 pA/√Hz with a bandwidth of 185 MHz and a transimpedance gain of 70 dBΩ. The developed TICA occupies an active area of approximately 107 μm × 102 μm and the die size, including the I/O pads, is 912 μm × 1000 μm. From the two-dimensional optical pulse scanning measurements and the three-dimensional (3-D) range measurements, it is verified that the designed TICA is suitable for the receiver front-end of the STUD-based LADAR sensor.     

Integrated control circuit for adaptive sampling

A fully integrated controller for non-uniform data sampling suitable for the pre-processing of signals in a power- and size-restricted sensor front-end is presented. The sample rate is dynamically varied based on signal activity determined by the 2nd derivative of the input voltage. The derivative is realized with high-pass filters having 647 Hz cut-off frequency. A digital circuit generates the time-stamps and the trigger for an external analog-to-digital converter. Measured results of a 0.35 μm CMOS implementation show a sample rate variation of 7:1 and a system power advantage compared to conventional front-ends. The circuit dissipates 48 μW from ±1.5 V supplies and consumes an active area of 0.068 mm².     

A Zero-Pole Reposition Based, 0.95-mW, 68-dB,Linear-in-dB,Constant-Bandwidth Variable Gain Amplifier

A variable-gain amplifier with very low power consumption and wide tuning range is presented. The operational principle of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by simulation in TSMC 0.18-μm N-well CMOS fabrication process. Owing to the novel zero-pole repositioning technique, the proposed circuit demonstrates very high frequency bandwidth of 79 MHz while drawing only 0.52 mA from 1.8 V power supply. The interesting results such as a very small core area of about 0.0025 mm² as well as a wide linear-in-dB and constant-bandwidth tuning range of 68.2 dB along with a very low power consumption of 0.95 mW are achieved utilizing standard CMOS technology. The stability of the proposed VGA is verified through transient sinusoidal response analysis. Full process, voltage and temperature (PVT) variation analysis of the circuit is also investigated through Monte Carlo and corner case analysis in order to approve the robustness of the structure. Monte Carlo simulations show standard deviation values of 4.6 dB and 78.3 MHz in gain and gain-bandwidth product, respectively. These results show that our zero-pole repositioning method would lend itself well for use in low-power and high-frequency applications, especially in high-speed automatic gain control amplifiers.     

Temperature compensated CMOS ring VCO for MEMS gas sensor

This paper presents a CMOS voltage controlled ring oscillator with temperature compensation circuit suitable for low-cost and low-power gas sensor. To operate at low frequency, a control voltage generated by a CMOS bandgap reference is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm². Operating at 1.25 V, the output frequency is within 200 ± l0 kHz over the temperature range of ?25 to 80 °C with a power consumption of 810 μW.     

Temperature compensated and gated CMOS ring oscillator for time-to-digital converter application

This paper presents a CMOS voltage controlled ring oscillator with temperature compensation for low power time-to-digital converters (TDCs). In order to maintain the oscillation frequency stable, a novel compensation circuit is proposed through adaptively sensing temperature variations. This design has been implemented in TSMC 0.35 μm CMOS standard process with an active area of under 0.039 mm². Experimental results show that the clock frequency is around 159.0 MHz only with a power consumption of 550 μA. As respective to the room temperature the maximum frequency variation is between ?3.46 and +3.08 % under temperature range of ?40 to 85 °C. The bit error time induced by clock jitter is limited within 4.8 % in the whole clock period, and the differential nonlinearity of the TDC is less than 0.408 LSB.     

A 2.4-GHz frequency synthesizer based on process and temperature compensated ring ILFD

In this paper, a 2.4-GHz frequency synthesizer incorporating a ring-oscillator based process and temperature compensated injection-locked frequency divider (ILFD) is proposed. The synthesizer is implemented in a 0.18-μm standard complementary metal-oxide semiconductor process with a chip area of 3 mm × 3 mm plus the off-chip capacitors for loop filter. With an LC oscillator, the output frequency can be tuned from 2.057 to 2.652 GHz, while the settling time is around 36 μs with a loop bandwidth of 60 kHz. Measurements are performed across six different chips to study the circuit performance due to process variation. The worst-case total power consumption is measured to be 2.2 mW with a power supply of 1.8 V. The ILFD block is also tested separately and the test results show a wide locking range of 1.4 GHz over all the process corners and a temperature range from 0 to 80 °C.     

Study of Lasing Action in a Pulsed Optically Pumped D<Subscript>2</Subscript>O Gas Terahertz Laser

A modified three-level laser kinetics model for a pulsed high-power optically pumped gas terahertz laser is introduced and used to model the lasing kinetics process of a gas terahertz laser system. We, for the first time to our knowledge, investigated the time evolution dynamics process of the pump intensity, population distribution among the energy levels, pump and THz signal gain coefficient, and the THz laser intensity within the pulsed D₂O gas THz laser. High-power THz pulse with peak power of about 7.4 kW and pulse width of 145 ns at wavelength of 385 μm were obtained in the simulation, using an incident pump pulse with peak power of 2.2 MW and pulse width of 110 ns. THz pulse delay of 40 ns and pulse broadening of 35 ns were quantitatively analyzed. In addition, the experimental results for the pulse profile, pulse width, pulse broadening, pulse energy, and peak power are in agreement with the theoretical simulation results.     

Joining Using Reactive Films for Electronic Applications: Impact of Applied Pressure and Assembled Materials Properties on the Joint Initial Quality

The use of local and rapid heating of electronic assemblies can significantly reduce the degradation of temperature-sensitive materials and substrate bowing commonly encountered in electronic applications during the high temperature reflow process. It can also allow assembling electronic packages on a non-planar surface and/or on massive structures that are very complex using a conventional oven for soldering. In order to attach electronic components to substrates, a rapid soldering process using an exothermic reactive foil sandwiched between solder preforms was evaluated. Once the film was activated and reacted, the solder preforms were melted to ensure the adhesion between the assembled materials. The effect of applied pressure on the joint quality, the reactive film thickness, as well as the attached material thickness and physical properties were assessed. Using a 60 μm thick reactive foil with two 25 μm thick SnAgCu305 preforms, results show that the fraction of void-free interfacial area between a metallized diode and an active metal braze substrate increased from 34% to 74% with pressure values between 0.5 kPa and 100 kPa, respectively. At a constant pressure of 13 kPa, increasing the reactive foil thickness from 40 μm to 60 μm leads to an increase in the void-free interfacial attach area ratio from 20% to 40%, and a value of 54% was achieved by using two 60 μm foils under the same conditions. The substrate metallization and solder thickness also affect the joint quality. The experimental results are analyzed and correlated with the duration of liquid solder using thermal models.     

Current monitoring circuit for fault detection in CMOS integrated circuit

This article presents a built-in current sensor (BICS), which detects faults using the current testing technique in CMOS integrated circuits. This circuit employs cross-coupled PMOS transistors, which are used as current comparators. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved. It can be applied to deep sub-micron processes. The validity and effectiveness are verified through the HSPICE simulation on circuits with faults. The entire area of the test chip is 116×65 μm². The BICS occupies only 41×17 μm² of the area of the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix 0.35 μm 2-poly-4-metal N-well CMOS process.     

A Temperature Compensated CMOS Ring Oscillator for Wireless Sensing Applications

This paper presents a CMOS voltage controlled ring oscillator (VCO) with temperature compensation circuit suitable for low-cost and low-power MEMS gas sensor. This compensated ring oscillator is dedicated to Chopper Stabilized CMOS Amplifier (CHS-A). To operate at low frequency, a control voltage generated by a CMOS bandgap reference (BGR) is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm². Operating at 1.25 V, the output frequency is within 200?±?l0 kHz over the temperature range of ?25 °C to 80 °C with power consumption of 810 μW.