Nanoscale two-bit/cell NAND silicon-oxide-nitride-oxide-silicon devices with a separated double-gate saddle-type structure

Nanoscale two-bit/cell NAND silicon-oxide-nitride-oxide-silicon flash memory devices based on a separated double-gate (SDG) saddle structure with a recess channel region had two different doping regions in silicon-fin channel to operate two-bit per cell. A simulation results showed that the short channel effect, the cross-talk problem between cells, and the increase in threshold voltage distribution were minimized, resulting in the enhancement of the scaling-down characteristics and the program/erase speed.     

Electrical characteristics of nanoscale NAND silicon-oxide-nitride-oxide-silicon flash memory devices fabricated on SOI substrates

NAND silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices with double gates fabricated on silicon-on-insulator (SOI) substrates were proposed. The current-voltage characteristics related to the programming operation of the designed nanoscale NAND SONOS flash memory devices on a SOI substrate and on the conventional bulk-Si substrate were simulated and compared in order to investigate device characteristics of the scaled-down memory devices. The simulation results showed that the short channel effect and the subthreshod leakage current for the memory device with a large spacer length were lower than that of the memory device with a small spacer length due to increase of the effective channel length. The device performance of the memory device utilizing the SOI substrate exhibited a smaller subthreshold swing and a larger drain current level in comparison with those on the bulk-Si substrate. These improved electrical characteristices for the SOI devices could be explained by comparing the electric field distribution in a channel region for both devices.     

Design and optimization of two-bit double-gate nonvolatile memory cell for highly reliable operation

In this paper, characterization and optimization have been performed on the 2-b floating-gate-type nonvolatile memory (NVM) cell based on a double-gate (DG) MOSFET structure using two-dimensional numerical simulation. The thickness and the difference of charge amount between programmed and erased states are found to be the crucial factors that put the NVM cell operation under optimum condition. Under fairly good conditions, the silicon thickness can reach below 30 nm while suppressing the read disturbance level within 1 V. With these results, operating schemes are investigated for both NAND - and NOR-type memory cells. This paper is based on simulation works which can give a reasonable intuition in flash memory operation. Although we adopted a floating-gate-type device since the exact modeling of Si/sub 3/N/sub 4/ used for the storage node is absent in the current numerical simulator, this helps to predict the operation of an oxide-nitride-oxide dielectric flash memory cell at a good degree.     

Nanoscale memory cell based on a nanoelectromechanical switched capacitor

The demand for increased information storage densities has pushed silicon technology to its limits and led to a focus on research on novel materials and device structures, such as magnetoresistive random access memory and carbon nanotube field-effect transistors, for ultra-large-scale integrated memory. Electromechanical devices are suitable for memory applications because of their excellent 'ON-OFF' ratios and fast switching characteristics, but they involve larger cells and more complex fabrication processes than silicon-based arrangements. Nanoelectromechanical devices based on carbon nanotubes have been reported previously, but it is still not possible to control the number and spatial location of nanotubes over large areas with the precision needed for the production of integrated circuits. Here we report a novel nanoelectromechanical switched capacitor structure based on vertically aligned multiwalled carbon nanotubes in which the mechanical movement of a nanotube relative to a carbon nanotube based capacitor defines 'ON' and 'OFF' states. The carbon nanotubes are grown with controlled dimensions at pre-defined locations on a silicon substrate in a process that could be made compatible with existing silicon technology, and the vertical orientation allows for a significant decrease in cell area over conventional devices. We have written data to the structure and it should be possible to read data with standard dynamic random access memory sensing circuitry. Simulations suggest that the use of high-k dielectrics in the capacitors will increase the capacitance to the levels needed for dynamic random access memory applications.     

Direct comparison of the electrical properties in metal/oxide/nitride/oxide/silicon and metal/aluminum oxide/nitride/oxide/silicon capacitors with equivalent oxide thicknesses

We examine the electrical properties of metal/oxide/nitride/oxide/silicon (MONOS) capacitors with two different blocking oxides, SiO₂ and Al₂O₃, under the influence of the same electric field. The thickness of the Al₂O₃ layer is set to 150 Å, which is electrically equivalent to a thickness of the SiO₂ layer of 65 Å, in the MONOS structure for this purpose. The capacitor with the Al₂O₃ blocking layer shows a larger capacitance-voltage memory window of 8.6 V, lower program voltage of 7 V, faster program/erase speeds of 10 ms/1 μs, lower leakage current of 100 pA and longer data retention than the one with the SiO₂ blocking layer does. These improvements are attributed to the suppression of the carrier transport to the gate electrode afforded by the use of an Al₂O₃ blocking layer physically thicker than the SiO₂ one, as well as the effective charge-trapping by Al₂O₃ at the deep energy levels in the nitride layer.     

Nanoscale oxide patterning with electron-solid-gas reactions

A novel nanoscale oxide patterning technique based on electron beam induced transformation in a gas environment is demonstrated. Localized phase transformation is induced in the surface region of a substrate, resulting in the formation of an oxide pattern that is embedded in the surface. The composition of the transformed region is determined only by the substrate and gas composition. The spatial resolution of the technique is about 15 nm.     

Reduce cell to cell charge interference by virtual ground inclusion in 3-dimensional vertical gate NAND flash memory

In this work, we propose a structural modification to the 3-dimensional vertical gate NAND flash memory that will reduce the charge interference caused by stored charge on the opposite facing cell. In the barrier oxide structure (BOS), an oxide layer was inserted into the center of the body to physically block the conduction electrons moving to and from the channel regions influenced by the charge stored on either of the Oxide-Nitride-Oxide (ONO) trap layers. In the virtual ground structure (VGS), a highly p-type doped poly silicon layer was inserted to act as a virtual ground to reduce the electric-field changes caused by the stored change on the ONO trap layers. We investigated the I-V characteristics of the different structures using 3-D TCAD simulation tool, depending on the body type (crystalline or poly silicon) at double programming and single programming. We confirmed that the charge interference problem was reduced significantly by the BOS and VGS modifications in the crystalline silicon and high quality poly silicon body structures.     

Nonvolatile write-once-read-many-times memory device with functionalized-nanoshells/PEDOT:PSS nanocomposites

We have investigated the memory effect of the nanocomposites of functionalized carbon nanoshells (f-CNSs) mixed with poly(3,4-ethylenedioxythiophene) doped with polystyrenesulfonate (PEDOT:PSS) polymer. The f-CNSs were synthesized by the spray pyrolysis method and functionalized in situ with functional groups (OH, COOH, C-H, C-OH) with the aim of improving their compatibility in the aqueous dispersion of PEDOT:PSS. The current-voltage (I-V) sweep curves at room temperature for the Al/f-CNSs, for certain concentrations range, embedded in a PEDOT:PSS layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. The memory effect observed in the devices can be explained due to the existence of trapped charges in the f-CNSs/PEDOT:PSS layer. The carrier transport mechanisms for the memory devices is studied and discussed.     

Double-pulse laser-induced breakdown spectroscopy with liquid jets of different thicknesses

Double-pulse laser-induced breakdown spectroscopy of magnesium in water has been performed with different jet thicknesses. A Meinhard nebulizer has been used to create a jet of 0.3-mm diameter, whereas a homemade liquid jet injector produced a thicker jet of 1.0-mm diameter. The relationship of line intensity to delay time between the two laser pulses for these two jets is compared and discussed. The limits of detection in these two jets are also determined and compared. The line intensity observed from the double-pulse measurement is correlated with the measured electron density calculated with the Halpha line. Also, the behavior of plasma density relative to time delay between the lasers is described.     

Optical and structural properties of zinc oxide films with different thicknesses prepared by successive ionic layer adsorption and reaction method

In this work, zinc oxide semiconducting films belonging to the II-VI group have been produced by successive ionic layer adsorption and reaction (SILAR) method on glass substrates with 10, 15, 20 and 25 cycles at room temperature. Following the deposition, the samples were dried in air at 400 °C for 1 h. The films were characterized by X-ray diffraction, field emission scanning electron microscopy and optical absorption measurement techniques. The X-ray diffractions of the films showed that they are hexagonal in structure. The crystallite size of ZnO films varied between 34 and 38 nm accordingly with the number of SILAR cycles. The material has exhibited direct band gap transition with the band gap values lying in the range between 3.13 and 3.18 eV. The red shift is observed in the absorption edge as the cycles increased. Transmission of the films decreased from 65 to 40% with increasing the number of cycles.     

不同厚度碳纤维布/环氧树脂复合材料孔隙率超声衰减模型

复合材料中孔隙的存在造成了材料性能的下降,因此,对材料孔隙的检测至关重要。本文利用异丙醇(IPA)添加量的不同,制备了不同层数、不同孔隙率含量的碳纤维(CF)布/环氧树脂层合板试件。采用脉冲反射法测试计算了CF布/环氧树脂层合板试件的超声衰减系数,通过金相显微分析对孔隙的分布、形状及尺寸进行了表征,运用MATLAB对金相显微图进行分析得到试件的孔隙率。讨论了孔隙率对材料的声速、声阻抗及超声衰减系数的影响规律,利用4组不同层数样本试件的孔隙率和超声衰减量的试验数据,给出了基于模型的孔隙率与材料层数、超声衰减量的拟合公式。结果表明,随着IPA添加量的增加, CF布/环氧树脂层合板(2 mm)孔隙率从1.09%增加到4.16%,材料的声速和声阻抗均下降,超声衰减系数从2.51 dB/mm增大到5.34 dB/mm。孔隙率为1%时,厚度从2 mm (8层)增加到5 mm(20层),衰减系数增大了0.54 dB/mm。     

Nanoscale biofilm modification-method concerning a myoglobin/11-MUA bilayers for bioelectronic device

We developed surface modification tools for the fabrication of a bioelectronic device which consists of a myoglobin monolayer self-assembled on an 11-MUA layer. To utilize a single protein as the active element, it was necessary to reduce protein aggregation on the protein layer in the nanobio electronic device, which was developed in our previous study and shown to display basic biomemory functions. Here, the reduction of myoglobin aggregation was accomplished by using 3-(3-cholamidopropyl) dimethylammonio-11-propanesulfonate (CHAPS) to fabricate a well-defined protein layer on the bioelectronic device. We investigated two different surface modification methods for making well oriented biofilm. The effects of CHAPS on the formation of a myoglobin layer self-assembled on an 11-MUA layer were examined by atomic force microscopy and Raman spectroscopy. The size of the myoglobin aggregates was reduced from 200-250 nm to 10-40 nm depending on treatment method. The sustaining redox property of the CHAPS treated myoglobin layer was examined using cyclic voltammetry. Using these techniques, we found that after surfactant CHAPS treatment, protein aggregation was dramatically reduced and the protein layer still maintained its inherent electrochemical properties.     

The fabrication and optical property of silver nanoplates with different thicknesses

A new and facile method involving an ion milling technique to fabricate silver nanoplates with different thicknesses is introduced. The thickness of the silver nanoplates can be tuned from 70?to 10?nm by controlling the ion milling time. The experimental and calculated results demonstrate that this thickness control allows continuous tuning of the localized surface plasmon resonance wavelength of the silver nanoplates throughout the visible. This is highly beneficial for potential applications of silver nanoplates in the fields of biosensors and solar?cells.     

Organic memory capacitor device fabricated with Ag nanoparticles

In this study, it is demonstrated that an organic memory structure using pentacene and citrate-stabilized silver nanoparticles (Ag NPs) as charge storage elements on dielectric SiO2 layer and silicon substrate. The Ag NPs were synthesized by thermal reduction method of silver trifluoroacetate with oleic acid. The synthesized Ag NPs were analyzed with high resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) for their crystalline structure. The capacitance versus voltage (C-V) curves obtained for the Ag NPs embedded capacitor exhibited flat-band voltage shifts, which demonstrated the presence of charge storages. The citrate-capping of the Ag NPs was confirmed by ultraviolet-visible (UV-VIS) and Fourier transformed infrared (FTIR) spectroscopy. With voltage sweeping of +/-7 V, a hysteresis loop having flatband voltage shift of 7.1 V was obtained. The hysteresis loop showed a counter-clockwise direction. In addition, electrical performance test for charge storage showed more than 10,000 second charge retention time. The device with Ag NPs can be applied to an organic memory device for flexible electronics.     

CrN/AlN superlattice coatings synthesized by pulsed closed field unbalanced magnetron sputtering with different CrN layer thicknesses

CrN/AlN superlattice coatings with different CrN layer thicknesses were prepared using a pulsed closed field unbalanced magnetron sputtering system. A decrease in the bilayer period from 12.4 to 3.0 nm and simultaneously an increase in the Al/(Cr + Al) ratio from 19.1 to 68.7 at.% were obtained in the CrN/AlN coatings when the Cr target power was decreased from 1200 to 200 W. The bilayer period and the structure of the coatings were characterized by means of low angle and high angle X-ray diffraction and transmission electron microscopy. The mechanical and tribological properties of the coatings were studied using the nanoindentation and ball-on-disc wear tests. It was found that CrN/AlN superlattice coatings synthesized in the current study exhibited a single phase face-centered cubic structure with well defined interfaces between CrN and AlN nanolayers. Decreases in the residual stress and the lattice parameter were identified with a decrease in the CrN layer thickness. The hardness of the coatings increased with a decrease in the bilayer period and the CrN layer thickness, and reached the highest value of 42 GPa at a bilayer period of 4.1 nm (CrN layer thickness of 1.5 nm, AlN layer thickness of 2.5 nm) and an Al/(Cr + Al) ratio of 59.3 at.% in the coatings. A low coefficient of friction of 0.35 and correspondingly low wear rate of 7 × 10^− 7 mm³N^− 1m^− 1 were also identified in this optimized CrN/AlN coating when sliding against a WC-6%Co ball.     

Single- and double-pass FSW lap joining of AA5456 sheets with different thicknesses

Friction stir welding of AA5456 aluminium alloy with different thicknesses was investigated for single- and double-pass lap joint configurations. The influences of tool tilt angle in first and second passes, and rotational and welding speeds in second pass on metallurgical structure and joint strength were studied. The results indicated that tilt angle significantly influences material flow and imperfection formation, and accordingly controls the weld mechanical properties. The best results were achieved by tilt angle of 5° for single pass, and tilt angle, rotational speed and traverse speed of 5°, 250?rev?min^??1 an 50?mm?min^??1 respectively for double-pass. The characteristics of hooking and cold lap defects were used as criteria to recognise the influence of processing conditions on joint performance.     

Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device

We demonstrated analog memory, synaptic plasticity, and a spike-timing-dependent plasticity (STDP) function with a nanoscale titanium oxide bilayer resistive switching device with a simple fabrication process and good yield uniformity. We confirmed the multilevel conductance and analog memory characteristics as well as the uniformity and separated states for the accuracy of conductance change. Finally, STDP and a biological triple model were analyzed to demonstrate the potential of titanium oxide bilayer resistive switching device as synapses in neuromorphic devices. By developing a simple resistive switching device that can emulate a synaptic function, the unique characteristics of synapses in the brain, e.g. combined memory and computing in one synapse and adaptation to the outside environment, were successfully demonstrated in a solid state device.     

Evaluating the strengths of thick aluminum-to-aluminum joints with different adhesive lengths and thicknesses

Composite joints are often the weakest elements in composite structures. In this paper, we propose a modified version of the damage zone theory based on the yield strain ratio. We use this framework to predict failure loads for various adhesive joints. Thick aluminum-to-aluminum joint specimens with eight different adhesive lengths and four adhesive thicknesses were manufactured and tested. The strengths of different adhesive lengths could be predicted to within 15.4% using the damage zone ratio method. In addition, the strengths of joints that feature different adhesive thicknesses were predicted to within 16.3% using the damage zone ratio method.