Physical modeling of GaAs MESFETs in an integrated CAD environment:from device technology to microwave circuit performance

The linkage between a physical device simulator for small- and large-signal characterization and CAD (computer-aided design) tools for both linear and nonlinear circuit analysis and design is considered. Efficient techniques for the physical DC and small-signal analysis of MESFETs are presented. The problem of physical simulation in a circuit environment is discussed, and it is shown how such a simulation makes possible small-signal models accounting for propagation and external parasitics. Efficient solutions for physical large-signal simulation, based on deriving large-signal equivalent circuits from small-signal analyses under different bias conditions, are proposed. The small- and large-signal characterizations allow physical simulation to be performed efficiently in a circuit environment. Examples and results are presented     

ARIADNE: A constraint-based approach to computer-aided synthesis and modeling of Analog integrated circuits

The ARIADNE approach to computer-aided synthesis and modeling of analog circuits is presented. It is a mathematical approach based on the use of equations. Equations are regarded as constraints on a circuit's design space and analog circuit design is modeled as a constraint satisfaction problem. To generate and efficiently satisfy constraints, advanced computational techniques such as constraint propagation, interval propagation, symbolic simulation, and qualitative simulation are applied. These techniques cover design problems such as topology construction, modeling, nominal analysis, tolerance analysis, sizing and optimization of analog circuits. The advantage of this approach is the clear separation of design knowledge from design procedures. Design knowledge is modeled in declarative equation-based models (DEBMs). Design procedures are implemented into general applicable CAD tools. The ARIADNE approach closely matches the reasoning style applied by experienced designers. The integration of synthesis and modeling into one frame and the clear separation of design knowledge from design procedures eases the process of extending the synthesis system with new circuit topologies, turning it into an open design system. This system can be used by both inexperienced and experienced designers in either interactive or automated mode.     

Circuit optimization: the state of the art

The authors review the current state of the art in circuit optimization, emphasizing techniques suitable for modern microwave CAD (computer-aided design). The main thrust in the field is currently the solution of realistic design and modeling problems, addressing such concepts as physical tolerances and model uncertainties. A unified hierarchical treatment of circuit models forms the basis of the presentation. It exposes tolerance phenomena at different parameter/response levels. The concepts of design centering, tolerance assignment, and postproduction tuning in relation to yield enhancement and cost reduction suitable for integrated circuits are discussed. Suitable techniques for optimization oriented worst-case and statistical design are reviewed. A generalized l_p centering algorithm is proposed and discussed. Multicircuit optimization directed at both CAD and robust device modeling is formalized. Tuning is addressed in some detail, both at the design stage and for production alignment. State-of-the-art gradient-based nonlinear optimization methods are reviewed with emphasis given to recent, but well tested, advances in minimax, l₁, and l₂ optimization     

CAD techniques for microwave circuits

In little more than 10 years computer-aided design (CAD) of microwave circuits has moved from dumb terminals on mainframe computers to PCs, and now to powerful RISC workstations. Commercial CAD software now integrates the various stages of microwave circuit design: schematic capture, simulation and layout. This paper reviews the different CAD packages that are available for microwave circuit design. The basic principles employed in the modelling of microstrip circuits are introduced and the reasons for the extensive use of frequency-domain simulations are explored. The developments in nonlinear, electromagnetic and system-level simulation methods are described     

统一的微波线性与非线性电路的分层求解法

叙述了统一的微波线性与非线性电路的分层求解法，讨论了适合于分层法的一种新型的块ＬＵ分解法，这种方法可以使运算速度成倍提高，并且可以用于任意拓扑结构的线性与非线性电路。     

State of the art and present trends in nonlinear microwave CADtechniques

The authors present a survey of modern nonlinear CAD (computer-aided design) techniques as applied to the specific field of microwave circuits. A number of fundamental aspects of the nonlinear CAD problem, including simulation, optimization, intermodulation, frequency conversion, stability, and noise, are addressed and developed. For each one it is shown that either well-established CAD solutions are available, or at least a solution approach suitable for implementation in a general-purpose CAD environment can be outlined. Also, the discussion shows that the various subjects are not just separate items, but rather can be chained in a strictly logical sequence. Finally, an elementary treatment of vector processing is given, to show that supercomputers can handle the involved large-size numerical problems efficiently     

Automated design optimization of integrated switching circuits

A computer program for the optimization of switching circuits with practical design constraints such as limits and interdependencies of circuit parameter values has been developed. The approach implements a fast nonlinear analysis program and a Fletcher-Powell minimization algorithm. An effective parameter perturbation scheme approximates the gradient of the performance index. The use of parameter transformation to handle practical limits on circuit parameters, and penalty functions to incorporate such design constraints as limits on power dissipation, node voltages, and transistor area is described. The optimization of a bipolar decoder and a 3-transistor MOS memory cell are presented as examples.     

Large signal design of broadband monolithic microwave frequencydividers and phase-locked oscillators

This paper presents a design method for phaselocked devices such as frequency dividers or injection-locked oscillators. The method requires a full nonlinear analysis of the circuit. This analysis relies upon harmonic balance techniques and is suitable for monolithic circuits simulation. First, a modified formulation of the general harmonic balance equation is proposed which includes the presence of probes. These probes allow us to suppress the degenerated solution of the HB equation in autonomous cases. Moreover, a global stability analysis of phaselocked regimes is carried out. It provides invaluable information on the nonlinear behavior of the device. In particular, synchronization bandwidths as well as power ranges for which the circuit can be synchronized are obtained from the stability loci drawn in the parameter space. All these features have been used to design a broadband monolithic frequency divider, and the simulated and experimental results have been compared with very good accuracy. Therefore, the method proposed is a very useful tool for the design of potentially unstable circuits     

Modular analysis and design of log-domain circuits based on LIN↔ELIN transformations

We systematized and developed some procedures for the modular design of externally-linear internally nonlinear (ELIN) circuits resulting in a general LIN↔ELIN transformation procedure. This one was also extended to analysis of these types of circuits. The procedure is exemplified on log-domain circuits. In the design one starts with the linear block diagram (LIN) described by transfer functions and one substitutes directly each linear building block by a corresponding nonlinear one. The parameters of each nonlinear component depend on the given parameters of its linear correspondent. Input F ⁻¹ and output F blocks are added. In the analysis one identifies the nonlinear basic circuit components and each of them is substituted by its corresponding linear building block. Input and output F ⁻¹-F cells are removed. The ideal transfer function can be calculated on the linear block diagram now. The LIN↔ELIN transformations make a direct connection between equivalent linear and ELIN circuits, simplify their design and analysis procedures and permit the development of CAD procedures.     

Hybrid S-Parameters for Transmission Line Networks With Linear/Nonlinear Load Terminations Subject to Arbitrary Excitations

We propose a generalized S-parameter analysis for transmission lines (TLs) with linear/nonlinear load terminations subject to arbitrary plane-wave and port excitations. S-parameters are prevalently used to model TLs such as cable bundles and interconnects on printed circuit boards (PCBs) subject to port excitations. The conventional S-parameter approach is well suited to characterize interactions among ports. However, nontraditional port excitations associated with plane-wave coupling to physical ports at TL terminals lead to forced, as well as propagating, modal waves, necessitating a modification of the standard S-parameter characterization. In this paper, we consider external plane-wave excitations, as well as port (internal) sources, and propose a hybrid S-parameter matrix for characterization of the associated microwave network and systems. A key aspect of the approach is to treat the forced waves at the ports as constant voltage sources and induced propagating modal waves as additional entries (hybrid S-parameters) in the S-parameter matrix. The resulting hybrid S-matrix and voltage sources can be subsequently exported to any circuit solver such as HSPICE and Agilent's Advanced Design System for the analysis of combined linear and nonlinear circuit terminations at ports. The proposed method is particularly suited for susceptibility analysis of cable bundles and PCBs for electromagnetic interference evaluations. It also exploits numerical techniques for structural and circuit domain characterization and allows for circuit design optimization without a need to perform any further computational electromagnetic analysis     

Nonlinear lumped circuit model of GaAs MESFET

A nonlinear lumped Circuit model for GaAs MESFET which includes the effect of Gunn-domain formation under the gate, mobility modulation, and diffusion process in the channel boundary is presented. The important design parameters such as Cin,g_{m}, I_{dsat}, and Ft, etc. can be derived from the model. The model not only predicts realistically the nonlinearI-Vcharacteristics, but it also provides a closed form design criterion for avoiding instability due to Gunn oscillation. Moreover, a small-signal Circuit model having the same basic circuit structure as the existing empirical small-signal model in [2], [10], [14] can be derived from this nonlinear model. In addition, a two-segment piecewise-linear dc model is derived. This piecewise-linear model contains only four model parameters which can be determined very easily by measurement. Because of its simplicity, this model can be implemented into any CAD system to simulate complex circuits with significantly less CPU time. The simulation results are in excellent agreement with experimental data, and with results obtained by a much more time-consuming two-dimensional calculation.     

Generalized Simulation-Based Posynomial Model Generation for Analog Integrated Circuits

This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. Both the coefficient set as well as the exponent set of the posynomial expression, for some performance as a function of the design variables, are determined based on performance data extracted from SPICE simulation results with device-level accuracy. Techniques from design of experiments (DOE) are used to generate an optimal set of sample points to fit the models. We will prove that the optimization problem formulated for this problem typically corresponds to a non-convex problem, but has no local minima. The presented method is capable of generating posynomial performance expressions for both linear and nonlinear circuits and circuit characteristics. This approach allows to automatically generate an accurate sizing model that can be used to compose a geometric program that fully describes the analog circuit sizing problem. The automatic generation avoids the time-consuming nature of hand-crafted analytic model generation. Experimental results illustrate the capabilities of the presented modeling technique.     

Γ (Gamma): A SaaS-enabled fast and accurate analog design System

With ever increasing demand for lower power consumption, lower cost, and higher performance, designing analog circuits to meet design specifications has become an increasing challenging task, Analog circuit designers must, on one hand, have intimate knowledge about the underlining silicon process technology׳s capability to achieve the desired specifications. They must, on the other hand, understand the impact of tweaking circuits to satisfy a given specification on all circuit performance parameters. Analog designers have traditionally learned to tackle design problems with numerous circuit simulations using accurate circuit simulators such as SPICE, and have increasingly relied on trial-and-error approaches to reach a converging point. However, the increased complexity with each generation of silicon technology and high dimensionality of searching for solutions, even for some simple analog circuits, have made the trial-and-error approach extremely inefficient, causing long design cycles and often missed deadlines. Novel rapid and accurate circuit evaluation methods that are tightly integrated with circuit search and optimization methods are needed to aid design productivity.Furthermore, the current design environment with fully distributed licensing and supporting structures is cumbersome at best to allow efficient and up-to-date support for design engineers. With increasing support and licensing costs, fewer and fewer design centers can afford it. Cloud-based software as a service (SaaS) model provides new opportunities for CAD applications. It enables immediate software delivery and update to customers at very low cost. SaaS tools benefit from fast feedback and sharing channels between users and developers and run on hardware resources tailored and provided for them by the software vendor. On the downside, web-based tools are expected to perform in a very short turn-around schedule and be always responsive.This paper presents a list of innovations that come together to a new class of analog design tools: 1). Lookup table-based approach (LUT) to model complex transistor behavior provides both the necessary accuracy and speed essential for repeated circuit evaluations. 2). The proposed system architecture tight integrate the novel LUT approach with novel system level functions to allow further significantly better accuracy/speed tradeoff and faster design convergence with designer׳s intent. 3). Incorporating use inputs at key junctures of the design process allows the tool to better capture designer׳s intent and improve design convergence. 4). The combination of high accuracy and faster evaluation time make it possible to incorporate SaaS features, such as short solution space navigation steps and crowdsourcing, into the tool. This allows sharing of server-side resources between many users. Instead of fully automating a signoff circuit optimization process, the proposed tool provides effective aid to analog circuit designers with a dash-board control of many important circuit parameters with several orders faster in computation time than SPICE simulations.     

A practical methodology for the statistical design of complex logicproducts for performance

Contradictory trends in the industrial design environment have increased uncertainty while decreasing the tolerance to uncertainty. Worst case design techniques, still widely used in industry, do not provide the accuracy required to design under these conditions. On the other hand, statistical design techniques do provide a significant improvement in accuracy, by virtue of their “circuit adaptive” behavior, but at a substantial cost in computational effort. One practical solution to improving the accuracy of worst case design without sacrificing efficiency is considered here. It integrates an efficient statistical circuit simulator with worst case design tools into a hierarchical performance design process. It employs two stages of worst case analysis, calibrated with statistical circuit simulation, serving as filters to screen out circuits that easily meet their performance requirements. This focuses the use of statistical circuit simulation on those circuits for which the improved accuracy provides significant benefit. This methodology has been applied with outstanding results in design and manufacturing     

Computationally efficient large-change statistical analysis of linear electronic circuits

A new method is presented for efficient statistical analysis of linear electronic circuits, when small and large parameter tolerances are given. The statistically generated value of the parameter is considered as a faulted value, as it deviates from the nominal thus enabling the application of a simulation method which uses a new approach of concurrent fault simulation. This method adds new elements to the circuit, representing individual parameter increments, while keeping the topology of the original one. The equations for the original and several perturbed circuits are formulated and solved simultaneously. In this way, redundant computations are avoided in both the equation formulation and equation solving phases, which shorten the simulation time. A statistical frequency and time domain tolerance simulator of linear circuits was developed on the basis of this method with effective user-friendly interface. The method is especially suited for yield sensitivity to some selected circuit parameters estimation. Here simulation results of several benchmark circuits are presented. Efficiency analysis is also included.     

A Fuzzy Optimization Approach for Variation Aware Power Minimization During Gate Sizing

Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact on the yield of the integrated circuits and need to be considered early in the design flow. Traditional corner based deterministic methods are no longer effective and circuit optimization methods require reinvention with a statistical perspective. In this paper, we propose a new gate sizing algorithm using fuzzy linear programming in which the uncertainty due to process variations is modeled using fuzzy numbers. The variations in gate delay which is a function of the gate sizes and the fan-outs of the gates are represented using triangular fuzzy numbers with linear membership functions. Initially, as a preprocessing step for fuzzy optimization, we perform deterministic optimizations by fixing the fuzzy parameters to the worst and the average case values, the results of which are used to convert the fuzzy optimization problem into a crisp nonlinear problem. The crisp problem with delay and power as constraints is then formulated to maximize the robustness, i.e., the variation resistance of the circuit. The fuzzy optimization approach was tested on ITC'99 benchmark circuits and the results were validated for timing yield using Monte Carlo simulations. The proposed approach is shown to achieve better power reduction than the worst case deterministic optimization as well as the stochastic programming based gate sizing methods, while having comparable runtimes.     

A new macromodeling approach for nonlinear microwave circuits basedon recurrent neural networks

A new macromodeling approach is developed in which a recurrent neural network (RNN) is trained to learn the dynamic responses of nonlinear microwave circuits. Input and output waveforms of the original circuit are used as training data. A training algorithm based on backpropagation through time is developed. Once trained, the RNN macromodel provides fast prediction of the full analog behavior of the original circuit, which can be useful for high-level simulation and optimization. Three practical examples of macromodeling a power amplifier, mixer, and MOSFET are used to demonstrate the validity of the proposed macromodeling approach