Monolithic AlAs-InGaAs-InGaP-GaAs HRT-FETS with PVCR of 960 at 300 K

This letter reports the significant N-shaped negative-differential resistance characteristics with three-terminal controllability of a monolithic heterostructure resonant tunneling field-effect transistor, realized by integrating the AlAs-In/sub 0.25/Ga/sub 0.75/As-AlAs double-barrier single-well resonant tunneling (RT) structure into the drain regime of the In/sub 0.49/Ga/sub 0.51/P-In/sub 0.25/Ga/sub 0.75/As-GaAs /spl delta/-high-electron mobility transistor. A peak-to-valley current ratio in excess of 960 at room temperature has been demonstrated, with a peak current density (J/sub p/) of 50.6 mA/mm, and a valley current density (J/sub v/) of 52.7 /spl mu/A/mm, respectively, with a transistor gate length of 1.0 /spl mu/m. The maximum current drive density was observed to be 478 A/mm-cm/sup 2/.     

Novel resonant tunneling transistor with high transconductance atroom temperature

A resonant tunneling transistor (RTT) utilizing a novel heterodimensional Schottky gate technology is described. The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two dimensional electron accumulation layer which forms above the source barrier under drain-source bias. Room temperature transistor characteristics included a peak current of 225 mA/mm and peak transconductance of 218 mS/mm. The ultrafine fabrication process is also discussed     

Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic

Quantum-effect devices utilizing resonant tunneling are promising candidates for future nano-scale integration. Originating from the technological progress of semiconductor technology, circuit architectures with reduced complexity are investigated by exploiting the negative-differential resistance of resonant tunneling devices. In this paper a resonant tunneling device threshold logic family based on the Monostable-Bistable Transition Logic Element (MOBILE) is proposed and applied to different parallel adder designs, such as ripple carry and binary carry lookahead adders. The basic device is a resonant tunneling transistor (RTT) composed of a resonant tunneling diode monolithically integrated on the drain contact layer of a heterostructure field effect transistor. On the circuit level the key components are a programmable NAND/NOR logic gate, threshold logic gates, and parallel counters. The special properties of MOBILE logic gates are considered by a bit-level pipelined circuit style. Experimental results are presented for the NAND/NOR logic gate.     

A vertical resonant tunneling transistor for application in digitallogic circuits

A vertical resonant tunneling transistor (VRTT) has been developed, its properties and its application in digital logic circuits based on the monostable-bistable transition logic element (MOBILE) principle are described. The device consists of a small mesa resonant tunneling diode (RTD) in the GaAs/AlAs material system surrounded by a Schottky gate. We obtain low peak voltages using InGaAs in the quantum well and the devices show an excellent peak current control by means of an applied gate voltage. A self latching inverter circuit has been fabricated using two VRTTs and the switching functionality was demonstrated at low frequencies     

肖特基栅型共振隧穿晶体管的制作研究

已研制成了肖特基栅共振隧穿晶体管,在双势垒结构上蒸发铂金形成栅。通过调制准二维电子积累层的面积进而达到控制隧穿电流的目的。并对发射极正反接电压不同而出现的不同调制现象进行了分析。     

A model for the resonant tunneling semiconductor-controlled rectifier

A new switch called a resonant-tunneling-semiconductor-controlled rectifier (RT-SCR) has been proposed. A two-transistor model is used for the device. One of the transistors in the two-transistor model is assumed to be a resonant tunneling transistor (RTT), while the other transistor is taken to be a bipolar transistor. The current–voltage relationships of the device have been numerically obtained and compared with the traditional thyristor characteristics. The new device requires smaller turn-on gate voltage than a comparable traditional device for the same gate current. This indicates that in comparison with the traditional thyristor, a smaller control current may be used to turn on the device at a particular voltage.     

Realization of a resonant tunneling permeable base transistor withoptimized overgrown GaAs interfaces

A resonant tunneling permeable base transistor has been realized experimentally by overgrowing a tungsten grating placed in direct vicinity to a double barrier heterostructure. In this way, we can directly modulate the tunneling current via an embedded gate. Since the quality of the overgrown interface is critical, special attention is paid to this issue, and the effect of different wet etchants prior to overgrowth is studied both by electrical measurements and by the use of an atomic force microscope. A clear dependence of the electrical properties and the crystal quality on the etchants used is found. This is a key result for the realization of our resonant tunneling device     

Resonant tunneling transistors with controllable negative differential resistances

Three-terminal devices based on resonant tunneling through two quantum barriers separated by a quantum well are presented and analyzed theoretically. Each proposed device consists of a resonant tunneling double barrier heterostructure integrated with a Schottky barrier field-effect transistor configuration. The essential feature of these devices is the presence, in their output current-voltage (I_{D} - V_{D}) curves, of negative differential resistances controlled by a gate voltage. Because of the high-speed characteristics associated with tunnel structures, these devices could find applications in tunable millimeter-wave oscillators, negative resistance amplifiers, and high-speed digital circuits.     

肖特基栅共振隧穿三极管(SGRTT)的器件模拟

使用Atlas软件模拟了肖特基栅共振隧穿三极管。通过改变发射极长度、栅极金属和上层AlAs势垒的距离以及靠近AlAs势垒的GaAs层浓度,得到器件耗尽区边界以及所对应的I-V特性,由此分析和解释了器件结构参数对器件特性的影响,最后对器件在电路中的应用予以说明。     

Design and simulation of a novel GaN based resonant tunneling high electron mobility transistor on a silicon substrate

For the first time, we have introduced a novel GaN based resonant tunneling high electron mobility transistor (RTHEMT) on a silicon substrate. A monolithically integrated GaN based inverted high electron mobility transistor (HEMT) and a resonant tunneling diode (RTD) are designed and simulated using the ATLAS simulator and MATLAB in this study. The 10% Al composition in the barrier layer of the GaN based RTD structure provides a peak-to-valley current ratio of 2.66 which controls the GaN based HEMT performance. Thus the results indicate an improvement in the current-voltage characteristics of the RTHEMT by controlling the gate voltage in this structure. The introduction of silicon as a substrate is a unique step taken by us for this type of RTHEMT structure.     

基于肖特基栅共振隧穿三极管的器件模拟与实验分析

通过流片,制作出肖特基栅共振隧穿三极管(SGRTT).根据ATLAS软件的模拟发现,当发射极接地, 集电极接外加偏压时,栅极电压对于SGRTT的电流起到明显的控制作用.当集电极接地,栅极电压会主要影响峰值电压,其原因是栅极电压和发射极、集电极的电场分布将会改变耗尽区的分布.实验测试结果对这种现象也予以证实.     

基于肖特基栅共振隧穿三极管的器件模拟与实验分析

通过流片,制作出肖特基栅共振隧穿三极管（SGRTT） .根据ATLAS软件的模拟发现,当发射极接地,集电极接外加偏压时,栅极电压对于SGRTT的电流起到明显的控制作用.当集电极接地,栅极电压会主要影响峰值电压,其原因是栅极电压和发射极、集电极的电场分布将会改变耗尽区的分布.实验测试结果对这种现象也予以证实.     

栅型共振隧穿晶体管的设计与研制

在研制RTD经验的基础上设计并研制成功栅型GaAs基共振隧穿晶体管(GRTT).文中对该器件的材料结构设计、器件结构设计、光刻版图设计、器件制作、参数测量与分析等进行了系统的描述.所研制出的GRTT最大PVCR为46,最大跨导为8mS,为进一步改善器件性能和参数奠定了基础.     

RTD/HEMT多值逻辑(MVL)电路的PSPICE模拟

由共振隧穿二极管(RTD)与高电子迁移率晶体管(HEMT)相并联组成的结构是构成当前RTD高速数字电路常用的基本单元。由于RTD的负阻、双稳和自锁特性,由RTD/HEMT组成的逻辑电路可以大大减少器件的数目,用最少的器件完成一定的逻辑功能。本文对多值逻辑(MVL)中的文字逻辑门用PSPICE模拟软件进行了电路模拟,模拟结果与预期结果一致,并有助于指导该电路的设计。     

A flexible logic circuit based on a MOS-NDR transistor in standard CMOS technology

A MOS-NDR (negative differential resistance) transistor which is composed of four n-channel metaloxide-semiconductor field effect transistors (nMOSFETs) is fabricated in standard 0.35 μm CMOS technology.This device exhibits NDR similar to conventional NDR devices such as the compound material based RTD (resonant tunneling diode) in current-voltage characteristics.At the same time it can realize a modulation effect by the third terminal.Based on the MOS-NDR transistor,a flexible logic circuit is realized in this work,which can transfer from the NAND gate to the NOR gate by suitably changing the threshold voltage of the MOS-NDR transistor.It turns out that MOSNDR based circuits have the advantages of improved circuit compaction and reduced process complexity due to using the standard IC design and fabrication procedure.     

新型电子器件和光学器件的共振隧穿结构

描述了一种新型共振隧穿结构器件，这种器件包含了通过可变间隙超晶格能量滤波器（ＶＳＳＥＦ）中的耦合量子附态的隧穿过程．论证了通过ＡｌＡｓ／ＧａＡｓＶＳＳＥＦ器件高能态和ＡｌＧａＡｓ／ＧａＡｓ超晶格受激态的共振隧穿，描述了这种器件作为较高功率微波源和共振隧穿晶体管的应用，并讨论了共振隧穿结构作为雪崩探测器和红外发射器等光学器件的潜在应用．     

Coupled-quantum-well field-effect resonant tunneling transistor formulti-valued logic/memory applications

A vertical field-effect resonant tunneling transistor is demonstrated consisting of a triple-barrier, double-well resonant tunneling diode (3bRTD) that can be depleted by the action of side gates. The 3bRTD features a double peak current-voltage characteristic in which the second valley current is less than the first valley current. Combination of the resonant tunneling transistor and a constant current load is shown to yield both binary and ternary logic and memory functions     

Logic synthesis and circuit modeling of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices

The circuit concept of programmable logic gates based on the controlled quenching of series-connected negative differential resistance (NDR) devices is introduced, along with the detailed logic synthesis and circuit modeling. At the rising edge of a clocked supply voltage, the NDR devices are quenched in the ascending order of peak currents that can be reordered by the control gates and input gates biases, thus, providing programmable logic functions. The simulated results agree well with the experimental demonstration of the programmable logic gate fabricated by a monolithic integrated resonant tunneling diode/high electron mobility transistor technology.     

Direct tunneling gate current model for symmetric double gate junctionless transistor with SiO2/high-k gate stacked dielectric

A junctionless transistor is emerging as a most promising device for the future technology in the decananometer regime. To explore and exploit the behavior completely, the understanding of gate tunneling current is of great importance. In this paper we have explored the gate tunneling current of a double gate junctionless transistor(DGJLT) for the first time through an analytical model, to meet the future requirement of expected high-k gate dielectric material that could replace SiO₂. We therefore present the high-k gate stacked architecture of the DGJLT to minimize the gate tunneling current. This paper also demonstrates the impact of conduction band offset, workfunction difference and k-values on the tunneling current of the DGJLT.     

Design, fabrication and operation of a hot electron resonant tunneling transistor

Transistors employing resonant tunneling injection of hot electrons into a thin quantum well base region have been fabricated. The base region in these transistors is formed by a narrow bandgap material like InGaAs so that the first level is a confined one lying below the Fermi level in the contact regions. This results in charge transfer into the bound state in the quantum well thus allowing independent control of the base electrostatic potential. Theoretical calculations showing the importance of various device parameters in the design of a resonant tunneling transistor are presented and preliminary results showing the capability of transistor action in such devices are presented.