Multi-walled carbon nanotube growth on oxidized silicon substrates using cyclohexane precursor by chemical vapor deposition

Randomly oriented multi-walled nanotubes (MWNTs) are grown by a thermal chemical vapor deposition (CVD) process from cyclohexane precursor on a 20% copper-80% nickel (Cu-Ni) catalyst on oxidized silicon substrates. This combination of precursor and catalyst, to our knowledge, has been employed for the first time to demonstrate growth of multi-walled carbon nanotubes. The effects of annealing, gas ambient and catalyst layer thickness on the morphology of the grown carbon layers are discussed. The low resistivity values of the MWNTs grown on oxidized silicon substrates are attractive for their potential use in photonic devices and display applications.     

Viscoelastic wrinkling in compression-stressed metal film-polymer sublayer system

The laws of corrugation (wrinkling) that takes place in thin aluminum films on silicon substrates with styrene sublayers under the conditions of thermal treatment have been studied using atomic force microscopy techniques. Measurements of the amplitude and period (wavelength) of wrinkles revealed stages in the viscoelastic corrugation process at various temperatures. It is established that the evolution of wrinkles in the course of annealing is controlled by the periodic distribution of normal and tangential stresses at the film-sublayer interface.     

Spiral patterns of gold nanoclusters in silicon (100) produced by metal vapour vacuum arc implantation of gold ions

Self-assembled gold nanoclusters are attractive building blocks for future nanoscale sensors and optical devices due to their exciting catalytic properties. In this work, we report direct bottom-up synthesis of spiral patterns of gold nanoclusters in silicon (100) substrates by Au ion implantation followed by thermal annealing. This unique phenomenon is observed only above a critical threshold implantation dose and annealing temperature. Systematic study by electron microscopy, analytical x-ray diffraction and atomic force microscopy shows the temperature-?and time-dependent nucleation, growth of Au nanoclusters and evolution of the spiral patterns. The observed patterns of gold nanoclusters bear a resemblance to the spiral growth prevalent in some directionally solidified eutectic alloys. Based on this systematic study of the growth and morphology of nanoclusters, a tentative model has been proposed for the formation mechanism of this unusual self-assembled pattern in an amorphous Si/Au system. This model shows that melting of the implanted layer is essential and without which no spiral patterns are observed. A better understanding of this self-assembly process will open up new ways to fabricate ordered arrays of gold nanoclusters in silicon substrates for seeding selective growth of one-dimensional nanostructures.     

铝诱导晶化P型非晶硅薄膜实验研究

利用PECVD设备在普通玻璃基片上沉积硼掺杂P型非晶硅薄膜,采用铝诱导晶化法（AIC）在氮气气氛保护下进行退火处理制备出P型多晶硅薄膜,研究了不同厚度的金属铝膜和热处理温度对非晶硅薄膜的微观结构、表面形貌的影响。实验结果表明：铝膜相对厚度越厚,对a—Si的晶化诱导效果则越好,在一定温度条件下,相对较厚的铝膜可以缩短a—Si晶化为polv-Si的时间,并且能使a—Si的晶化更加完整,产生尺寸较大的硅晶颗粒。在铝膜厚度相同,退火温度相同的条件下,热处理的时间越长,则晶化发生的程度越深,晶化越为彻底。     

Insulating properties of rapid thermally processed Bi2Ti2O7 thin films by a chemical solution decomposition technique

Crack-free Bi₂Ti₂O₇ thin films on silicon substrates were prepared using chemical solution decomposition technique, and then treated by rapid thermal annealing. The microstructure of the films was studied by scanning electron microscopy. The effects of different fabricating procedures and various annealing temperatures and times on the leakage current density were investigated. The results show that the leakage current density decreases with increasing annealing temperature, while increases with increasing annealing time. Annealing temperature has a much stronger effect on the insulating properties of Bi₂Ti₂O₇ thin films than that of annealing time.     

TSV转接板硅通孔的热应力分析

硅通孔(TSV)技术作为实现三维(3D)封装的关键而被广泛关注。该文研究了在温度载荷作用下TSV转接板上铜和硅的应力状态,给出了通孔为完全填充铜和部分填充铜两种情况下的应力解析解,并讨论了孔距对转接板应力的影响。建立了TSV转接板的二维有限元模型,并用于验证解析解的适用性。结果表明：当TSV孔距达到孔直径的3倍以上时,解析解可以给出准确的转接板上铜和硅的应力结果;通过减薄镀铜层可以减小硅上的应力;转接板上应力与加载的温度变化成线性关系。     

Surface blistering of low-temperature annealed hydrogen and helium co-implanted silicon and its application to splitting of bonded wafer substrates

Applications involving transfer of pre-processed silicon layers to substrates of different material often requires a restricted thermal budget. In the case of thermal splitting of hydrogen and helium implanted bonded wafer substrates this can mean restricting temperatures within the range 250-400 °C depending on application. The present study investigates the phenomenon of blistering of implanted substrates as a precursor to thermal splitting following annealing over this temperature range. Optical microscopy was used to detect blister initiation temperature and TEM to show details of sub-surface processes. Results showed that plots of Ln(time) v. blister initiation temperature consisted of several straight-line regions yielding an activation energy for each region. TEM showed strain lines extending to the surface and the development of voiding at the platelet line and between the platelet line and sample surface. The results suggest that the movement of He and its interaction with vacancy complexes plays an important role during annealing. Hydrogen and helium co-implanted silicon wafers bonded to oxide-coated silicon wafers were thermally split at a temperatures between 280 and 300 °C yielding a pinhole-free silicon-on-oxide (SOI), layer of about 460 nm with an RMS roughness measured by AFM in the range 3-6 nm rms.     

Preparation of ceria films by spray pyrolysis method

The deposition of CeO₂ films on fused-silica substrates by spray pyrolysis of a water–ethanol solution of a cerium nitrate precursor has been studied. Polycrystalline films have been obtained at a substrate temperature of 300–450°C after annealing of the deposit in air at temperatures in the range 350–500°C. It has been established that the best uniform ceria films with nanometric scale grains are prepared at a substrate temperature of 400°C with 0.5 h annealing of the deposit at 500°C. At lower spraying temperatures large CeO₂ crystallites have been observed on the film surface along with the fine grains. When the substrate temperature exceeds 400°C, numerous cracks caused by thermal stresses appear in the films.     

光退火制备多晶硅薄膜与量子态模型

本文发现在用光退火制备多晶硅薄膜过程中退火温度、时间等与多晶硅薄膜晶粒大小等晶化性质符合量子态模型。并对其物理思想进行了分析。     

Surface blistering of low temperature annealed hydrogen and helium co-implanted germanium and its application to splitting of bonded wafer substrates

Applications involving transfer of germanium layers to silicon-based substrates often require a process involving a restricted thermal budget. The use of relatively low temperatures has a major advantage in reducing stresses when thermal splitting of implanted germanium wafers bonded to silicon-based substrates is used to create germanium-on-oxide (GeOI) layers. The present study investigates the phenomenon of blistering of hydrogen and helium co-implanted germanium over the temperature range 250–400 °C, optical microscopy being used to detect the initial appearance of the blisters. Results showed that plots of Ln(time) vs. blister initiation temperature consisted of several straight-line regions yielding an activation energy for each region. The plots showed similarities to those observed in previous work with silicon co-implanted and annealed under similar conditions. At temperatures below the blister initiation temperature, transmission electron microscopy (TEM), revealed the presence of spherical bubbles at a depth below the surface estimated to be approximately that of the hydrogen implant projected range. GeOI layers were produced by thermal splitting of co-implanted germanium wafers bonded to oxide-coated silicon substrates wafers at a temperature of 300 °C. The RMS roughness of the split germanium surface measured by atomic force microscopy (AFM) was about 11 nm averaged over the wafer surface. In addition there were isolated and randomly distributed regions of 27 nm roughness covering about 20% of the total surface area of the wafer.     

Grain growth mechanism in heavily arsenic-doped polycrystalline silicon

The mechanism of grain growth in heavily arsenic-doped polycrystalline silicon has been investigated by developing a kinetic model. A computer simulation technique has been used to determine the grain boundary self-diffusion of the silicon atoms and hence the grain size for different arsenic concentrations, annealing times and temperatures has been estimated. The evaluated numerical values are compared with the available experimental values. Using this model the grain size distribution in arsenic-doped polysilicon for various values of arsenic concentration, annealing time and temperature has been determined. The results are discussed in detail.     

Thermal Effects on the Crystallization Kinetics,and Interfacial Adhesion of Single-Crystal Phase-Change Gallium

Although substrates play an important role upon crystallization of supercooled liquids, the influences of surface temperature and thermal property have remained elusive. Here, the crystallization of supercooled phase-change gallium (Ga) on substrates with different thermal conductivity is studied. The effect of interfacial temperature on the crystallization kinetics, which dictates thermo-mechanical stresses between the substrate and the crystallized Ga, is investigated. At an elevated surface temperature, close to the melting point of Ga, an extended single-crystal growth of Ga on dielectric substrates due to layering effect and annealing is realized without the application of external fields. Adhesive strength at the interfaces depends on the thermal conductivity and initial surface temperature of the substrates. This insight can be applicable to other liquid metals for industrial applications, and sheds more light on phase-change memory crystallization.     

Thermal annealing behaviour of Si/SiO2 structures

The interaction of vacuum-deposited silicon films with the underlying oxide at annealing temperatures of 1050–1250°C was studied by means of low energy electron diffraction, Auger spectroscopy, IR spectroscopy, and optical and electron microscopy. The deposition of silicon onto SiO₂-covered silicon substrates and the annealing of the samples was carried out in ultrahigh vacuum. The results obtained revealed that the silicon and oxide layers are etched away by heat treatment. The dependence of the etching on the thickness of the silicon film, the thickness of the SiO₂ layer and the annealing temperature was determined. A qualitative model of the etching process is proposed.     

Reduction of the bulk absorption coefficient in silicon optics for high-energy lasers through defect engineering

We engineered a factor-of-4 reduction in the bulk absorption coefficient over the 2.6-to-3.0-μm bandwidth in single-crystal Czochralski silicon optics for high-energy infrared lasers with high-temperature annealing treatments. Defect engineering adapted from the integrated circuit industry has been used to reduce the absorption coefficient across the 1.5-to-5-μm bandwidth for substrates up to 5 cm thick. A high-temperature oxygen-dispersion anneal dissolves precipitates and thermal donors that are present in the as-grown material. The process has been verified experimentally with Fourier transform infrared spectroscopy, infrared laser calorimetry, and Hall measurements. Reduction of the absorption coefficient results in less substrate heating and thermal distortion of the optical surface. The process is appropriate for other silicon infrared optics applications such as thermal-imaging systems, infrared windows, and spectrophotometers.     

Effect of the initial structure on the electrical property of crystalline silicon films deposited on glass by hot-wire chemical vapor deposition

Crystalline silicon films on an inexpensive glass substrate are currently prepared by depositing an amorphous silicon film and then crystallizing it by excimer laser annealing, rapid thermal annealing, or metal-induced crystallization because crystalline silicon films cannot be directly deposited on glass at a low temperature. It was recently shown that by adding HCI gas in the hot-wire chemical vapor deposition (HWCVD) process, the crystalline silicon film can be directly deposited on a glass substrate without additional annealing. The electrical properties of silicon films prepared using a gas mixture of SiH4 and HCl in the HWCVD process could be further improved by controlling the initial structure, which was achieved by adjusting the delay time in deposition. The size of the silicon particles in the initial structure increased with increasing delay time, which increased the mobility and decreased the resistivity of the deposited films. The 0 and 5 min delay times produced the silicon particle sizes of approximately 10 and approximately 28 nm, respectively, in the initial microstructure, which produced the final films, after deposition for 300 sec, of resistivities of 0.32 and 0.13 Omega-cm, mobilities of 1.06 and 1.48 cm2 V(-1) S(-1), and relative densities of 0.87 and 0.92, respectively.     

The effects of substrates on the thin-film structures of BaTiO3

Barium titanate (BaTiO₃) thin films prepared on magnesia, silicon and strontium titanate substrates by r.f. sputtering has been investigated. As a function of substrate and annealing temperatures, the crystal structure and shape were examined by X-ray diffraction and scanning electron microscopy. Thin films were grown on both MgO and silicon substrates; they were amorphous when deposited on MgO if the substrate temperature was less than 450 °C, while for those grown on silicon the temperature had to be less than 500 °C. Above these elevated temperatures, the films were crystalline, with cubic symmetry. After annealing the thin films on magnesia, the crystal structure changed from cubic to tetragonal phase above 1100 °C; thebe c-axis or annealing thus caused the grain growth of the BaTiO₃. The thin films on SrTiO₃ were found toc-axis oriented tetragonal films for a substrate temperature above 500 °C.     

Elevated temperature X-ray measurement of residual stresses in a fibre reinforced Al alloy

Thermal residual stresses have been measured using X-ray diffraction in an Al-2% Mg matrix with 10, 20 or 26 vol % Al₂O₃ short fibres. Stress measurements were made at room temperature as well asin situ at elevated temperatures up to 250?C. The thermal stresses arise due to the difference in coefficient of thermal expansion (CTE) between the matrix and the reinforcement. The largest CTE is found in the matrix, resulting in tensile residual stresses after a temperature drop, e.g. after processing or annealing. A high fraction of reinforcement implies higher matrix stresses than a low fibre content. The stresses decrease with increasing temperature for all fibre volume fractions. Measurements are compared with calculations using a modified Eshelby model for equivalent inclusions. Parameters taken into account in the model are coefficient of thermal expansion, Young's modulus, and volume fraction and geometric shape of the reinforcing phase. A good correlation between calculations and experimental results has been found, bearing in mind that no plasticity is taken into account in the Eshelby model. The plastic behaviour of the composites has been described using a model based on a rigid spherical cavity in an elastic-plastic matrix.     

Thermal effects on the microstructure and mechanical properties of ion implanted ceramics

The effects of varying the substrate temperature on the implantation-induced structures and surface mechanical properties of single crystal sapphire and MgO have been investigated for a range of 300 keV implanted ions. As the implantation temperature is lowered, the dose at which amorphization occurs is reduced and thus, for the same doses, more amorphous material is produced at lower temperatures. Quantitative modelling shows that the activation energy for annealing of the amorphous material during implantation is very much lower than might be expected for post-implantation thermal annealing of the same material. Also, as the implantation temperature increases there is a small amount of damage annealing in the damaged-but-crystalline material.Both the microhardness and implantation-induced stresses depend critically on the presence of amorphous material since this is relatively soft and can support only small stresses. However, while the hardness behaviour in the damaged-but-crystalline material is dominated by radiation hardening, the substitutionality, ionic misfit and charge state of the implanted ions have also been found to contribute to the further solid solution component of the hardening produced by ion implantation. These effects are also observed to be temperature dependent. Crazing of the implanted layers has also been reappraised. It has been established that the formation and configuration of crazes is a sensitive function of implantation temperature, and it is now proposed that crazes form in response to the stresses generated as a result of the thermal expansion mismatch between the amorphous layer and the substrate.     

溶胶—凝胶法制备TiO2—SiO2复合薄膜的研究

采用溶胶－凝胶方法在单晶Ｓｉ基片上制备了ＴｉＯ２－ＳｉＯ２复合薄膜，研究了溶剂、ｐＨ值对先体溶液成胶时间的作用，溶液的浓度、甩胶时的旋转速度、涂覆层数以及热处理温度对薄膜厚度、光学性能的影响。薄膜的折射率随温度增大，其主要贡献来自于薄膜中结构的变化。并测量了薄膜的Ｉ－Ｖ、Ｃ－ｆ特性，由于薄膜中的热击穿效应而使得ＴｉＯ２含量较高的薄膜２的Ｉ－Ｖ呈非线性变化。     

Study of the delamination of diamond coatings under thermal stress

The influence of the thickness of CVD diamond coatings on the adhesion to a substrate, after cooling down from deposition temperature to room temperature, has been studied experimentally and theoretically. Diamond layers have been deposited at 850°C on W substrates by microwave plasma enhanced CVD. Cooling down of the substrate-diamond coating system to room temperature induces thermal stresses, due to different thermal expansion coefficients of coating and substrate. For thick diamond coatings a total and sudden delamination could be observed as a consequence of these stresses. On the contrary thin coatings, produced under identical circumstances, adhered well. These phenomena have been modelled and explained by the use of an energetic criterion for the delamination of a two-layer system under thermal stress. From the model a critical thickness of the coating can be calculated. Above this critical thickness, delamination will suddenly occur. The calculations also predict that for intermediate coating thicknesses delamination can easily be induced by external causes.