Nonlinear source and drain resistance in recessed-gateheterostructure field-effect transistors

We have profiled the parasitic source and drain resistances versus current in recessed-gate HFET's with heavily-doped caps, using an InAlAs/n⁺-InP HFET as a vehicle. We observe a dramatic reduction in the parasitic resistances at moderate-to-high currents as significant current passes through the cap. Consequently, we note very little dependence in g, on the length of the extrinsic gate-source region. This is an experimental verification of predictions of two-layer models in the literature     

Theory of negative resistance of junction field-effect transistors

A general theory of the voltage-controlled negative resistance in a field-effect transistor is presented. The prerequisite to the negative resistance is mathematically determined as a relation among the source-gate voltage, the source-drain voltage, and the pinchoff voltage. It is suggested that there will be a variety of circuit configurations with the positive feedback function applied to the gate of the field-effect transistor. Three basic examples of the practical application of the theory are also given.     

Tunable contact resistance in double-gate organic field-effect transistors

A study of the contact resistance (R_sd) in pentacene-based double-gate transistors is presented. In top-contact transistors, as the negative bias of the additional top-gate bias is increased, R_sd decreases by over five orders of magnitude for small bottom-gate voltages. In bottom-contact transistors, R_sd is reduced by about ten times for all bias values, implying improved charge transport in all operating regimes. The different tunability of R_sd in top/bottom-contact transistors is attributed to different charge injection modulation by the coplanar/staggered top gate. Therefore, double-gate architecture offers a novel and effective approach to limit R_sd and its relevant impacts on organic transistor.     

Self-consistent modeling of resonant interband tunneling in bipolartunneling field-effect transistors

We present a model for the calculation of the tunneling current in resonant interband tunneling devices based on a transfer-Hamiltonian formalism. The model is fully self-consistent and includes electrons and both light and heavy holes. In particular, we show the viability of the bipolar tunneling field-effect transistor as a three-terminal multiple-NDR device with predicted currents reaching over 1000 A/cm² and theoretical peak-to-valley ratios up to 300     

Resonance detection of terahertz radiation in submicrometer field-effect GaAs/AlGaAs transistors with two-dimensional electron gas

Semiconductors - Resonance detection of terahertz radiation by submicrometer field-effect GaAs/AlGaAs transistors (with the gate length L = 250 nm) with two-dimensional electron gas in the channel...     

TIPS-triphenodioxazine versus TIPS-pentacene: Enhanced electron mobility for n-type organic field-effect transistors

A new soluble n-type material based on the 2,9-bis(triisopropylsilylethynyl)triphenodioxazine (TIPS-triphenodioxazine) has been designed as a quinonoid equivalent of TIPS-pentacene and synthesized using an innovative synthetic pathway. Both materials showed identical electronic affinities, intermolecular arrangements and thin film topographies. However, the TIPS-triphenodioxazine led to better performances than TIPS-pentacene in n-channel organic field-effect transistors (OFETs) evidencing the potentialities of this π-conjugated core in the field of organic electronics.     

Organic field-effect transistors for biosensing applications

Organic field-effect transistors (OFETs) with regioregular poly(3-hexylthiophene) (P3HT) have been designed and fabricated aiming at the lowest possible working point (i.e. the adjusted values of gate voltage and drain–source voltage) for the use as sensor in electrolytes. Using thermally grown silicondioxide with a thickness of 45 nm it has been possible to dramatically lower the gate potential. Even around one volt the channel current and its modulation are still large enough for detection with simple operational amplifiers.The experimental results indicate a strong dependence of the transistor performance on the solvent used for spin coating the organic film. A theoretical analysis based on an analytical model allowed us to relate the different behavior of the transistor to their mobility, which is in turn dependent on the density of traps. In the context of this paper the leakage currents – as a non-zero gate current – have been analyzed. The observed gate leakage currents of the electrode structures themselves as well as of the complete transistors can be well described by Fowler’s and Nordheim’s field enhanced tunneling.     

Four-terminal field-effect transistors for amplitude modulation

An amplitude modulator using a field-effect tetrode transistor (FETT) is investigated. The operation of the modulation circuit is based on the `linear mode' where the transconductance from one gate to the drain is a linear function of the bias signal at the other gate. Experimental result shows that the modulator has good linearity for RF application.     

A new approach to the theory and modeling of insulated-gate field-effect transistors

Consideration of basic charge relationships in the IGFET has led to a new formulation of the theory of the device which allows model characterization in a more general manner, and with greater accuracy, than previously achieved. The contribution of the mobile channel charge to the silicon surface potential, which is believed to have a significant influence on the device characteristics, is taken into account in this approach. Accurate device modeling is achieved over a very wide range of operation, extending from weak channel (subthreshold) to high level channel conditions. An important feature of the model is that it is expressed in terms of a constant effective channel mobility. Further, the current and charge relationships involved take the form of a single set of analytic closed-form expressions in terms of the terminal voltages for all conditions of device operation, and are thus appropriate for CAD implementation. The scope and accuracy of this approach to IGFET modeling are demonstrated by comparisons between measured and theoretical dc and small-signal characteristics for sample metal and silicon gate devices.     

Non-conventional metallic electrodes for organic field-effect transistors

We study micrometer-sized organic field-effect transistors with either Pd or NiFe metallic electrodes. Neither of these materials is commonly used in organic electronics applications, but they could prove to be particularly advantageous in certain niche applications such as organic spintronics. Using organic semiconductors with different carrier transport characteristics as active layer, namely n-type C60 fullerene and p-type Pentacene, we prove that Pd (NiFe) is a very suitable electrode for p- (n-) type semiconductors. In particular, we characterized devices with channel lengths in the order of the micrometer, a distance which has allowed us to evaluate the electronic behavior in a regime where the interfacial problems become predominant and it is possible to reach elevated longitudinal electric fields. Our experimental results agree well with a simple model based on rigid energy levels.     

Diamond thin-film recessed gate field-effect transistors fabricatedby electron cyclotron resonance plasma etching

A new technique for etching boron-doped homoepitaxial diamond films was used to fabricate mesa-isolated recessed gate field-effect transistors that operate at temperatures up to 350°C. The upper temperature range is limited by the gate leakage current. The room-temperature hole concentration and mobility of the diamond film active layer were 1.2×10¹³ cm^-3 and 280 cm ²/V-s, respectively. The maximum transconductance was 87 μS/mm at 200°C     

Subthreshold slope for insulated gate field-effect transistors

An explicit expression has been derived for the subthreshold slope of an insulated gate field-effect transistor. This expression is used to explore the influence of surface band-bending, gate insulator thickness, substrate doping, substrate bias, and temperature.     

Two-layer model for source resistance in selectively doped heterojunction transistors

Selectively doped heterojunction transistors (SDHT's) for high-speed circuits require very low parasitic resistance. The standard one-layer model used to characterize GaAs FET's is shown by experiment to be inadequate for SDHT's, and a two-layer model of parasitic resistance is introduced. Parameters are measured for present devices, and it is demonstrated that a heavily doped GaAs cap can reduce SDHT parasitic source resistance by 50 percent at T = 300 K. The effectiveness of various strategies for further improvement is also assessed.     

A lithographic process for integrated organic field-effect transistors

This paper reports a photolithographic process for fabricating organic field-effect transistors which provides two layers of metal with arbitrary via placement, and optionally allows for subtractive lithographic patterning of the transistor active layer. The demonstrated pentacene transistors have a field-effect mobility of 0.1/spl plusmn/0.05 cm/sup 2//(V/spl middot/s). Parylene-C is used both as the gate dielectric and an encapsulation layer which allows for subtractive lithographic patterning. Also demonstrated is a PMOS inverter without level shifting circuitry and level-restoring V/sub High/ and V/sub Low/. This work demonstrates a high definition, multilayer, integrated photolithographic process which creates organic field effect transistors suitable for use in integrated circuit applications such as a display backplanes.     

The recovery of electron field-effect mobility on ion-beam-nitridized transistors with sacrificial oxide treatment

The use of a direct ion-beam-nitridized (IBN) mask can reduce the field oxide lateral encroachment from 1.0 to 0.35 µm per device edge. However, mobility degradation has been observed on IBN transistors. We found that with a sacrificial oxide (SO) treatment, the electron field-effect mobility is increased from 573 cm²/V . s to 640 cm²/V . s-a value similar to the local oxidation of silicon (LOCOS) process.     

Ion-implanted threshold tailoring for insulated gate field-effect transistors

This paper develops a general threshold equation for long-channel insulated gate field-effect transistors which accounts for the effects of ion-implant profiles used in threshold tailoring. Although any integrable function used to describe the nonuniform doping will yield an analytical expression for threshold, a Gaussian function is chosen because it accurately describes the implanted profile following proper annealing, regardless of subsequent high-temperature steps during fabrication. Most profiles of interest are quasi-neutral, i.e., the spatial dependence of the majority carriers in the undepleted bulk is adequately described by the doping profile, but the threshold equation is shown to be an excellent approximation for non quasi-neutral profiles as well. Comparison with experimental results show the analytical expression to be in good agreement with data over a wide range of implant conditions and starting substrate resistivity.     

Subthreshold design considerations for insulated gate field-effect transistors

A knowledge of subthreshold behavior in an insulated gate field-effect transistor is important for circuits with low leakage specifications. This paper discusses the effect of drain voltage on the subthreshold region as the channel length becomes shorter, the effect of substrate bias on both the shift in and the slope of the subthreshold curves, and the effect of temperature on the subthreshold current characteristics. It is shown that all these effects can be incorporated into a simple one-dimensional model.     

DC, small-signal, and noise modeling for two-dimensional electrongas field-effect transistors based on accurate charge-controlcharacteristics

A practical model for DC, small-signal, and noise characteristics in two-dimensional electron gas field-effect transistors is discussed. The model includes accurate charge-control characteristics based on analytical functions relating carrier concentration to Fermi level. This model allows the influence of drain current, frequency, and device parameters on the noise figure (NF) to be studied. The theory explains the experimentally observed trend in NF behaviors     

Parasitic source and drain resistance in high-electron-mobility transistors

The parasitic source and drain resistances of a high-electron-mobility transistor were analyzed in terms of a two layer transmission line model. The analysis showed that a highly conductive cap layer can function as an extension of the alloyed contact provided that tunneling between the cap layer and the channel is significant. The tunneling between the cap layer and the channel was analyzed in terms of a thermionic-field emission model in which a one dimensional time-dependent WKB transmission probability for the barrier was considered as well as Maxwell-Boltzman statistics for the tunneling carrier distribution. The GaAs cap, GaAlAs layer and 2-DEG channel can then be treated as a distributed resistance element with a characteristic coupling length. A reduction of the parasitic resistance can be obtained for a device structure with a short characteristic coupling length even if there exists an ideal alloyed contact to the 2-DEG channel. A multilayer cap consisting of an undoped GaAs layer inserted between the n-type GaAs and n-type GaAlAs is also proposed to reduce the barrier height for tunneling between the cap layer and the channel. The multilayer cap structure is predicted to appreciably reduce the parasitic resistance at room temperature and still be effective at 77 K.