一种光伏并网逆变系统低电压穿越控制策略研究

电网三相跌落故障下,两级式光伏逆变器的直流母线电压及并网电流会不稳定,从而导致光伏逆变器由于过压或者过流而脱网,而光伏逆变器的脱网又会恶化电网系统的安全运行,从而造成更为严重的事故。针对这一问题,文中首先在分析三相光伏并网逆变系统结构及控制的基础上,提出电网故障下保持系统直流母线电压及并网电流稳定的控制策略,且采用所提控制策略下的光伏并网逆变器能够在电网故障期间对其提供一定的无功支持。最后,搭建了三相光伏并网逆变系统的数字仿真平台,结果验证了所提控制策略在三相跌落故障下的有效性与优越性。     

四开关无刷直流电机开路故障诊断研究

四开关三相无刷直流电机逆变器开路故障不易察觉,对电机损害大,影响其正常运行,并且会导致二次故障。文中通过对四开关逆变器中功率开关管的故障分析,提出了线电压、直流母线电流换相脉动两种诊断方法。在MATLAB/Simulink环境下搭建了四开关三相无刷直流电机仿真模型,对提出的诊断策略进行仿真和分析。     

新型三相谐振直流环节逆变器

为实现三相逆变器的高效率运行,提出了一种新型三相谐振直流环节逆变器拓扑结构,其在直流环节设置了结构简单的辅助谐振电路.分析了电路的工作流程.实验结果表明开关器件实现了软切换,而且逆变器输出电流波形无明显畸变.因此,该逆变器能实现高效率稳定运行.     

三相逆变器限流策略研究

对逆变器的几种限流方法进行分析,最后给出一种瞬时限流加上电流环限流方案,使三相逆变器在过载、突加冲击性负载甚至在短路状态下都能很好的限流。这种方法的响应速度快,而且在长时间短路情况下电压和电流的波形不会发生畸变。这个方案已经成功的在50Hz,20kVA的三相逆变电源上得到了验证。     

基于预测电流控制的T型三电平并网逆变器研究

本文介绍了一种三相三线制T型三电平并网逆变器系统,根据开关状态建立了其数学模型.针对传统d-q变换的电流内环控制器在三相电压型逆变器中存在着动态响应慢及直流电压波动较大的问题,提出一种以泰勒公式为基础的预测电流控制方法,并采用了基于功率前馈的双闭环控制策略,实现了电流的快速跟踪,减少了电流的谐波含量,提高了系统的动态响...     

车用大功率IGBT模块死区时间测试与研究

在车用三相逆变器模块应用中,为防止同一相的上下臂IGBT同时导通,对死区时间的影响因素进行实验分析。对此,本文以车用代表性IGBT模块——英飞凌Hybrid PACKTM2 650V/800A模块——为例,通过双脉冲实验台架,以单一变量法分别测试了不同母线电压、通态电流、温度以及门极电阻下的死区时间。实验结果表明:死区时间与电流近似呈指数和双曲线复合关系,与直流母线电压近似呈线性关系,与温度二次相关,与门级电阻二次相关。所得结论可为Hybrid PACKTM2控制算法中的死区时间设置提供参考,以便提高模块的输出效率。     

并联型有源电力滤波器控制器的设计

本文设计的基于三相四线制APF控制器,采用STM32和FPGA双系统架构,利用STM32操作灵活、控制简单及其丰富的内部资源,完成实时检测三相电网电压、电流、三相负载电流、直流侧电压以及三相逆变器的输出电流等信号;利用FPGA的高速并行特性,产生8路PWM信号;两芯片协同工作,优势互补。     

双闭环矢量控制的并联型有源电力滤波器仿真研究

详细推导了三相三桥臂有源电力滤波器在同步旋转d-q坐标系中的数学模型,并根据此模型建立了基于电压外环和电流内环的双闭环PI控制系统,给出了具体控制策略。鉴于交流侧输出电感和直流母线电容的设计以往只依赖于经验,并没有考虑其对谐波补偿能力的影响,提出了一套输出滤波电感和直流母线电容参数设计的方法,仿真结果证明了控制策略的有...     

基于模糊逻辑控制器三相并网逆变器研究

本文对三相并网逆变器进行了阐述。在分布式并网发电系统中,三相并网逆变器是最为关键的部件之一。三相并网逆变器的性能主要取决于电流控制器的性能。通过对三相电压逆变器进行系统建模,经过abc三相静止坐标系下数学建模,引入dqo变换,使三相交流物理量转换为两相直流物理量。本文主要在MATLAB/SIMULINK环境中对基于模糊逻辑控制器的电流控制器进行了仿真研究。     

基于改进SPWM的三相四桥臂逆变器控制研究

三相四桥臂逆变器由于加入了第四桥臂,使得其负载不平衡或非线性时,逆变器输出电压三相对称且稳定。但第四桥臂的加入,却使得其控制变得较为复杂。该文比较了国内外文献中各种三相四桥臂逆变器控制方法的优缺点,分析了三相四桥臂逆变器的调制信号与输入直流电压之间的关系,在此基础上研究了一种基于三次谐波注入的新型PWM控制方案。仿真和实验显示谐波的注入不会影响输出电流,且该PWM控制方案使得三相逆变器在任意负载情况下均有较好的输出特性。实验验证了该方案的正确性和有效性。     

UPS inverter design using discrete-time sliding-mode control scheme

This paper presents a novel discrete-time sliding-mode control algorithm for an uninterruptible power supply (UPS) inverter design. The approach offers a dual-loop design, in which a current predictor utilizes the tracking error of output voltage to estimate the desired inductor current, while a current controller is adopted to regulate the inductor current and, thus, produces a control command to the pulsewidth modulation inverter. An explicit condition for stable controller design is derived. The efficacy of this scheme is validated via a successful implementation on a digital-signal-processor-based UPS inverter. The proposed scheme has shown its robustness on low output voltage distortion, excellent voltage regulation, and it is insensitive to load variation, even under nonlinear loads. Experimental studies were performed to further validate the effectiveness of this scheme     

Suppression of line voltage related distortion in current controlled grid connected inverters

The influence of selected control strategies on the level of low-order current harmonic distortion generated by an inverter connected to a distorted grid is investigated through a combination of theoretical and experimental studies. A detailed theoretical analysis, based on the concept of harmonic impedance, establishes the suitability of inductor current feedback versus output current feedback with respect to inverter power quality. Experimental results, obtained from a purpose-built 500-W, three-level, half-bridge inverter with an L-C-L output filter, verify the efficacy of inductor current as the feedback variable, yielding an output current total harmonic distortion (THD) some 29% lower than that achieved using output current feedback. A feed-forward grid voltage disturbance rejection scheme is proposed as a means to further reduce the level of low-order current harmonic distortion. Results obtained from an inverter with inductor current feedback and optimized feed-forward disturbance rejection show a THD of just 3% at full-load, representing an improvement of some 53% on the same inverter with output current feedback and no feed-forward compensation. Significant improvements in THD were also achieved across the entire load range. It is concluded that the use of inductor current feedback and feed-forward voltage disturbance rejection represent cost-effect mechanisms for achieving improved output current quality.     

Analysis and design of a high-frequency link DC to utilityinterface using square-wave output resonant inverter

A line-current-modulated high-frequency (HF) link DC to utility interface power conditioning system using a square-wave output resonant inverter is proposed. The proposed system consists of a square-wave output HF resonant inverter, a rectifier, and a line-connected inverter (LCI). The system is modeled using the constant current model for the HF inverter and the step model for the DC link current. The operating modes, analysis, design, and experiment results are presented. It has been shown that systems operating with less than 5% line current harmonic distortion are realizable when the type II commutation scheme is used for the LCI. A typical application of the system presented is in interfacing photovoltaic arrays to utility lines     

Subthreshold-current reduction circuits for multi-gigabit DRAM's

Two subthreshold-current reduction circuit schemes are described to suppress the increase in current in multi-gigabit DRAM's. One is a hierarchical power-line scheme for iterative circuits. In this scheme, a group of circuits is divided into blocks; only the selected block is supplied with power, while the subthreshold current to the many nonselected blocks is reduced. This scheme minimizes the number of circuits carrying the large subthreshold current. Applications of this scheme to word drivers, decoders and sense-amplifier driving circuits are shown. The other scheme is a switched-power-supply inverter with a level holder for random combinational logic circuits. In the active mode of the chip, the operating period of the inverter is distinguished from the inactive period. The inverter is supplied with power only in the operating period, while in the inactive period the subthreshold current is shut off and the output level is kept by the flip-flop level holder. This scheme shortens the period in which the large subthreshold current flows. Both schemes are evaluated for a conceptually-designed 16-Gb DRAM. They reduce its active current by ten-fold from the conventional 1.2 A to 116 mA     

TRIAC dimmable ballast with power equalization

A two-stage, two-wire TRIAC dimmable electronic ballast for fluorescent lamps is presented in this paper. It is constructed by using a flyback converter as the input power factor corrector to supply a half-bridge series-resonant parallel-loaded inverter to ballast the lamp. The flyback converter is operated in discontinuous conduction mode so that the filtered input current profile is the same as the TRIAC-controlled voltage waveform. The switches in the inverter are switched at a constant frequency slightly higher than the resonant frequency of the resonant tank. Based on the constant average input current characteristics of the inverter, the dimming operation is simply achieved by pulsewidth modulation control of the magnitude of the flyback converter output voltage. No synchronization network is required between the input and output stages. In addition, a linear power equalization scheme is developed so that the dc-link voltage (and hence the lamp power) is in a linear relationship with the firing angle of the TRIAC. The average output voltage of the dimmer controls the equalized flyback converter output voltage. Modeling, analysis, and design of the ballast will be described. A prototype was implemented to verify the experimental measurements with the theoretical predictions.     

Dead-Time Elimination of PWM-Controlled Inverter/Converter Without Separate Power Sources for Current Polarity Detection Circuit

This paper will present a dead-time elimination scheme for a pulsewidth-modulation (PWM)-controlled inverter/converter. The presented dead-time elimination scheme does not require separated power supplies for freewheeling-current detection of high- and low-side power devices. The presented scheme includes the freewheeling-current polarity detection circuit and the PWM control generator without dead time. It will be shown that the presented scheme eliminates the dead time of PWM control for inverter/converter and therefore dramatically improves output voltage loss and current distortion. Experimental results derived from a field-programmable-gate-array-based PWM-controlled inverter are shown to demonstrate the effectiveness.      

基于状态空间的PWH逆变器的PI数字双环控制方法研究

本文分析了正弦波PWM逆变器的实际应用情况和数字控制的特点,在建立了逆变器及其控制系统的状态空间模型基础之上,采用了一种带输出电流前馈的PI数字双环控制方案（电感电流内环输出电压外环）,并对控制系统直接离散化后利用极点配置的方法设计了控制系统参数,最后给出了在各种实验条件下的仿真波形。仿真结果表明,该方案设计简单可行,井能很好地达到逆变电源的各项性能指标要求。     

数字化三相大功率逆变波形内模控制方法

针对三相逆变电源数学模型在旋转αβ坐标系下的特点,提出了基于神经网络内模原理的逆变波形控制方案.用神经网络预估器作为逆变器的内部模型,用神经网络辨识预估逆变器正模型及其逆模型,在线修正、补偿内部模型与被控逆变器之间的模型失配.仿真和实验结果表明,该方案控制下系统稳压精度高,有较快的动态响应.     

Combination voltage-controlled and current-controlled PWM invertersfor UPS parallel operation

In this paper, a scheme of combination of voltage-controlled and current-controlled PWM inverters for parallel operation of a single-phase uninterruptible power supply (UPS) is proposed. The voltage-controlled PWM inverter (VCPI) unit as a master is developed to keep a constant sinusoidal wave output voltage. The current-controlled PWM inverter (CCPI) units are operated as slave controlled to track the distributive current. The power distribution center (PDC) performs the function of distributing the output current of each active unit. In this proposed scheme of parallel operation, each of the units can be designed as nearly independent, and the CCPI units do not need a PLL circuit for synchronization. As a result, the parallel operation of UPS is easy to implement and to expand system capacity. For the purpose of illustration, the system, including three single-phase units which operate in parallel, is analyzed and experimental results are given