Microprocessor-based simulator of a variable time delay

This article outlines a method for the simulation of a pure time delay element in analogue simulation of dynamic systems using a microcomputer. The hardware of the simulator and the flowchart of its operation are illustrated and described. The main characteristics of the realized simulator, the I/O voltage range, the manually variable time delay, the sampling period and the time of operation are provided with suggested modifications for improved performance.     

A microprocessor-based local network access unit

In this paper the authors outline the background and design aims of a microprocessor-based access unit used for connecting computers, user terminals and other devices to an Ethernet-style local area network. The hardware and software implementations of the access units are described, together with details of their interfaces to various devices on the one hand and to the communication medium on the other. The access unit approach produces a cheap but moderately powerful local network and gives a flexible base for constructing networks of different architectures, including broadcasting and ring types.     

A system organization for parallel image processing

One of the problems in the development of multiprocessor systems for image analysis is the selection and efficient utilization of an interconnection network between the multiple processing units. This paper proposes a system organization centered around a class of interconnection networks and a global bus. Control schemes are developed for realizing the intertask communication requirements typically encountered in the parallel formulation of problems for image analysis. These schemes are simple, distributed and efficient. The utility of this organization is demonstrated by evaluating the performance of two applications.     

A gateway development system

There are an increasing number of local area networks being developed and built for use in a wide range of environments. The underlying communication architecture in the majority of cases is either a broadcasting or ring system. This paper describes a gateway development system which is specifically designed to deal with the interconnection of broadcast and ring systems. The gateway makes use of recently developed microprocessor chips to handle the different requirements of the two networks being connected. In particular, the gateway will be used to link an Ethernet-like system and a Cambridge Ring.     

Machine cycle simulator for a microprocessor

The technique used in the construction of a simulator for a processor affects the range of applications for which the simulator can be used. A machine cycle simulator has been constructed for the MC68000 microprocessor, and some of the advantages of this technique are discussed.     

Realtime digital signal processing system using a parallel processing architecture

A low cost, high-speed, general-purpose ditigal signal processing system was constructed using the TMS32010 digital signal processor. The system was designed with simplicity, compactness, flexibility and expandibility in mind. A parallel processing architecture was adopted to achieve realtime performance. Four processors were used in the prototype system, but this can be expanded easily. Interprocessor data transfer and communications with the host computer are facilitated via a single common bus and a bank of shared memory. A one-dimensional digital FIR filter and a realtime FFT program were used to evaluate the performance of the system. In addition, a realtime spectrogram was implemented as an application example.     

A system for parallel media processing

We describe a parallel computer system for processing media: audio,video, and graphics, among others. The system supports medium to coarse grain parallelism, using a dataflow model of execution, on a range of machine architectures scaling from a single von Neumann or general purpose processor (GPP) up to networks of several hundred heterogeneous processors. A distributed resource manager, extending or subsuming the functionality of a traditional operating system, is an integral and necessary part of the system. While we are building a system for processing a variety of media, in this paper we concentrate on video because it provides an extreme case in terms of both data rates and available parallelism.     

Raster cellular neural network simulator for image processing applications with numerical integration algorithms

In this paper, a universal simulator for cellular neural network (CNN) is presented. This simulator is capable of performing Raster simulation for any size of input image, and thus is a powerful tool for researchers investigating potential applications of CNN. This paper reports the latency properties of CNNs along with popular numerical integration algorithms; results and comparisons are also presented.     

IEEE-488 interface using parallel I/O ports

A single-board computer system and a selfdesigned interface card are used along with a monitor in ROM to interface a frequency spectrum analyser and a remote computer system using an IEEE-488 interface. Various settings on the analyser can be controlled as well as the collection of data. The monitor also has the ability to act as a terminal on a remote computer system and to transfer spectra between the microsystem and the remote host.     

Banet — a local area network for distributed data processing

A broadcast architecture network (Banet) suitable for distributed data processing is proposed. One feature of Banet is that the broadcast-within-a-group function is supported not only by the datalink level but by the transport or session-level network structure. The commitment control scheme is included in the network protocol. Design goals, physical structure and protocols are discussed.     

Experimenting with local networks using an integrated circuit data link controller

There has been considerable discussion recently about the implementation of local networks. Much of this discussion centres around techniques requiring special hardware which is often too expensive for the application or not yet available. There is, however, an immediate need for local networks of a more modest price and performance. This paper describes the use of an integrated circuit data link controller to implement an inexpensive low performance local network.     

A simulator for adaptive parallel applications

Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. Detailed simulations can help identify allocation strategies and problem decomposition parameters that increase the efficiency of parallel applications. We describe a simulation framework supporting dynamic node allocation which, given a simple cluster model, predicts the running time of parallel applications taking CPU and network sharing into account. Simulations can be carried out without needing to modify the application code. Thanks to partial direct execution, simulation times and memory requirements are reduced. In partial direct execution simulations, the application's parallel behavior is retrieved via direct execution, and the duration of individual operations is obtained from a performance prediction model or from prior measurements. Simulations may then vary cluster model parameters, operation durations and problem decomposition parameters to analyze their impact on the application performance and identify the limiting factors. We implemented the proposed techniques by adding direct execution simulation capabilities to the Dynamic Parallel Schedules parallelization framework. We introduce the concept of dynamic efficiency to express the resource utilization efficiency as a function of time. We verify the accuracy of our simulator by comparing the effective running time, respectively the dynamic efficiency, of parallel program executions with the running time, respectively the dynamic efficiency, predicted by the simulator under different parallelization and dynamic node allocation strategies.     

Interconnection network analysis for a compliant massively parallel processor

The paper analyzes and selects an appropriate interconnection network for a compliant multiprocessor. The multiprocessor is compliant to the tasks assigned to it in the sense that it can be reconfigured to provide a more efficient fit to the tasks to be executed. A number of possible candidate networks for the multiprocessor is considered: Omega, ADM, Hypercube and Torus. The potential applicability of these networks to the multiprocessor is analyzed from the points of view of partitionability, inter-PE delay, fault impact, and cost. After the individual analysts of the above points of consideration is completed, a weighted network factor is formed, and the optimal type of network is selected, under different performance criteria. The overall results point to the selection of the Torus or Hypercube network for most cases under consideration.     

SimuRed: A flit-level event-driven simulator for multicomputer network performance evaluation

The interconnection network is one of the most important multicomputer components, since it has a great impact on global system performance. Many models and simulators have been proposed to evaluate network performance. This paper presents SimuRed, an event-driven flit-level, cycle-accurate simulator to evaluate different orthogonal network configurations. The core of the simulator has been designed to be expandable and portable to different situations. Some of the advantages of this simulator over other similar tools are its visual interface, its fast execution and its simplicity. Moreover, it is multiplatform and its source code versions (C++ and Java) are freely available under GNU open-source license. The performance of this simulator has been evaluated, including a performance impact study of injection channels and deterministic/adaptive routing for meshes and hypercubes.     

新一代并行可扩展裂缝性油藏聚合物驱模拟器的开发

石油作为一种主要能源,在交通、工业生产以及日常生活中发挥着重要作用。大量的新技术已经被开发并用于最大化石油生产,比如聚合物驱等技术在我国得到了广泛的应用。天然裂缝油藏聚合物驱模拟对油田的可持续生产和延长油田寿命至关重要。开发了一种可扩展的并行油藏模拟器,用于使用聚合物驱技术模拟天然裂缝性油藏的石油开采,使油藏工程人员能够利用强大的并行计算机研究生产技术,优化采油过程。通过与现有的商用软件对比,数值结果验证了该模拟器的正确性和有效性。此外,数值实验也证明了该模拟器拥有良好的扩展性,它可以使用成千上万的CPU核来计算具有数亿个网格块的大规模油藏模型。     

Implementing a Scheme-based parallel processing system

The Scheme language can be converted into a parallel processing language by adding two new data types (placeholders andweak pairs), two processor synchronization primitives, and a task distribution mechanism. The mechanisms that support task creation, scheduling, and task synchronization are built using these extensions and features already present in the sequential language. Implementing the core of the parallel processing component in Scheme itself provides testbed for a variety of experiments and extensions.MultiScheme, the system resulting from these extensions, supports Halstead's future construct as the simple model for parallelism. By revealing the underlying placeholders on top of which this construct is built, Multischeme supports a variety of additional parallel programming techniques. It supports speculative computation through a simple procedural interface and the automatic garbage collection of tasks. The qlet and qlambda constructs of the QLisp language are also easily implemented in MultiScheme, as are the more familiar fork and join constructs of imperative programming.This research was supported in part by the Defense Advanced Research Projects Agency and was monitored by the Office of Naval Research under contract numbers N00014-83-K-0125, N00014-84-K0099, N00014-86-K-0180, and MDA903-84-C-0033. Additional funds and resources were provided by BBN Advanced Computers Inc., and the Hewlett-Packard Corporation. The work was performed as part of the author's dissertation research at the Massachusetts Institute of Technology.