Monolithic arrays of surface emitting laser NOR logic devices

Monolithic, cascadable, laser-logic-device arrays have been realized and characterized. The monolithic surface-emitting laser logic (SELL) device consists of an AlGaAs superlattice lasing around 780 nm connected to a heterojunction phototransistor (HPT) in parallel and a resistor in series. Arrays up to 8×8 have been fabricated, and 2×2 arrays show uniform characteristics. The optical logic output is switched off with 40 μW incident optical input     

The fabrication and characterization of EEPROM arrays on glassusing a low-temperature poly-Si TFT process

The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200°C-400°C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16×16 EEPROM arrays with integrated drive circuits formed using this technology is presented     

Antenna arrays in MCM-D technology fed by coplanar CPW networks

In this paper, the design, fabrication, and characterization of planar antenna arrays in the MCM-D technology are presented. The arrays are fed by coplanar feeding networks built using coplanar-waveguide lines. 2×2 and 4×4 arrays of slot dipoles designed to work in K-band, around 25 GHz, are also presented. The analysis was carried out both theoretically and experimentally. The results include the return loss, radiation patterns, and antenna gain. The proposed arrays are compatible with the driving electronics technology, enjoying high-impedance bandwidth, low cross polarization, high gain, and high radiation efficiency     

Multiple-chip precise self-aligned assembly for hybrid integratedoptical modules using Au-Sn solder bumps

We have developed a novel three-dimensional high precision self-aligned assembly using stripe-type Au-Sn solder bumps and a micro-press solder bump formation method. This produces a high bonding precision of 1 μm for optical device assembly in both lateral and vertical directions without the need for time-consuming optical axes alignment. Furthermore, we tested a hybrid integrated 4×4 optical matrix switch, in which multiple SSC-SOAG arrays were simultaneously positioned and optical fibers were passively positioned on a silica based PLC platform using this technology. Four optical chips and seven wiring chips are assembled on a planar lightwave circuit (PLC) platform. The insertion loss for each of these paths at an injection current of 40 mA was within a range of 9±4 dB. The average extinction ratio was 40 dB. This self-aligned assembly technology was shown to be useful for building hybrid-integrated multichannel optical network components     

Two-dimensional 8×8 photoreceiver array and VCSEL drivers forhigh-throughput optical data links

Two custom GaAs integrated circuits (ICs) have been developed for enabling vertical cavity surface emitting laser (VCSEL) arrays to be used for high throughput spatial division multiplexed (SDM) optical data links. A 16-channel driver IC was developed to drive the VCSEL array and an 8×8 monolithic photoreceiver, which spatially matches the VCSEL array, was developed for receive. Both of these circuits were fabricated in a standard commercial GaAs MESFET process with parasitic photodetectors used for the photoreceivers. Power dissipation and circuit size were primary design challenges for both circuits. The present 8×8 array size along with an estimated usable channel speed of 1 Gb/s allows for an aggregate throughput of 64 Gb/s     

An 8 mm length nonblocking 4×4 optical switch array

A novel single-mode-single-slip-structure S³ optical switch using carrier-induced refractive index change is proposed as a unit cell for a small polarization-independent nonblocking N×N optical switch array. Sixteen S³ optical switches have been integrated into a nonblocking 4×4 optical switch array on an InP substrate. The 8-mm-length InGaAsP/InP 4×4 optical array has shown satisfactory switching characteristics and is suitable for larger scale integration of optical switch arrays and also for integration with other active optical devices such as laser diodes     

An all-optical realization of a 2×1 free-space switching node

An experimental all-optical 2×1 free-space switching node that was implemented with semiconductor laser diodes, beam splitters, retardation plates, lenses, mirrors, dichroic filters and binary phase gratings is demonstrated. Two symmetric self-electrooptic effect device arrays used as optical logic elements were cascaded. Two electronically controlled optical signals were used to determine the switch routing. The 2×1 node transmitted at a data rate of 5 kb/s     

On the gain of a reconfigurable-aperture antenna

A full-wave analysis based on the method of moments (MoM) is carried out for a reconfigurable-aperture antenna consisting of a two-dimensional (2-D) array of filamentary microstrip-dipoles interconnected by lossy microelectromechanical-system (MEMS) switches. Activation of specific MEMS switches allows the dipoles to be maintained near the halfwave-resonant length as the frequency is reduced in octave increments between 16 and 2 GHz. This keeps the real part of the dipole self-impedance much higher and the imaginary part much lower than in a dipole having a fixed length of λ/2 at 16 GHz. Hence, the array antenna gain and aperture efficiency remain much higher with frequency than in an array of fixed dipoles. Broad side aperture efficiencies of -3.9, -6.0, -9.5, and -10.6 dB are predicted for 16×16, 8×8, 4×4, and 2×2 recap dipole arrays at frequencies of 16, 8, 4, and 2 GHz, respectively, for MEMS switches having 0.5 dB insertion loss. In contrast, fixed-element λ/2-separated arrays operating at the same frequencies have predicted efficiencies of -3.9, -24.2, -45.0, and -63.0 dB, respectively     

Logic self-electrooptic effect devices: quantum-well optoelectronicmultiport logic gates, multiplexers, demultiplexers, and shift registers

Two-dimensional arrays of logic self-electrooptic effect devices (L-SEEDs), consisting of electrically connected quantum-well p-i-n diode detectors and modulators are demonstrated. The topology of the electrical connections between the detectors is equivalent to the connections between transistors in CMOS circuits. Three different L-SEED arrays were built and tested. Each element in one array can implement any of the four basic Boolean logic functions (i.e., NOR, NAND, AND, OR). Each element in the second L-SEED array can implement the function E=AB+CD. The third L-SEED array consists of 32×16 arrays of symmetric SEEDs (S-SEEDs) connected with optoelectronic transmission gates. Photonic switching nodes, multiplexers, demultiplexers, and shift registers have been demonstrated using this array     

A low crosstalk microoptic liquid crystal switch

A total internal reflection liquid crystal optical switch has been developed which gives crosstalk levels of -33 dB and switching speeds of 4 ms, with low operating voltage. A novel architecture for larger switch arrays is also proposed and prototype device constructed and tested. The effects of modulation on the optical carrier by the electrical drive signal, and methods of minimizing its effect are reported. Finally, a novel space-saving architecture is proposed and demonstrated for 4×4 switch arrays and its performance reported     

32 digital uncompressed TV channel distribution via 8 HDWDMchannels

The performance of a demonstrator for the distribution of 32 digital uncompressed TV channels using HDWDM has been examined. For the transmission 8 optical wavelengths have been used spaced by 2 nm in the 1529-1543 nm range carrying a data rate of 8×622 Mbt/s. Without optical amplifier a splitting factor of 16 has been obtained for the PON with low crosstalk and polarization sensitivities. The demonstrator is the distributive part of a combined demonstrator including broad- and narrowband interactive services     

GaAs MQW modulators integrated with silicon CMOS

We demonstrate integration of GaAs-AlGaAs multiple quantum well modulators to silicon CMOS circuitry via flip-chip solder-bonding followed by substrate removal. We obtain 95% device yield for 32×32 arrays of devices with 15 micron solder pads. We show operation of a simple circuit composed of a modulator and a CMOS transistor     

8×8 symmetric nonblocking integrated acoustooptic spaceswitch module on LiNbO3

An 8×8 symmetric nonblocking integrated acoustooptic space switch module has been realized on a Y-cut LiNbO₃ substrate, 1.0×10.0×37.0 mm in size. The switch module consists of a new hybrid beam expanding-collimating lens, a large aperture focusing lens, and a pair of four-element tilted surface acoustic wave (SAW) transducer arrays in a titanium-in-diffused channel-planar-channel composite waveguide. Experimental results of point-to-point nonblocking switching at the optical wavelength of 0.6328 μm, including an average crosstalk of -12.2 dB, optical switching efficiency of 25% at 125 mW RF drive power, carrier frequency increment of 13.5 MHz for switching between adjacent output channels and reconfiguration time of 0.4 μs have been obtained     

FDM-channel selection filter using arrayed-waveguide gratingmultiplexer with input and output switches

A novel configuration is reported for a tunable channel-selection filter that employs an arrayed-waveguide grating (AWG) multiplexer and optical switches. The filter requires only 2(√N-1) 1×2 switch elements to select one of N frequency-division-multiplexed (FDM) channels. A filter for 100 GHz-spaced 16 FDM channels is demonstrated with an AWG 16×16 multiplexer and six 1×2 switches     

High-density micromachined polygon optical crossconnects exploitingnetwork connection-symmetry

Optical-layer crossconnects with high port count appear to be emerging as key elements for provisioning and restoration in future wavelength-division-multiplexed networks. We demonstrate here a means of achieving high-density optical crossconnects utilizing free-space micromachined optical switches that exploit connection-symmetry in core-transport networks. The micromachined polygon switches proposed here are strictly nonblocking. Measured insertion losses of 3.1-3.5 dB for a 16×16 (8×8 bidirectional) switch suggest the promise of scaling to large port count     

An optoelectronic CMOS circuit implementing a simulated annealingalgorithm

An original optoelectronic implementation of simulated annealing is presented. A compact and simple optical system provides a chip with arrays of independent random noise sources. The silicon chip is composed of a mesh of computing cells. Each cell includes both analog and digital circuits and includes two photosensors. A detailed analysis of this cell is given including a presentation of the design constraints. A 4×4-cells prototype chip was implemented in a 1 μm CMOS digital technology and was successfully operated at 20000 iterations per second. The measurements and characterization of this chip made possible the successful design of a 600-cells chip also presented. These results demonstrate the video-rate application of simulated annealing to early vision tasks     

A 32×32-bit multiplier using multiple-valued MOS current-modecircuits

A 32×32-bit multiplier using multiple-valued current-mode circuits has been fabricated in 2-μm CMOS technology. For the multiplier based on the radix-4 signed-digit number system, 32×32-bit two's complement multiplication can be performed with only three-stage signed-digit full adders using a binary-tree addition scheme. The chip contains about 23600 transistors and the effective multiplier size is about 3.2×5.2 mm², which is half that of the corresponding binary CMOS multiplier. The multiply time is less than 59 ns. The performance is considered comparable to that of the fastest binary multiplier reported     

A photodiode cell for applications to position and motionestimation sensors

An optical cell has been designed and fabricated using standard digital 1.6 μm CMOS technology. It has been designed for applications to sensors where the image acquisition time of fast moving objects or documents is of primary importance. The cell contains a photodiode working in storage mode and a shielded MOS capacitor acting as analog frame buffer. A chip prototype containing 64 linear arrays of 64 cells whose size is 36×36 μm² has been tested and measurements have proved the functionality down to microsecond-range of exposure times. By virtue of the proposed read-out technique, the sensor architecture provides simultaneous image acquisition of irregular moving objects allowing precise detection of position and motion