Degradation behavior of Ta2O5 stacks and its dependence on the gate electrode

Response of 8 nm Ta₂O₅ stacks with Al and Au gate electrodes to voltage stress at room temperature and at 100 °C is investigated. Stress-induced leakage current (SILC) reveals significant gate dependence and distinct difference to SILC in SiO₂. The mechanisms for SILC generation and stress degradation are discussed. Unlike SiO₂, pre-existing traps and positive charge build-up are recognized as a key factor for generation of SILC in Ta₂O₅ stacks.     

Structural and electrical properties of radio frequency magnetron sputtered tantalum oxide films: Influence of post-deposition annealing

The as-deposited and annealed radio frequency reactive magnetron sputtered tantalum oxide (Ta₂O₅) films were characterized by studying the chemical binding configuration, structural and electrical properties. X-ray photoelectron spectroscopy and X-ray diffraction analysis of the films elucidate that the film annealed at 673 K was stoichiometric with orthorhombic β-phase Ta₂O₅. The dielectric constant values of the tantalum oxide capacitors with the sandwich structure of Al/Ta₂O₅/Si were in the range from 14 to 26 depending on the post-deposition annealing temperature. The leakage current density was <20 nA cm^?2 at the gate bias voltage of 0.04 MV/cm for the annealed films. The electrical conduction mechanism observed in the films was Poole–Frenkel.     

Effects of the metal gate on the stress-induced traps in Ta2O5/SiO2 stacks

The degradation of Ta₂O₅-based (10 nm) stacked capacitors with different top electrodes, (Al, W, Au) under constant current stress has been investigated. The variation of electrical characteristics after the stress is addressed to gate-induced defects rather than to poor-oxidation related defects. The main wearout parameter in Ta₂O₅ stacks is bulk-related and a generation only of bulk traps giving rise to oxide charge is observed. The post-stress current–voltage curves reveal that stress-induced leakage current (SILC) mode occurs in all capacitors and the characteristics of pre-existing traps define the stress response. The results are discussed in terms of simultaneous action of two competing processes: negative charge trapping in pre-existing electron traps and stress-induced positive charge generation, and the domination of one of them in dependence on both the stress level and the gate used. The charge build-up and the trapping/detrapping processes modify the dominant conduction mechanism and the gate-induced defects are precursors for device degradation. It is concluded that the impact of the metal gate on the ultimate reliability of high-k stacked capacitors should be strongly considered.     

The effect of oxygen content on the performance of low-voltage organic phototransistor memory

Optical writing and electrical erasing organic phototransistor memory (OPTM) is a promising photoelectric device for its novel integration of photosensitive and memory properties. The performance of OPTM can be influenced by the trap density of the gate dielectric layer. Here, we occupy tantalum pentoxide (Ta₂O₅), which is a prospective material in microelectronics field, as the gate dielectric. By increasing the oxygen content from 10% to 50% during the fabrication process of Ta₂O₅, it is found that the mobility and the photoresponsivity of OPTMs are significantly enhanced about 10 times and the retention time is greatly increased to 8.4 × 10⁴ s as well. As far as we know, this is the first example that the modulation of oxygen content can improve the OPTM performance. Furthermore, the change of the oxygen content gives rise to the alteration of the threshold voltage and memory window, of which the absolute values of all the threshold voltage are below 5 V which is low enough to reduce the power consumption. It is found that the oxygen content can influence the surface roughness and surface energy of Ta₂O₅ films, which alter the nucleation and orientation of semiconductor layers, change the contact resistance and modulate the electron trap density in the Ta₂O₅ films.     

Low-voltage,high-performance n-channel organic thin-film transistors based on tantalum pentoxide insulator modified by polar polymers

Polar polymers (polyfluorene copolymers, PFN–PBT) with different polarities are utilized to modify the surface of tantalum pentoxide (Ta₂O₅) insulator in n-channel organic thin-film transistors (OTFTs). A high mobility of 0.55 cm²/Vs, high on/off current ratio of 1.7 × 10⁵, and low threshold voltage of 2.8 V are attained for the OTFT with the modification polymers, the performances of which are much better than those of OTFT with only Ta₂O₅ insulator. The performances of the OTFT with only Ta₂O₅ insulator are only 0.006 cm²/Vs in mobility, 5 × 10³ in on/off ratio, and 12.5 V in threshold voltage. Furthermore, it is found that the threshold voltage of the OTFTs with PFN–PBT modification layer is easily tuned by polarities of the polymers. Further studies show that self-assembly dipole moments in the polymers play an important role in the improvement of the OTFT performances.     

Effects of oxygen concentration on the properties of Al-doped ZnO transparent conductive films deposited by pulsed DC magnetron sputtering

The effect of oxygen concentration on the properties of Al-doped ZnO (AZO) transparent conductive films has been investigated on the films deposited by pulsed DC magnetron sputtering using a cylindrical ZnO target containing 2 wt% Al. AZO films were deposited at 230 °C to the thickness of about 1000 nm and the oxygen concentration was controlled by varying the O₂/Ar supply ratio from 0 to 0.167. With the increasing O₂/Ar ratio, crystallinity of the AZO films deteriorated while the film surface became smooth. Accompanying this, electrical properties also deteriorated significantly. When the O₂/Ar ratios were 0 and 0.033, the AZO films showed metallic conduction behavior with the electrical resistivity in the mid 10^?4 Ω cm range. However, when the ratios were 0.100 and 0.167, the films showed poor electrical conduction behavior similar to semiconductors as deduced from the transmittance behavior. Spectroscopic analysis showed that such deteriorating properties are due to the formation of condensed oxide group through the reaction between excess oxygen and dopant aluminum.     

Constant current stress-induced leakage current in mixed HfO2-Ta2O5 stacks

The electrical characteristics of HfO₂-Ta₂O₅ mixed stacks under constant current stress (CCS) at gate injection with 20 mA/cm² and stressing times of 50 and 200 s have been investigated. A very weak effect of the stress on the global dielectric constant, on fast and slow states in the stack as well as on the dominant conduction mechanism is detected. The most sensitive parameter to the CCS is the leakage current. The stress-induced leakage current (SILC) is voltage and thickness dependent. The pre-existing traps govern the trapping kinetics and are a key parameter to evaluate the stress response. Two processes - positive charge build-up and new bulk traps generation - are suggested to be responsible for SILC: the domination of one of them depends on both the film thickness and the stressing time. The positive charge build-up is localized close to the gate electrode implying gate-induced defects could be precursors for it. It is established that unlike the case of single SiO₂ layer, the bulk traps closer to the gate electrode control SILC in the mixed Ta₂O₅-HfO₂-based capacitors.     

Memory characteristics of Al2O3/La2O3/Al2O3 multi-layer films with various blocking and tunnel oxide thicknesses

In order to investigate charge trap characteristics with various thicknesses of blocking and tunnel oxide for application to non-volatile memory devices, we fabricated 5 and 15 nm Al₂O₃/5 nm La₂O₃/5 nm Al₂O₃ and 15 nm Al₂O₃/5 nm La₂O₃/5, 7.5, and 10 nm Al₂O₃ multi-stack films, respectively. The optimized structure was 15 nm Al₂O₃ blocking oxide/5 nm La₂O₃ trap layer/5 nm Al₂O₃ tunnel oxide film. The maximum memory window of this film of about 1.12 V was observed at 11 V for 10 ms in program mode and at ?13 V for 100 ms in erase mode. At these program/erase conditions, the threshold voltage of the 15 nm Al₂O₃/5 nm La₂O₃/5 nm Al₂O₃ film did not change for up to about 10⁴ cycles. Although the value of the memory window in this structure was not large, it is thought that a memory window of 1.12 V is acceptable in the flash memory devices due to a recently improved sense amplifier.     

Lightly Al-doped Ta2O5: Electrical properties and mechanisms of conductivity

Lightly Al-doped Ta₂O₅ films (10;15 nm) obtained by rf sputtering have been studied with respect to their dielectric and electrical properties. The formed metal-high-k dielectric-semiconductor capacitors have been characterized by capacitance-voltage and temperature-dependent current-voltage characteristics. It was established that the introduction of small amount (5 at.%) Al into the matrix of Ta₂O₅ improves dielectric constant, introduces negative oxide charge, suppresses deep oxygen-vacancy centers in Ta₂O₅ but creates shallow traps and changes the dominant conduction mechanism in the stacks. The doping produces more leaky films at room temperature and lower current at high temperature as compared to the case of pure Ta₂O₅. It is concluded that the strong contribution of tunneling processes through shallow traps in the conductivity of doped films could explain the observed current degradation at room temperature and its improved temperature stability at high temperatures. The energy levels of the traps responsible for the current transport are estimated.     

High dielectric constant TiO2 film grown on polysilicon by liquid phase deposition

In this study, titanium dioxide (TiO₂) films were grown on polycrystalline silicon by liquid phase deposition (LPD) with ammonium hexafluoro-titanate and boric acid as sources. The film structure is amorphous as examined by X-ray diffraction (XRD). A uniform composition of LPD-TiO₂ was observed by SIMS examination. The leakage current density of an Al/LPD-TiO₂/poly-Si/p-type Si metal–oxide–semiconductor (MOS) structure is 1.9 A/cm² at the negative electric field of 0.7 MV/cm. The dielectric constant is 29.5 after O₂ annealing at 450 °C. The leakage current densities can be improved effectively with a thermal oxidized SiO₂ added at the interface of LPD-TiO₂/poly-Si. The leakage current density can reach 3.1×10⁻⁴ A/cm² at the negative electric field of 0.7 MV/cm and the dielectric constant is 9.8.     

Investigation of dependence between time-zero and time-dependent variability in high-κ NMOS transistors

Bias Temperature Instability (BTI) is a major reliability concern in CMOS technology, especially with High-dielectric constant (High-κ/HK) metal gate (MG) transistors. In addition, the time-independent process-induced variation has also increased because of the aggressive scaling down of devices. As a result, the faster devices at the lower threshold voltage distribution tail experience higher stress, leading to additional skewness in BTI degradation. Since time-dependent dielectric breakdown (TDDB) and stress-induced leakage current (SILC) in NMOS devices are correlated to BTI, it is necessary to investigate the effect of time-zero variability on all of these effects simultaneously. Accordingly, we propose a simulation framework to model and analyze the impact of time-zero variability (in particular, random dopant fluctuations) on different aging effects. For small area devices (~ 1000 nm²) in 30 nm technology, we observe significant effects of Random Dopant Fluctuation (RDF) on BTI-induced variability (σ_ΔVth). In addition, circuit analysis reveals similar trend in performance degradation. However, both TDDB and SILC show weak dependence on RDF. We conclude that the effect of RDF on V_th degradation cannot be disregarded in scaled technology and needs to be considered in variation-tolerant circuit design.     

Effect of the work function of gate electrode on hysteresis characteristics of organic thin-film transistors with Ta2O5/polymer as gate insulator

Organic thin-film transistors (OTFTs) using high dielectric constant material tantalum pentoxide (Ta₂O₅) and benzocyclobutenone (BCBO) derivatives as double-layer insulator were fabricated. Three metals with different work function, including Al (4.3 eV), Cr (4.5 eV) and Au (5.1 eV), were employed as gate electrodes to study the correlation between work function of gate metals and hysteresis characteristics of OTFTs. The devices with low work function metal Al or Cr as gate electrode exhibited high hysteresis (about 2.5 V threshold voltage shift). However, low hysteresis (about 0.7 V threshold voltage shift) OTFTs were attained based on high work function metal Au as gate electrode. The hysteresis characteristics were studied by the repetitive gate voltage sweep of OTFTs, and capacitance–voltage (C–V) and trap loss-voltage (G_p/ω?V) measurements of metal–insulator–semiconductor (MIS) devices. It is proved that the hysteresis characteristics of OTFTs are relative to the electron injection from gate metal to Ta₂O₅ insulator. The electron barrier height between gate metal and Ta₂O₅ is enhanced by using Au as gate electrode, and then the electron injection from gate metal to Ta₂O₅ is reduced. Finally, low hysteresis OTFTs were fabricated using Au as gate electrode.     

ZrO2 insulator modified by a thin Al2O3 film to enhance the performance of InGaZnO thin-film transistor

A high-performance InGaZnO (IGZO) thin-film transistor (TFT) with ZrO₂–Al₂O₃ bilayer gate insulator is fabricated. Compared to IGZO-TFT with ZrO₂ single gate insulator, its electrical characteristics are significantly improved, specifically, enhancement of I_on/I_off ratios by one order of magnitude, increase of the field-effect mobility (from 9.8 to 14 cm²/Vs), reduction of the subthreshold swing from 0.46 to 0.33 V/dec, the maximum density of surface states at the channel-insulator interface decreased from 4.3 × 10¹² to 2.5 × 10¹² cm⁻². The performance enhancements are attributed to the suppression of leakage current, smoother surface morphology, and suppression of charge trapping by using Al₂O₃ films to modify the high-k ZrO₂ dielectric.     

Improved reliability of NO treated NH3-nitrided oxide with regard to O2 annealing

NH₃-nitrided oxide has been annealed in NO or O₂ gas at 1000°C for 1 min and the electrical characteristics, charge trapping and time-dependent dielectric breakdown (TDDB) have been studied. It was observed that in the F–N region before stress the conduction current is the same for all the samples but intrinsic breakdown is earlier for O₂ annealed NH₃-nitrided oxide. After stress, the leakage current increases abruptly for the O₂ annealed NH₃-nitrided oxide. The TDDB characteristics have been measured for wet, NO and O₂ annealed NH₃-nitrided oxide. It was observed that the endurance of wet and NO annealed NH₃-nitrided oxide is the same, but the O₂ annealed NH₃-nitrided oxide has a lot of initial failure at the same stress of −11 MV cm⁻¹. From the experimental results, it can be said that NO annealing not only removes H which comes from the NH₃ nitridation but also improves the oxide reliability by replacing strained Si–O bonds for a stable Si–N bond.     

Charge-trapping characteristics of BaTiO3 with and without nitridation for nonvolatile memory applications

The charge-trapping characteristics of BaTiO₃ with and without nitrogen incorporation were investigated based on Al/Al₂O₃/BaTiO₃/SiO₂/Si (MONOS) capacitors. The physical properties of the high-k films were analyzed by transmission electron microscopy and X-ray photoelectron spectroscopy. Compared with the MONOS capacitor with BaTiO₃ as charge-trapping layer, the one with nitrided BaTiO₃ showed higher program speed even at lower operating voltage (4.3 V at +8 V for 100 μs), better endurance property and smaller charge loss (charge loss of 10.6% after 10⁴ s at 85 °C), due to the nitrided BaTiO₃ film exhibiting higher charge-trapping efficiency caused by nitrogen incorporation and suppressed leakage induced by nitrogen passivation.     

Aging characteristics of ZnO–V2O5-based varistors for surge protection reliability

The effect of sintering temperature on clamping characteristics and pulse aging behavior of V₂O₅/MnO₂/Nb₂O₅ co-doped zinc oxide varistors was systematically investigated at 875–950 °C. Experimental results related to varistor effect showed that the breakdown field decreased dramatically from 6830 to 968 V/cm with the increase in the sintering temperature and the non-ohmic coefficient exhibited a maximum (49.5) at 900 °C in the sintering temperature. Varistors sintered at 900 °C exhibited the best clamp characteristics for the pulse current of 1–100 A, with the clamp voltage ratio of K = 1.86–2.77. Varistors sintered at 875 °C exhibited the strongest stability; variation rates for the breakdown field, for the non-ohmic coefficient, and for the leakage current density were −14.2%, −63.6%, and 59.0%, respectively, after application of a multi-pulse current of 100 A.     

Growth and characterization of indium oxide diodes prepared by reactive magnetron sputtering

The electrical properties of Cr/Pt/Au and Ni/Au ohmic contacts with unintentionally doped In₂O₃ (U-In₂O₃) film and zinc-doped In₂O₃ (In₂O₃:Zn) prepared by reactive magnetron sputtering deposition are described. The lowest specific contact resistance of Cr/Pt/Au and Ni/Au is 2.94 × 10⁻⁶ and 1.49 × 10⁻² Ω-cm², respectively, as determined by the transmission line model (TLM) after heat treatment at 300 °C by thermal annealing for 10 min in nitrogen ambient. The indium oxide diodes have an ideality factor of 1.1 and a soft breakdown voltage of 5 V. The reverse leakage current prior to breakdown is around 10⁻⁵ A.     

4H–SiC BJTs with current gain of 110

4H–SiC BJTs with a common emitter current gain of 110 have been demonstrated. The high current gain was attributed to a thin base of 0.25 μm which reduces the carrier recombination in the base region. The device open base breakdown voltage (BV_CEO) of 270 V was much less than the open emitter breakdown voltage (BV_CBO) of 1560 V due to the emitter leakage current multiplication from the high current gain by “transistor action” of BJTs. The device has shown minimal gain degradation after electrical stress at high current density of >200 A/cm²up to 25 h.     

HCS degradation of 5 nm oxide high-voltage PLDMOS

Hot carrier (HC) injection, inducing drain and gate leakage current increase in 5 nm oxide p-channel LDMOS transistors, is investigated. Devices with two different drain implants are studied. At low gate voltage (V_GS) and high drain voltage (V_DS), reduction of the ON-resistance (R_ON) is observed. At stress times at which R_ON almost reaches its constant level, an increase of the drain leakage in OFF state (V_DS = −60 V, V_GS = 0 V) is observed. Longer stress time leads to increased gate leakage and in some cases oxide breakdown. In contrast to what was reported for devices with 25 nm gate oxide thickness, the threshold voltage of 5 nm gate oxide PLDMOS transistors does not drift. The experimental data can be fully explained by hot carrier injection and the oxide damage can be explained by two different and competing degradation mechanisms. By combining experimental data and TCAD simulations we are further capable to locate the hot spot of maximum oxide damage in the accumulation (Acc) region of the PLDMOS.     

Nonohmic properties of V/Mn/Nb/Gd co-doped zinc oxide semiconducting varistors with low-temperature sintering process

The microstructure and nonohmic properties of the ZnO–V₂O₅–MnO₂–Nb₂O₅–Gd₂O₃ (ZVMNG) semiconducting varistors were systematically investigated at low sintering temperature. With increasing sintering temperature, the average grain size increased from 4.1 to 11.7 μm, the sintered densities decreased from 5.54 to 5.42 g/cm³, and the breakdown field decreased noticeably from 7138 to 920 V/cm. The sample sintered at 900 °C exhibited excellent nonohmic properties, which are 66.1 in the nonohmic coefficient and 77 μA/cm² in the leakage current density.