Characterization of p-type multicrystalline silicon prepared by cold crucible continuous melting and directional solidification

A solar-grade boron doped silicon ingot with the cross section of 62 mm× 62 mm was cast by cold crucible continuous melting and directional solidification (CCDS). The characterization of this p-type multicrystalline silicon (mc-Si) was measured and evaluated. The results indicate that the ingot mainly consists of uniform columnar grains preferentially aligned parallel to the ingot growth direction. The average density of dislocations (N_dis) in the center area varies from 4 × 10⁴ cm⁻² to 4 × 10⁵ cm⁻², and it is much lower than that in the peripheral area. Comparing with the raw material, the oxygen concentration in the cast ingot is much lower while the carbon holds the same level. The electrical resistivity distributes uniformly and its average value is same as that of the raw material. The minority carrier lifetime (MCLT) is higher than that of the raw material and no region with obvious low MCLT is observed. CCDS has shown to be a potential process to produce mc-Si for solar cells with no crucible contamination and consumption, high production efficiency and uniform quality.     

Hybrid dual gate ferroelectric memory for multilevel information storage

Here, we report hybrid organic/inorganic ferroelectric memory with multilevel information storage using transparent p-type SnO semiconductor and ferroelectric P(VDF-TrFE) polymer. The dual gate devices include a top ferroelectric field-effect transistor (FeFET) and a bottom thin-film transistor (TFT). The devices are all fabricated at low temperatures (∼200 °C), and demonstrate excellent performance with high hole mobility of 2.7 cm² V⁻¹ s⁻¹, large memory window of ∼18 V, and a low sub-threshold swing ∼−4 V dec⁻¹. The channel conductance of the bottom-TFT and the top-FeFET can be controlled independently by the bottom and top gates, respectively. The results demonstrate multilevel nonvolatile information storage using ferroelectric memory devices with good retention characteristics.     

A fundamental understanding of nickel oxide based resistive random access memory with high percentage of oxygen

In this paper, we report the fundamental properties of NiO_x based Resistive RAM (RRAM) devices with Al top electrode and Ni bottom electrode. The NiO_x deposition was performed in a relatively high oxygen environment. The initial J–V curves in positive and negative bias indicated symmetric behavior in spite of a significant difference in the vacuum work functions of Al and Ni. The capacitance–voltage characterizations indicated NiO_x to be a p-type semiconductor with acceptor doping density between 6 × 10¹⁸ cm^?3 and 5 × 10²⁰ cm^?3. Switching behavior was observed after electroforming the devices. The devices failed after multiple switching cycles by switching into a relatively low conductive state. The mechanism of failure was attributed to the formation of Al₂O₃ due to a slow oxidation of Al electrodes with repeated cycles.     

Region-dependent behavior of I–V characteristics in n-ZnO:Al/p-Si contacts

The discrepancy of rectifying characteristics in n-ZnO:Al/p-Si heterojunctions from diode to diode was demonstrated by region dependent dark I–V characteristics, where the junction is laterally cut to sequentially decrease the area. Further investigation shows that the junction (2.1×2.1 cm²) with the barrier height Φ=0.693 eV consists of one part (2.1×1.4 cm²) with Φ=0.695 eV and the other part (2.1×0.7 cm²) with Φ=0.686 eV. It is found that reverse currents saturate with different values of 3.6×10^?3, 2.5×10^?3 and 1.58×10^?3 A for the light I–V curves of the three junctions with the same areas. To explain this peculiarity, the probable reason is discussed in terms of carrier transportation through the spatially fluctuating barrier.     

High-performance n-type organic field-effect transistors fabricated by ink-jet printing using a C60 derivative

We report on the performance of ink-jet-printed n-type organic thin-film transistors (OTFTs) based on a C₆₀ derivative, namely, C₆₀-fused N-methyl-2-(3-hexylthiophen-2-yl)pyrrolidine (C₆₀TH-Hx). The new devices exhibit excellent n-channel performance, with a highest mobility of 2.8 × 10^?2 cm² V^?1 s^?1, an I_On/I_Off ratio of about 1 × 10⁶, and a threshold voltage of 7 V. The C₆₀TH-Hx films show large crystalline domains that result from the influence of an evaporation-induced flow, thus leading to high electron mobility in the ink-jet-printed devices.     

The influence of junction depth on short channel effects in vertical sidewall MOSFETs

This work addresses a fundamental problem of vertical MOSFETs, that is, inherently deep junctions that exacerbate short channel effects (SCEs). Due to the unconventional asymmetric junction depths in vertical MOSFETs, it is necessary to look separately at the electrostatic influence of each junction. In order to suppress short channel effects better, we explore the formation of a shallow drain junction. This is realized by a self-aligned oxide region, or junction stop (JS) which is formed at the pillar top and acts as a diffusion barrier for shallow junction formation. The benefits of using a JS structure in vertical MOSFETs are demonstrated by simulations which show clearly the effect of asymmetric junctions on SCEs and bulk punch-through. A critical point is identified, where control of SCEs by junction depth is lost and this leads to appropriate junction design in JS vertical sidewall MOSFETs. For a 70 nm channel length the JS structure improves charge sharing by 54 mV and DIBL by 46 mV. For body dopings of 5.0 × 10¹⁷ cm^?3 and 6.0 × 10¹⁷ cm^?3 the JS gives improvements in I_off of 58.7% and 37.8%, respectively, for a given I_on. The inclusion of a retrograde channel gives a further increase in I_on of 586 μA/μm for a body doping of 4.0 × 10¹⁸ cm^?3.     

A study of charge transport in a novel electroluminescent poly(phenylene vinylene-co-fluorenylene vinylene) based π-conjugated polymer

The charge transport properties in a novel electroluminescent poly{[2-(4′,5′-bis(3″-methylbutoxy)-2′-p-methoxy-phenyl)phenyl-1,4-phenylene vinylene]-co-(9,9-dioctyl-2,7-fluorenylene vinylene)} (BPPPV-PF) have been studied using a time-of-flight (TOF) photoconductivity technique. The TOF transients for holes were recorded over a range of temperatures (207–300 K) and electric fields (1.5 × 10⁵–6.1 × 10⁵ V/cm). The hole transport in this polymer was weakly dispersive in nature with a mobility at 300 K of 5 × 10⁻⁵ cm²/V s at 2.5 × 10⁵ V/cm. This increased to 8.4 × 10⁻⁵ cm²/V s at 6.1 × 10⁵ V/cm. The temperature and field dependence of charge mobility has been analyzed using the disorder formalisms (Bässler’s Gaussian disorder model (GDM) and correlated disorder model (CDM)). The fit with Gaussian disorder (GDM) model yielded the mobility pre-factor μ_∞ = 1.2 × 10⁻³ cm²/V s, energetic disorder parameter σ = 82 meV and positional disorder parameter Σ = 1.73. The average inter-site separation (a = 7 Å) and the charge localization length (L = 3.6 Å) was estimated by assuming the CDM type charge transport. The microscopic charge transport parameters derived for this polymer are almost identical to the reported values for fully conjugated polymers with high chemical purity. The results presented indicate that the charge transport parameters can be controlled and optimized for organic optoelectronic applications.     

Characteristics of ZnOV2O5MnO2Nb2O5Er2O3 semiconducting varistors with sintering processing

The effects of sintering temperature on the microstructure, electrical properties, and dielectric characteristics of ZnOV₂O₅MnO₂Nb₂O₅Er₂O₃ semiconducting varistors have been studied. With increase in sintering temperature the average grain size increased (4.5–9.5 μm) and the density decreased (5.56–5.45 g/cm³). The breakdown field decreased with an increase in the sintering temperature (6214–982 V/cm). The samples sintered at 900 °C exhibited remarkably high nonlinear coefficient (50). The donor concentration increased with an increase in the sintering temperature (0.60×10¹⁸–1.04×10¹⁸ cm^?3) and the barrier height exhibited the maximum value (1.15 eV) at 900 °C. As the sintering temperature increased, the apparent dielectric constant increased by more than four-fold.     

Solution processable organic p–n junction bilayer vertical photodiodes

Organic p–n bilayer photodiodes were produced by solution casting poly(3-hexylthiophene) (P3HT) from chlorobenzene and phenyl-C₆₁-butyric acid methyl ester (PCBM):poly(4-chlorostyrene) (PClS) blends from the nearly orthogonal solvent dichloromethane onto flexible indium tin oxide (ITO)/polyester as a substrate. This is the first demonstration of PCBM–inert polymer blends for such a device. The electron mobility of a 90% PCBM–10% PClS blend was 3.5 × 10^?3 cm²/V s in a field-effect transistor. The diodes showed a rectification ratio of 2.0 × 10³ at ±2.0 V with a forward bias current density as high as 340 μA/cm² at 2.0 V in the dark. Irradiation with various light sources (0.013–291 mW/cm²) under ambient atmosphere generated a linear increase in photocurrent. Photodiodes with thinner active layers showed larger photocurrent and relative photoresponse, probably because of lower series resistance and lower recombination probability. The reverse bias response was less dependent on device area than the forward bias response. Photocurrents from multiple devices in parallel were additive as expected. The results demonstrate a simple fabrication route to light detectors compatible with solution processes and flexible substrates.     

Lifetime tests of 600-V GaN-on-Si power switches and HEMTs

We present the first systematic lifetime tests which show excellent long-term reliability for 600 V GaN-on-Si power switches.High voltage accelerated life testing in the OFF-state yields a field related mean-time-to-failure (MTTF) greater than 3 × 10⁸ h for a 600 V operating condition. High temperature accelerated testing in the ON-state gives an MTTF of about 6 × 10⁸h at a 150 °C use condition. High temperature operating life testing using hard switched boost converters at 175 °C shows no measurable device degradation after 3000 h of operation. These results show that the intrinsic reliability of the new device technology is more than adequate for commercial and industrial power electronics applications.     

Substrate temperature effect on structural,optical and electrical properties of vacuum evaporated SnO2 thin films

Tin oxide (SnO₂) thin films were deposited on glass substrates by thermal evaporation at different substrate temperatures. Increasing substrate temperature (T_s) from 250 to 450 °C reduced resistivity of SnO₂ thin films from 18×10⁻⁴ to 4×10⁻⁴▒ Ω ▒cm. Further increase of temperature up to 550 °C had no effect on the resistivity. For films prepared at 450 °C, high transparency (91.5%) over the visible wavelength region of spectrum was obtained. Refractive index and porosity of the layers were also calculated. A direct band gap at different substrate temperatures is in the range of 3.55−3.77 eV. X-ray diffraction (XRD) results suggested that all films were amorphous in structure at lower substrate temperatures, while crystalline SnO₂ films were obtained at higher temperatures. Scanning electron microscopy images showed that the grain size and crystallinity of films depend on the substrate temperature. SnO₂ films prepared at 550 °C have a very smooth surface with an RMS roughness of 0.38 nm.     

Characterization of MIS structures and thin film transistors using RF-sputtered HfO2/HIZO layers

MIS structures using HfO₂ and HIZO layers, both deposited by room temperature RF magnetron sputtering are fabricated for TFTs application and characterized using capacitance-voltage. The relative dielectric constant obtained at 1 kHz was 11, the charge carrier concentration of the HIZO was in the range of (2–3) × 10¹⁸ cm^− 3 and the interface trap density at flat band was smaller than 2 × 10¹² cm^− 2. The critical electric field of the HfO₂ layer was higher than 5 × 10⁵ V/cm, with a current density in the operating voltage range below 4 × 10^− 8 A/cm². The hysteresis and bias stress behavior of RF-sputtered HfO₂/HIZO MIS structures is presented. Fabricated HfO₂/HIZO TFTs worked in the operation voltage range below 8 V.     

Low power high gain CMOS LNA based on inverter cell and self-body bias for UWB receivers

A low-power low-noise amplifier (LNA) utilized a resistive inverter configuration feedback amplifier to achieve the broadband input matching purposes. To achieve low power consumption and high gain, the proposed LNA utilizes a current-reused technique and a splitting-load inductive peaking technique of a resistive-feedback inverter for input matching. Two wideband LNAs are implemented by TSMC 0.18 μm CMOS technology. The first LNA operates at 2–6 GHz. The minimum noise figure is 3.6 dB. The amplifier provides a maximum gain (S₂₁) of 18.5 dB while drawing 10.3 mW from a 1.5-V supply. This chip area is 1.028×0.921 mm². The second LNA operates at 3.1–10.6 GHz. By using self-forward body bias, it can reduce supply voltage as well as save bias current. The minimum noise figure is 4.8 dB. The amplifier provides a maximum gain (S₂₁) of 17.8 dB while drawing 9.67 mW from a 1.2-V supply. This chip area is 1.274×0.771 mm².     

Influence of working pressure on the structural,optical and electrical properties of sputter deposited AZO thin films

Highly oriented crystalline aluminum doped zinc oxide (AZO) films were sputter deposited on glass substrates and a systematic investigation on the as deposited and etched films was reported for its further application in silicon thin film solar cell. Influence of the deposition pressure (from 2 to 8 mTorr) and post-annealing temperature (at 400 °C for 5 min) on the structural, optical and electrical properties of the as-deposited and etched samples were analyzed. The optimum condition for its reproducibility and large area deposition is determined and found that the depositions made at 8 mTorr at 200 W having the distance from source to substrate of 9 cm. All the AZO films exhibited a c-axis preferred orientation perpendicular to the substrate and their crystallinity was improved after annealing. From the XRD pattern the grain size, stress and strain of the films were evaluated and there is no drastic variation. Optical transmittance, resistivity, Hall mobility and carrier concentration for the as deposited and etched-annealed films were found to improve from 79 to 82%; 2.97 to 3.14×10⁻⁴ Ω cm; 25 to 38 cm²/V s; 8.39 to 5.96×10²⁰/cm³ respectively. Based on the triangle diagram between figure of merit and Hall mobility, we obtained a balance of point between the electrical and optical properties to select the deposition condition of film for device application.     

High-performance barrier using a dual-layer inorganic/organic hybrid thin-film encapsulation for organic light-emitting diodes

We report an inorganic/organic hybrid barrier that combines the alternating deposition of a layer of ZrO₂ using low temperature atomic layer deposition and a 16-μm-thick layer of UV-curable NOA63 epoxy using spin-coating. The effective water vapor transmission rates of single ZrO₂ film was improved by adding solution epoxy from 3.03 × 10⁻³ g/m² day to 1.27 × 10⁻⁴ g/m² day in the hybrid NOA63/ZrO₂/NOA63/ZrO₂ films at 20 °C and a relative humidity of 60%. In consequence, the organic light-emitting diodes encapsulated with inorganic/organic hybrid barriers were undamaged by environmental oxygen and moisture and their luminance decay time improved by a considerable extent.     

Pentacene thin film transistors fabricated by solution process with directional crystal growth

We have fabricated solution-processed pentacene thin film transistor arrays with mobilities as high as 1.0 cm²/V s, evaluated at a low drain voltage of ?10 V. This is achieved by controlling the growth direction of the pentacene films from solution, and by optimizing conditions for drop casting. Crystal growth of the solution-processed pentacene films is found to proceed in one direction on a tilted substrate. Grazing incidence X-ray diffraction and electron diffraction reveal that the crystal growth azimuth corresponds to the direction along the minor axis of the a–b plane in the unit cell of the pentacene crystal. This directional growth method is extended to solution processing on large glass substrates with an area of 150 × 150 mm², thereby yielding transistor arrays with two-dimensional uniformity and high carrier mobility.     

Investigation of TiO2 on AlGaAs prepared by liquid phase deposition and its application

The study explored titanium dioxide (TiO₂) on aluminum gallium arsenide (AlGaAs) prepared by liquid phase deposition (LPD) at 40 °C. The leakage current density was about 8.4 × 10^?6 A/cm² at 1 MV/cm. The interface trap density (D_it) and the flat-band voltage shift (ΔV_FB) were 2.3 × 10¹² cm^?2 eV^?1 and 1.2 V, respectively. After rapid thermal annealing (RTA) in the ambient N₂ at 350 °C for 1 min, the leakage current density, D_it, and ΔV_FB were improved to 2.4 × 10^?6 A/cm² at 1 MV/cm, 7.3 × 10¹¹ cm^?2 eV^?1, and 1.0 V, respectively. Finally, the study demonstrates the application to the AlGaAs/InGaAs metal–oxide–semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT). The results indicate the potential of the proposed device with a LPD-TiO₂ gate oxide for power application.     

A simple CMOS process compatible high performance parallel-stacked spiral inductor for advanced RF analog circuit applications

A high Q on-chip inductor with some unique structures has been fabricated with 0.13 μm CMOS compatible process for the first time. The unique structures including parallel stacked, line via between inter-metal layers, and use the top signal pad as the under path of the inductor instead of conventional bottom signal pad. These structures offer advantages of reducing resistance, high Q value, simple preparing process and small chip area. Experimental results show that the measured peak Q and peak-Q frequency can attain 7.06 and 1.8 GHz, respectively for the structure with four metal layers in parallel, 15 μm in metal width, 5.5 turns in wire number,and an area of 204×240 μm². The results have a better potential for advanced mobile communication applications.     

2 MeV ion irradiation effects on AlGaN/GaN HFET devices

AlGaN/GaN heterostructure field effect transistors (HFETs) were irradiated with 2 MeV protons, carbon, oxygen, iron and krypton ions with fluences ranging from 1 × 10⁹ cm^?2 to 1 × 10¹³ cm^?2. DC, pulsed I–V characteristics, loadpull and S-parameters of the AlGaN HFET devices were measured before and after irradiation. In parallel, a thick GaN reference layer was also irradiated with the same ions and was characterized by X-ray diffraction, photoluminescence, Hall measurements before and after irradiation. Small changes in the device performance were observed after irradiation with carbon and oxygen at a fluence of 5 × 10¹⁰ cm^?2. Remarkable changes in device characteristics were seen at a fluence of 1 × 10¹² cm^?2 for carbon, oxygen, iron and krypton irradiation. Similarly, remarkable changes were also observed in the GaN layer for irradiations with fluence of 1 × 10¹² cm^?2. The results found on devices and on the GaN layer were compared and correlated.     

Bottom gate organic thin-film transistors fabricated by ultraviolet transfer embossing with improved device performance

Ultraviolet transfer embossing is optimized to fabricate bottom gate organic thin-film transistors (OTFTs) on flexible plastic substrates, achieving significant improved device performance (μ = 0.01–0.02cm²/Vs; on/off ratio = 10⁴) compared with the top gate OTFTs made previously by the same method (μ = 0.001–0.002 cm²/Vs; on/off ratio = 10²). The performance improvement can be ascribed to the reduced roughness of the dielectric-semiconductor interface (R_rms = 0.852 nm) and thermally cross-linked PVP dielectric which leads to reduced gate leakage current and transistor off current in the bottom-gated configuration. This technique brings an alternative great opportunity to the high-volume production of economic printable large-area OTFT-based flexible electronics and sensors.