几种成形滤波器的抗时钟抖动性能的比较

提出了一种码间串扰量的测试准则，它是均方意义下眼图开启度测试准则的推广。利用此准则对几种不同的成形滤波器的抗时钟抖动性能进行了精确的数值分析，证明引进滚降系数α可以提高滤波器的抗时钟抖动性能，并且随着参数α的增加，抗时钟抖动性能提高。对同一参数α，数值分析结果表明，利用矩形窗设计的成形滤波器和利用ＤＪ（ｄｏｕｂｌｅｊｕｍｐ）谱设计的成形滤波器的抗时钟抖动性能较好。     

用线性调频信号调制解决码间串扰问题

该文提出用线性调频信号调制的方法解决码间串扰的问题。为了与其它调制方法进行对比,分别从公式推导和误码率两方面进行讨论,并给出仿真结果。理论推导和实际仿真结果都表明,利用线性调频信号进行调制,可以很好的抑制码间串扰。在恶劣的环境中(平均多径时延较大)仍然可以保持较高的传输速率。线性调频调制技术的优点是：不需在接收端添加均衡滤波器,也不须进行扩频编码。     

光纤接收机码间串扰测试

光纤通信系统的测试仪表大多建立在光学和电子学原理之上,因此系统复杂、设备昂贵.本文给出了不需要这些昂贵测试设备却又能进行测试的方法.本文首先从原理上探讨了光纤接收机码间串扰的抑制方法,并从中得到了用示波器观察光纤接收机码间串扰的启发,最后介绍了两种关于光纤接收机码间串扰的简单测试法,为测试设计、测试执行人员在进行光纤接收机码间串扰测试时提供了一种思路.     

QAM系统中码间串扰的抑制方法研究

通过RLS时域均衡和匹配滤波法实现了抑制码间串扰(ISI).在Simulink平台下,对这两种方法进行了仿真验证.仿真结果表明,RLS时域均衡器和匹配滤波器可以很好地抑制码间串扰,从而降低误码率,提高信息的传输质量.     

考虑串扰影响的时延测试

超深亚微米工艺下，串扰的出现会导致在电路设计验证、测试阶段出现严重的问题。本文介绍了一个基于波形敏化的串扰时延故障测试生成算法。该算法以临界通路上的串扰时延故障为目标故障进行测试产生．大大提高了算法的效率。实验表明，以该算法实现的系统可以在一个可接受的时间内。对一定规模的电路的串扰时延故障进行测试产生。     

基带信号无码间串扰的研究与仿真

主要以基带信号为基础,通过使用Systemview软件实现对基带传输系统的仿真,研究基带信号的码间串扰问题,并在此分析基础上,利用具体余弦函数通过系统,得出了无码间干扰的条件,解决了应码间干扰引起的信号误判问题.     

一种避免码间串扰的LED驱动芯片

针对单线传输LED驱动器在多级联传输时存在高误码率的问题,采用信号"护城河"技术,设计了一种避免码间串扰的LED驱动芯片。芯片具有三路PWM驱动端口,可实现256级灰度输出,为防止数据衰减,数据自动整形转发。通过引入"护城河"技术,隔离相邻数据,消除延时误差积累,从而避免码间串扰。实测结果表明,"护城河"技术在相邻码间建立了一个稳定时长大于196μs的低电平,并且在800 kbit/s的传输速率下,传输特性良好。该芯片有望用于大型户外显示屏中。     

一种解决蓝牙码间串扰的新方法

针对现有蓝牙技术规程中实际存在的一些问题进行了研究,并依照蓝牙规程,对其在高斯白噪声以及多径信道下的传输进行了仿真和分析,发现蓝牙技术中所采用的慢跳频技术并不能很好地抵抗多径干扰;在此基础上提出,若在蓝牙技术中加入一种网格维特比译码算法能有效地降低误码率,从而可以提高蓝牙的传输距离。     

平行传输线间串扰的仿真及分析

在高速电路设计中,信号完整性问题越来越突出,已经成为高速电路设计师不可避免的问题。该文重点研究了平行传输线间的串扰问题,通过信号完整性分析软件Hyperlynx建立了三线串扰模型并进行仿真分析,最后提出高速PCB设计中减小串扰噪声的策略。     

机载线缆间的串扰耦合分析

串扰是机载设备间互联线缆干扰耦合的重要因素。以混合模S参数为基础,建立单线-双绞线模型以模拟机载设备之间的动力线缆对信号线产生的串扰耦合。在此模型基础上提出串扰耦合测试方案,搭建串扰耦合测试系统,并根据测试获得的耦合系数评估单线-双绞线线间串扰耦合强弱。通过测试比较,对影响因素进行分析,结果表明,距地高度对线间串扰影响不大,线间距对线间串扰耦合影响显著,因此在条件允许下尽可能增加设备间互联线缆的间距可有效抑制串扰耦合。     

Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division

This paper presents a new method for measuring random timing jitter or sinusoidal timing jitter in signals of telecommunication devices. The method uses a divide-by-M circuit to reduce the frequency and the number of clock samples, and applies the Hilbert transform to measure the timing jitter. This new frequency division method is validated with experimental data from a serializer-deserializer device and a modulated signal source generating a 2.5 GHz FM signal.     

干扰抖动的非线性损伤及抑制方法

输入抖动与码速调整过程的非线性相互作用，将会产生一种低频的干扰抖动。这一干扰抖动的存在，会使近年来提出的减小抖动方法的抖动转移特性劣化。本文提出干扰抖动的概念，讨论了干扰抖动产生的机理。结果表明，当输入码流中有与塞入率相近频率的输入抖动时，由于非线性效应会产生较大的低频干扰抖动损伤。文中分析了干扰抖动下的抖动转移特性，提出了抑制这一干扰抖动的方法和干扰抖动的测试方法。     

Cyclic Intersymbol Interference of Frequency-Domain Decision-Feedback Equalizer: Effect and Mitigation

This paper investigates an inherent but adverse phenomenon called cyclic intersymbol interference (cyclic ISI) occurred in frequency-domain decision-feedback equalizer (FD-DFE). The cyclic ISI is due to the cyclic-prefix insertion and modulo operation of the time-domain feedback filter. To analyze and further mitigate this problem, we first formulate the FD-DFE signal model in a compact and insightful vector-matrix form, which allows an efficient derivation of the MMSE receiver coefficients. Then, by viewing the bit-error-rate profile (BERP) with respect to different starting symbol position within a symbol block, it is shown that those leading data symbols suffer more from the cyclic-ISI effect and lead to a high error floor. Seeing this, a novel FD-DFE receiver structure, called P2B-FD-DFE (parallel-two-branch FD-DFE) receiver, is proposed to overcome this problem without sacrificing spectral efficiency. It consists of two parallel cooperating branches of almost identical FD-DFE receivers designed for different cyclic decision delays. Under severe cyclic-ISI circumstances, the receiver performance can be further improved by using (1) a larger block size, and/or (2) a cascade of multiple feedback stages. Simulation results demonstrate that, in severe ISI channel, while the conventional FD-DFE exhibits a very high error floor, our proposed receiver can almost completely suppress the cyclic-ISI effect. Rih-Lung Chung was born in Taoyuan, Taiwan R.O.C. He received the B.S. degree and finished the M.S. courses both in electrical engineering from Yuan-Ze University, Taiwan R.O.C., in 1998 and 1999, respectively. Now he is working on his doctoral degree. His research interests include digital communication, statistical signal processing, and channel estimation/equalization, especially for wireless communication system. Jeng-Kuang Hwang was born in Taipei, Taiwan, in 1962. He received the Ph.D. degree in electrical engineering from the National Tsing-Hua University, Hsin-Chu, Taiwan, in 1991. Currently, he is an associate professor with the Communication Engineering Department at Yuan-Ze University, Chung-Li, Taiwan. In 1997, he had been a visiting professor at AT&T Labs/Research, Redbank, NJ, doing researches on smart antennas for wireless communications. He has published over 70 journal and conference papers, and hold one US patent. His current research interests include communication and statistical signal processing, smart antennas, software-defined radios, VLSI signal processing, and power line communications.     

光子计数激光雷达游走误差与时间抖动的研究

光子计数激光雷达具有灵敏度高、体积小等特点,是未来远距离探测激光雷达的发展方向。光子计数激光雷达在探测时会产生游走误差,从而影响系统的测距精度。文章就游走误差与探测器时间抖动之间的关系进行了理论分析与实验验证。首先,基于激光雷达方程、单光子探测器时间抖动与光子计数探测的概率统计特性,建立了激光回波信号与探测器时间抖动的数学模型;然后使用该模型进一步推导了探测器时间抖动与游走误差之间的关系,计算分析与仿真实验都表明:系统的游走误差与探测器时间抖动呈正相关关系。最后,使用拥有不同时间抖动的单光子探测器进行了实验,实验结果表明:当探测器时间抖动标准差分别为15,350和1152ps时,游走误差分别为0.88,2.55和12.56cm。     

Effect and Compensation of Colored Timing Jitter in Pulsed UWB Systems

Ultra-wideband (UWB) systems impose a stringent requirement on the jitter performance of the system clock. So far, only the effect of white Gaussian timing jitter has been considered in the literature via numerical simulation. However, practical clocks commonly exhibit colored jitter. In this paper, we first investigate the bit error rate (BER) performance of a single-user binary pulse position modulation UWB system subjected to white and colored Gaussian jitter. It is shown that colored jitter degrades BER performance much more than white jitter, and the extent of degradation increases as the jitter bandwidth decreases. Motivated by this result, we then propose a new jitter compensation scheme to improve the BER performance under colored jitters with small jitter bandwidth, in which each information-bearing data symbol is coupled with a pilot symbol. The proposed scheme attempts to track first the jitter for the current pilot symbol by making use of the pulse-template correlation function. This information is then used together with the known clock jitter bandwidth and jitter root-mean-square (RMS) value to detect the current data symbol according to the maximum likelihood criterion. Simulation results show that the algorithm is effective in improving the BER performance for colored jitters with small jitter bandwidth. Lei Huang received the B.Sc. degree from Xi'an Jiaotong University, China, in 1993, the M. Sc. degree from South China University of Technology in 1996, and the Ph.D. degree from Victoria University of Technology (VUT), Australia, in 2003, all in Electrical Engineering. From 1996 to 1999, he was a Lecturer at South China University of Technology. From March 2003 to December 2005, he was with National University of Singapore as a Research Fellow. Since January 2006, he has been working in Panasonic Singapore Laboratories as an R & D Engineer. His research interests focus on physical layer aspects on wireless communication systems, especially CDMA, ultrawideband and millimeter wave communications.     

用相位噪声和谐波分析法测量激光脉冲的时基抖动

对测量光脉冲时基抖动的相位噪声测量技术和谐波频谱分析方法进行了实验比较。实验表明,谐波频谱技术由于受频谱仪内部噪声和测量带宽的限制不适合测量低抖动高重复频率的光脉冲。相位噪声测量技术不需要带宽频谱仪,测量动态范围大,可从真实信号中区分出虚假信号,其测量精度高于10fs。同时指出,用相位噪声技术测量时基抖动时,以低频噪声区间来替代整个重复频率的积分区间是不严谨的。     

A Design Method of Hybrid Analog/Asymmetrical‐FIR Pulse‐Shaping Filters with an Eye‐Opening Control Option against Receiver Timing Jitter

This paper presents a method of designing hybrid analog/asymmetrical square‐root (SR) FIR filters. In addition to the conventional frequency domain constraints, the proposed method considers time‐domain constraints as well, including the inter‐symbol interference (ISI) and the opening of the eye pattern at the receiver output. This paper also reviews a systematic way to find the discrete‐time equivalence of analog parts in a band‐limited digital communication system. Thus, a phase equalizer can be easily realized to compensate for the nonlinear phase responses of the analog components. With the hybrid analog/SR FIR filter co‐design, examples show that using the proposed method can result in a more robust ISI performance in the presence of the receiver clock jitter.     

PLC控制系统干扰的形成及对策

作为现代工业控制三大支柱技术之一的PLC技术,广泛应用于各行各业和生产的各个环节,受到普遍的关注和重视。PLC控制系统在工控领域是应用比较普遍的控制手段,大量的实践表明对于现场干扰的抑制能力,将直接影响着系统的使用。首先分析了干扰的分类及其形成过程,接着从硬件和软件不同角度加以剖析,给出具体对策。     

铁路列车无线调度电话干扰问题初探

说明了铁路天津枢纽地区无线列车调度电话系统使用现状,筒单分析了干扰产生的原因,探讨了解决干扰问题的几点设想。