Higher harmonic generation in CMOS/SOS ring oscillators

Harmonic generation is found with 101-stage ring oscillators. Harmonics have not been observed for the usual ring oscillators with a small number of stages. If one mistakes the higher harmonic generation for the fundamental, he obtains a wrong propagation delay which is shorter than the real one. It is shown experimentally and theoretically that only odd harmonics are generated for the ring oscillators with an odd number of stages. The propagation delay tpdof the nth harmonic oscillation is given byt_{pd} = n cdot T/2NwhereTis the observed repetition period andNthe number of stages. Computer simulation shows that a ring oscillator with an even number of stages can also oscillate if every inverter is the same, and that the oscillation decays if there is asymmetry in the inverter chain. IfNis large and the effects of the deviations of the transistor parameters cancel one another, the harmonic oscillation that happens to be generated can continue.     

A new method to enhance frequency operation of CMOS ring oscillators

This article proposes a frequency-boosting method for CMOS ring oscillators. It consists of adding RC-based differentiators in delay cells to speed up their transient responses. Two novel delay cells for simple and differential versions are presented. On using MOS transistor components to implement the differentiators, the resulting increase of surface area is observed to be moderate, and this allows frequency tuning by voltage control, without inducing additional phase noise. The presented circuits are suitable for low-voltage operation. Simulation results on the proposed circuits have shown significant frequency enhancement with a competitive factor of merit.     

Analysis of frequency and amplitude in CMOS differential ring oscillators

In this paper, a new method for computing the amplitude and frequency of differential ring oscillators (ROs) is proposed. The analysis is performed in two separate parts. In the first of these, equations are derived with the assumption of a sinusoidal waveform of outputs, while in the other, the outputs are assumed to be exponential. It is shown that the derived equations for frequency and amplitude are sufficiently exact. In addition, conditions in which sinusoidal and exponential output occur are thoroughly discussed. In the instances in which the results did not satisfy the necessary conditions for sinusoidal output, the output is assumed to be exponential. Moreover, the related analytical equations are written, and the new expressions for frequency and amplitude of ROs are derived. Analytical results are confirmed by simulation results, using the Taiwan Semiconductor Manufacturing Company 0.18 µm technology model. The simulation results indicate the high level of accuracy of the proposed model.     

Total dose radiation effects on CMOS ring oscillators operating during irradiation

Total dose radiation effects on propagation delay time were discussed, utilizing 1.5-µm CMOS/SOS ring oscillators with substrate electrodes, irradiated to 10⁵rad (Si) with power on. Propagation delay times after irradiation have been successfully predicted by circuit simulation, based on experimental NMOS and PMOS threshold shift data including gate bias dependence during irradiation. It has also been found that the substrate bias condition during irradiation significantly affects post-rad device characteristics. The importance of taking into account substrate bias condition during irradiation in regard to an irradiated scaled circuit performance prediction, is discussed based on the above mentioned results.     

Fourth harmonic generation in a resonant ring cavity

We have analyzed the generation of the fourth harmonic of pulsed laser radiation in a ring cavity that resonates at the second harmonic wavelength. With the help of numerical simulation, the dependence of the conversion efficiency on input laser power as well as cavity loss and nonlinear crystal coefficient is obtained. The model predicts over 50% conversion from the fundamental to the fourth harmonic with less than 1.2 MW of input power (10 mJ in 8.5 ns). The results compare well with experimental measurements where 39.5% infrared-ultraviolet conversion was obtained using low power from a Q-switched Nd:YAG laser     

Intrinsic 1/f device noise reduction and its effect on phase noisein CMOS ring oscillators

This paper gives experimental proof of an intriguing physical effect: periodic on-off switching of MOS transistors in a CMOS ring oscillator reduces their intrinsic 1/f noise and hence the oscillator's close-in phase noise. More specifically, it is shown that the 1/f³ phase noise is dependent on the gate-source voltage of the MOS transistors in the off state. Measurement results, corrected for waveform-dependent upconversion and effective bias, show an 8-dB-lower 1/f³ phase noise than expected. It will be shown that this can be attributed to the intrinsic 1/f noise reduction effect due to periodic on-off switching     

Floating substrate effects on speed performance in scaled CMOS/SOS circuits

Floating substrate effects on speed degradation in 2 ?m SOS circuits have been investigated. It has been found that the drain-substrate capacitive coupling is dominant in highly doped substrate devices, based on experimental results obtained from CMOS ring oscillators. Cycle-time-dependent sense amplifier output transition times have also been explained by this capacitive coupling.     

Influence of uniaxial tensile strain on the performance of partially depleted SOI CMOS ring oscillators

The influence of uniaxial tensile strain on the performance of advanced partially depleted silicon-on-insulator CMOS ring oscillators is reported. Strain is applied either perpendicular or parallel to the direction of current flow by bending of thinned, fully processed wafers with a gate oxide thickness of less than 1.5 nm. Interestingly, the standby power dissipation of the ring oscillators increases for both parallel and perpendicular strains due to changes in the gate tunneling currents with strain. The on-state power dissipation decreases with parallel strain and increases with perpendicular strain consistent with the expected changes in the inversion layer piezoresistance. The speed of the ring oscillators improves with perpendicular strain and degrades with parallel strain, which can also be understood in terms of the piezoresistance changes.     

Reply to "comments on 'a method for determining energy gap narrowing in highly doped semiconductors'"

The interpretation by del Alamo and Swanson of recombination-current data in highly doped silicon is clarified by making explicit their key assumptions. This leads to our reaffirming the merit of using temperature dependence in determining energy gap narrowing. This use gives newly determined low values of minority-carrier mobility and diffusivity, accompanied by a simple physical picture recently published elsewhere.     

Reply to comments on "Interference from 24-GHz automotive radars to passive microwave Earth remote sensing satellites"

We appreciate that authors Kerr et al. concur that our paper [ibid., vol.42, no.7, p.1387-98 (2004)] provides the right approach to the analysis of potential interference from anthropogenic sources to remote sensing satellites. The potential for such interference is likely to grow as new active systems are developed, necessitating acceptable procedures for interference analysis based on accepted scientific knowledge and engineering principles. While some simple clarifications are in order to improve the acceptability of our procedure, we suggest, however, that Kerr et al. have not studied our paper in detail and misinterpret several points.     

Millimeter-wave voltage-controlled oscillators in 0.13-/spl mu/m CMOS technology

This paper describes the design of CMOS millimeter-wave voltage controlled oscillators. Varactor, transistor, and inductor designs are optimized to reduce the parasitic capacitances. An investigation of tradeoff between quality factor and tuning range for MOS varactors at 24 GHz has shown that the polysilicon gate lengths between 0.18 and 0.24 /spl mu/m result both good quality factor (>12) and C/sub max//C/sub min/ ratio (/spl sim/3) in the 0.13-/spl mu/m CMOS process used for the study. The components were utilized to realize a VCO operating around 60 GHz with a tuning range of 5.8 GHz. A 99-GHz VCO with a tuning range of 2.5 GHz, phase noise of -102.7 dBc/Hz at 10-MHz offset and power consumption of 7-15mW from a 1.5-V supply and a 105-GHz VCO are also demonstrated. This is the CMOS circuit with the highest fundamental operating frequency. The lumped element approach can be used even for VCOs operating near 100-GHz and it results a smaller circuit area.     

Enhancement of free-electron coherent harmonic generation by use ofthe dispersive function on a storage ring

An alternative to the free-electron laser (FEL) oscillator at short wavelengths (λ<2000 Å) is the coherent harmonic generation (CHG) process; the electron beam, when passing through the undulator, acts as a nonlinear medium and allows one to obtain coherent harmonics of an external laser. However, this coherent emission is rather weak, particularly on the high-order harmonics (n⩾5). It is shown that the introduction of an energy dispersive function on a storage ring decreases the local energy spread of the beam and then increases the CHG by several orders of magnitude     

Comments on "Counterexample to harmonic linearization"

A recently proposed example for invalidating harmonic linearization method is shown to be incorrectly analyzed. The two time-scaling technique has been shown to yield the correct solution.     

High-performance AlGaAs/GaAs SDHTs and ring oscillators grown byMBE on Si substrates

High-performance AlGaAs/GaAs selectively doped heterojunction transistors (SDHTs) and 19-stage oscillators fabricated on silicon substrates are discussed. Epitaxial layers of AlGaAs/GaAs were grown by MBE on Si substrates. The mobility of two-dimensional electron gas (2DEG) in the SDHTs was as high as 53000 cm²/V-s at 77 K for a sheet charge density of 10×1¹² cm^-2. For 1-μm-gate-length devices, maximum transconductances of 220 and 364 mS/mm were measured at 300 and 77 K, respectively, for the SDHTs. A minimum propagation delay time of 27 ps/stage at room temperature was obtained for a 19-stage direct-coupled FET logic ring oscillator with a power dissipation of 1.1 mW/stage. The propagation delay time was reduced to 17.6 ps/stage at 77 K. From microwave S-parameter measurements at 300 K, current gain and power gain cutoff frequencies of 15 and 22 GHz, respectively, were measured. These results are comparable to those obtained for SDHT technology on GaAs substrates     

Second harmonic generation in GeO/sub 2/ ridge waveguide

Reports the first observation of 'seeded' second harmonic generation in a GeO/sub 2/ and P/sub 2/O/sub 5/ codoped silica ridge waveguide from a pump wavelength at 1.064 mu m. A 200-fold increase over the background signal has been measured.<>     

A short-channel CMOS/SOS technology in recrystallized 0.3-µm-thick silicon-on-sapphire films

CMOS/SOS devices and circuits were fabricated in 0.3-µm-thick epitaxial silicon-on-sapphire (SOS) films. Two solid-phase epitaxial recrystallization techniques double solid-phase epitaxy (DSPE) and solid-phase epitaxy and regrowth (SPEAR) reduced the total microtwin concentrations in the Si layers more than tenfold, while increasing electron and hole inversion-layer mobilities between 30 and 45 percent. Leakage currents were substantially reduced in all SPEAR devices and in n-channel DSPE transistors, with some increase observed for p-channel DSPE devices. Drive currents and subthreshold slopes also showed significant improvement in both n- and p-devices. Propagation delays below 75 ps were obtained for CMOS/SOS inverters with Loff= 0.5 µm. The application of DSPE and SPEAR techniques to 0.3-µm SOS films will extend the scaling of CMOS/SOS to circuits with VLSI complexity.