On the robustness of single-loop sigma-delta modulation

Sigma-delta modulation, a widely used method of analog-to-digital (A/D) signal conversion, is known to be robust to hardware imperfections, i.e., bit streams generated by slightly imprecise hardware components can be decoded comparably well. We formulate a model for robustness and give a rigorous analysis for single-loop sigma-delta modulation applied to constant signals (DC inputs) for N time cycles, with an arbitrary (small enough) initial condition u_o, and a quantizer that may contain an offset error. The mean-square error (MSE) of any decoding scheme for this quantizer (with u_o and the offset error known) is bounded below by 1/96N^-3. We also determine the asymptotically best possible MSE as N→∞ for perfect decoding when u_o=0 and u_o=½. The robustness result is the upper bound that a triangular linear filter decoder (with both u_o and the offset error unknown) achieves an MSE of 40/3N^-3. These results establish the known result that the O(1/N³) decay of the MSE with N is optimal in the single-loop case, under weaker assumptions than previous analyses, and show that a suitable linear decoder is robust against offset error. These results are obtained using methods from number theory and Fourier analysis     

Variable bit rate adaptive predictive coder

An adaptive predictive coder providing almost toll quality at 16 kb/s and minimal degradation when the bit rate is lowered to 9.6 kb/s is described. The coder can operate at intermediate bit rates and can also change bit rate on a packet-by-packet basis. Variable bit rate operation is achieved through the use of switched quantization, thus eliminating the need for buffering of the output. A noise shaping filter provides flexible control of the output noise spectrum. The filter, in conjunction with an enhanced way to adapt the quantizer step size, which tries to accommodate the quantization noise feedback, accounts for the toll quality. By quantizing the residue with more than one quantizer, the effective number of bits per sample can be controlled in a deterministic way regardless of the entropy residue. The lower limit of operation is at 9.6 kb/s. Performance of the coder under random bit errors is also presented. It has been found that only at error rates of 10^-2 and higher does the degradation becomes objectionable     

Cyclostationary modeling, analysis, and optimal compensation ofquantization errors in subband codecs

The paper is concerned with the analysis and modeling of the effects of quantization of subband signals in subband codecs. Using cyclostationary representations, the authors derive equations for the autocorrelation and power spectral density (PSD) of the reconstructed signal y(n) in terms of the analysis/synthesis filters, the PSD of the input, and the pdf-optimized quantizer model. Formulas for the mean-square error (MSE) and for compaction gain are obtained in terms of these parameters. The authors constrain the filter bank to be perfect reconstruction (PR) (but not necessarily paraunitary) in the absence of quantization and transmission errors. These formulas set the stage for filter optimization (maximization of compaction gain and minimization of MSE) subject to PR and bit constraints. Optimal filters are designed, optimal compensation is performed, and the theoretical results are confirmed with simulations. The floating-point quantizer wherein only the mantissa is uniformly quantized is also analyzed and compared with the fixed point, pdf-optimized filter bank. For high bit rates, their performance is comparable     

A 20-mW 640-MHz CMOS Continuous-Time Σ∆ ADC With 20-MHz Signal Bandwidth, 80-dB Dynamic Range and 12-bit ENOB

A wide bandwidth continuous-time sigma-delta ADC, operating between 20 and 40 MS/s output data rate, is implemented in 130-nm CMOS. The circuit is targeted for applications that demand high bandwidth, high resolution, and low power, such as wireless and wireline communications, medical imaging, video, and instrumentation. The third-order continuous-time SigmaDelta modulator comprises a third-order RC operational-amplifier-based loop filter and 4-bit internal quantizer operating at 640 MHz. A 400-fs rms jitter LC PLL with 450-kHz bandwidth is integrated, generating the low-jitter clock for the jitter-sensitive continuous-time SigmaDelta ADC from a single-ended input clock between 13.5 and 40 MHz. To reduce clock jitter sensitivity, nonreturn-to-zero (NRZ) DAC pulse shaping is used. The excess loop delay is set to half the sampling period of the quantizer and the degradation of modulator stability due to excess loop delay is avoided with a new architecture. The SigmaDelta ADC achieves 76-dB SNR, -78-dB THD, and a 74-dB SNDR or 12 ENOB over a 20-MHz signal band at an OSR of 16. The power consumption of the CT SigmaDelta modulator itself is 20 mW and in total the ADC dissipates 58 mW from the 1.2-V supply     

Efficient generation of colored noise

A new technique is presented for efficiently generating colored noise. Instead of discarding initial samples to account for the transient, the approach proposed here is to set the initial conditions of the filter so that the output process will be stationary. It is shown that the Levinson-Durbin algorithm provides an efficient means for determining these initial conditions.     

Novel delay-lock-loop implementation for reduced acquisition time of PN sequences

Pseudo-noise codes are widely used in spread-spectrum systems. A technique is described which significantly improves the acquisition speed of such codes. This consists of generating a broad discriminator characteristic whose phase may be controlled automatically by the loop filter output. Experimental and computed acquisition trajectories of the new loop are compared with standard loops.     

A 16 bit 20?kHz bandwidth discrete-time ΣΔ modulator with VCO-based quantizer

In this paper the design of a 3rd-order 16?bit 20?kHz-bandwidth discrete-time ???? modulator with voltage-controlled oscillator (VCO)-based quantizer is presented. This design is motivated by the trends towards die size and power consumption reduction together with performance robustness. In this direction, the flash converter embedded in a multi-bit ????M is here replaced by a VCO and digital counter, resulting in a compact fully-digital quantizer implementation. This solution would greatly exploit the technology scaling. Moreover in the proposed feed-forward architecture all feed-forward paths are summed within the last integrator of the ???? loop filter, thereby eliminating the need for an analog summation amplifier at the quantizer input The presented 3rd-order ????M features 110?dB-SNR, 104?dB-SNDR (i.e. 16?bit-ENOB).     

A 1.2-MHz 10-bit Continuous-Time Sigma–Delta ADC Using a Time Encoding Quantizer

This paper shows the operating principle and experimental results of a new continuous-time sigma–delta modulator architecture. The proposed modulator does not require a multibit quantizer nor a mismatch-shaping digital-to-analog converter to produce a multibit noise-shaped output. Instead, its quantizer encodes the loop filter output in a binary signal using a time encoding technique similar to pulsewidth modulation. This binary signal is used to generate both the analog feedback loop signal and the digital output. A proof-of-concept chip in 0.35-${rm mu}{hbox{m}}$ CMOS achieves 10 bits of resolution within a signal bandwidth of 1.2 MHz using a first-order modulator.      

A Power Optimized Continuous-Time ∆Σ ADC for Audio Applications

We present design considerations for low-power continuous-time modulators. Circuit design details and measurement results for a 15 bit audio modulator are given. The converter, designed in a 0.18 mum CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 muW from a 1.8 V supply. It features a third-order active-RC loop filter, a very low-power 4-bit flash quantizer, and an efficient excess-delay compensation scheme to reduce power dissipation.     

On the Stability Analysis of High Order Sigma-Delta Modulators

In this paper we present an approach for stability analysis of high order Sigma-Delta modulators. The approach is based on a parallel decomposition of the modulator. In this representation, the general N-th order modulator is transformed into decomposition of low order modulators, which interact only through the quantizer function. In the simplest case of the loop filter transfer function with real distinct poles, the low order modulators are N first order ones. The decomposition considered helps to extract the sufficient conditions for stability of the N-th order modulator. They are determined by the stability conditions of each of the low order modulators but shifted with respect to the origin of the quantizer function, because of the influence of all other low order modulators. The approach is generalized for the case of repeated poles of the loop filter transfer function.     

一种基于OFDM系统的无线图像的有效传输方法

本文提出一种基于OFDM多载波系统的无线图像传输的方法。该方法将基于FFT／IFFT变换的OFDM多载波调制与基于小波变换的SPIHT嵌入式零树编码相结合，首先将SPIHT输出码流分成若干数据块，然后根据各数据块视觉重要性的不同，给其分配相应的子信道和发送功率，使视觉重要性高的码流在较低的误比特率下进行传输，实现对视觉重要性不同的码流的不等错误保护。本文在瑞利平坦衰落信道下的仿真结果表明：在低信噪比下，采用本文提出的不等错误保护方法比等错误保护方法的峰值信噪比增益要高出15dB以上。     

On the structure of optimal entropy-constrained scalar quantizers

The nearest neighbor condition implies that when searching for a mean-square optimal fixed-rate quantizer it is enough to consider the class of regular quantizers, i.e., quantizers having convex cells and codepoints which lie inside the associated cells. In contrast, quantizer regularity can preclude optimality in entropy-constrained quantization. This can be seen by exhibiting a simple discrete scalar source for which the mean-square optimal entropy-constrained scalar quantizer (ECSQ) has disconnected (and hence nonconvex) cells at certain rates. In this work, new results concerning the structure and existence of optimal ECSQs are presented. One main result shows that for continuous sources and distortion measures of the form d(x,y)=ρ(|x-y|), where ρ is a nondecreasing convex function, any finite-level ECSQ can be "regularized" so that the resulting regular quantizer has the same entropy and equal or less distortion. Regarding the existence of optimal ECSQs, we prove that under rather general conditions there exists an "almost regular" optimal ECSQ for any entropy constraint. For the squared error distortion measure and sources with piecewise-monotone and continuous densities, the existence of a regular optimal ECSQ is shown     

Optimum design of vector-quantized subband codecs

This article provides an approach for representing an optimum vector quantizer by a scalar nonlinear gain-plus-additive noise model. The validity and accuracy of this analytic model is confirmed by comparing the calculated model quantization errors with actual simulation of the optimum Linde-Buzo-Gray (1980) vector quantizer. Using this model, we form an MSE measure of an M-band filter bank codec in terms of the equivalent scalar quantization model and find the optimum FIR filter coefficients for each channel in the M-band structure for a given bit rate, filter length, and input signal correlation model. Specific design examples are worked out for four-tap filters in the two-band paraunitary case. These theoretical results are confirmed by extensive Monte Carlo simulation     

A 22?mW 512?MHz CMOS continuous time sigma delta ADC in 1.2?V with 16?MHz signal bandwidth and 70?dB dynamic range

A wide bandwidth continuous time sigma delta analog-to-digital conversion is implemented in 130?nm process. The circuit is targeted for wide bandwidth applications such as video or wireless base-stations. The third-order continuous time sigma delta modulator comprises a third-order RC operational-amplifier-based loop filter and 3-bit internal quantizer operated at 512?MHz clock frequency. To reduce the clock jitter sensitivity, nonreturn-to-zero DAC pulse shaping is used. The excess loop delay is set to half the sampling period of the quantizer, and the degradation of modulator stability due to excess loop delay is avoided with this architecture. The sigma delta ADC achieves a 60?dB SNR and a 59.3?dB signal-to-noise-plus-distortion ratio over a 16?MHz signal band at an oversampling ratio of 16. The power consumption of the continuous time sigma delta modulator is 22 mW from the 1.2?V supply.     

Subjective Evaluation of an Adaptive Differential Voice Encoder with Oversampling and Entropy Coding

An adaptive differential speech encoder was assessed using subjective evaluation procedures. The coder's adaptive quantizer was similar to the one used by Cohn and Melsa [1] and the predictor involved nonadaptive previous-sample feedback. The digital channel used to transmit the quantizer output levels was assumed error-free. Paired comparison tests were used to obtain scaled isopreference contours on theN-fplane, whereNandfdenote, respectively, the number of quantizer output levels and the sampling rate relative to the Nyquist rate. These contours were used to determine the subjective signal-to-noise ratio vs.fandN, maximum subjective signal-signal-to-noise ratios vs. bit rate, optimum values offandN, and bit-rate savings which occur when entropy coding is used instead of natural coding of the quantizer output levels. Entropy coding yielded a bit rate approximately equal to threequarters that for natural coding and Nyquist-rate sampling minimized the bit rate in each case. Savings of from one to two bits occurred when ADPCM was compared with nonadaptive DPCM. The fact that our system was better than others forf simeq 1.0but worse forf gsim 2.0indicates the need to modify our quantizer adaptation algorithm as the sampling rate increases relative to the Nyqusit rate.     

Interframe DPCM with Adaptive Quantization and Entropy Coding

The object of this work has been to study encoding of monochrome pictures with a rate of about 1 bit per picture element (pel). Differential pulse code modulation, DPCM, has been chosen to make the system reasonably simple. This motivates the choice of a fixed three-dimensional predictor made separable in time and space. It essentially amounts to encoding the frame difference using a two dimensional predictor. To improve performance, the quantizer is made adaptive and the encoding is combined with delayed decision. A three-level quantizer is being used with an adaptive scheme that works with either forward or backward estimation. The output from the DPCM unit is redundant and we have adopted entropy coding to further reduce the bit rate. The entropy measure is also used to adjust the quantizer parameters to achieve the desired bit rate of 1 bit/pel. Encoding experiments were carried out on a complex videophone scene by means of computer simulations.     

Analysis of SCCL as a PN-code tracking loop

We introduce the application of SCCL that is based on sample-correlate-choose-largest procedure as a coherent baseband PN-code tracking loop applying biphase-level signals. Three adjacent estimates are formed by correlating the samples of the baseband waveform for each bit. We choose the corresponding timing (phase) of the estimate with the largest magnitude as the current correct timing (phase) and update it for each bit. Only one summation circuit is required due to the digital realization of the SCCL. The correlation properties of the samples from maximum length codes using the biphase-level signal set are investigated. Tracking performance is theoretically analyzed in both steady-state and transient conditions via a finite-state Markov chain model. The numerical results demonstrate strong PN-code tracking characteristics of SCCL