A Broadband Quadrature-Modulator in Standard 0.13 μm CMOS

A polyphase filtering topology is proposed which uses parallel switchable RC-networks for accurate broadband 90^∘ phasing. A 0.13μm CMOS prototype using the quadrature-generation network in a direct-conversion quadrature-modulator achieves a measured image-rejection ratio of −39 dBc or better in 0.6–2.5 GHz while consuming only 66 mW from a 2.2 V single supply. Esa Tiiliharjuwas born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in Information Technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland. From 1996 to July 1997 he was employed as an assistant at Helsinki University of Technology. He has held a position as a research assistant since 1997, and he is currently working towards his Ph.D. degree in the Electronic Circuit Design Laboratory at Helsinki University of Technology. His research interests include the design of integrated low-power circuits for portable telecommunication applications. He has designed and measured several integrated circuits for this application area. He is the author or co-author of several internationally-refereed conference and journal publications on analog integrated circuits. Kari A.I. Halonenwas born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT) in 1982 and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, Heverlee, Belgium, in 1987. From 1982 to 1984, he was with HUT as an Assistant and with the Technical Research Center of Finland as a Research Assistant. From 1984 to 1987, he was a Research Assistant with the E.S.A.T. Laboratory, Katholieke Universiteit Leuven, with a temporary grant from the Academy of Finland. Since 1988, he has been with the Electronic Circuit Design Laboratory, HUT, as a Senior Assistant from 1988 to 1990, and as the Director of the Integrated Circuit Design Unit of the Microelectronics Center from 1990 to 1993. He was on leave of absence during the academic year 1992–1993, acting as Research and Development Manager with Fincitec Inc., Finland. From 1993 to 1996, he was an Associate Professor, and since 1997, he has been a full Professor with the Faculty of Electrical Engineering and Telecommunications, HUT. He became the Head of Electronic Circuit Design Laboratory year 1998. He was the Technical Program Committee Chairman for the European Solid-State Circuits Conference in 2000. He is the author or coauthor of over 150 international and national conference and journal publications on analog integrated circuits, and holds several patents on analog integrated circuits. His research interests are in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. Dr. Halonen was an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–PART I: FUNDAMENTAL THEORY AND APPLICATIONS from 1997 to 1999. He has been a Guest Editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He received the BeatriceWinner Award from the IEEE International Solid-State Circuits Conference in 2002.[c-halonen.eps]     

Baseband Digital Predistorter with Quadrature Error Correction

In this article simulation and measurement results of a FPGA implementation of a baseband digital complex gain predistorter with a quadrature modulator and demodulation error correction circuits are presented. Four different methods for finding the quadrature error correction values are compared and the effect of quadrature errors to predistortion is discussed. A 50 dB three stage power amplifier chain with an analog quadrature modulator and demodulator was used in the measurements as the device to be predistorted. The signal used in the measurements and simulations was a 30 dBm 18 kHz 16-QAM signal at 400 MHz carrier frequency. In the measurements 15 dB reduction in 3rd order nonlinearity was achieved. The usage of quadrature error correction reduced the adjacent channel power by 9 dB. Ilari Teikari was born in Tampere, Finland, in 1978. He received the M.Sc. (tech.) degree from Helsinki University of Technology (HUT), Helsinki, Finland, in 2002. He is currently working toward D.Sc. (tech) degree in the electronic circuit design laboratory, HUT. His current research intrests are in the area of power amplifier linearization methods and digital circuit design. Jouko Vankka was born in Helsinki, Finland, in 1965. He received the M.S. and Ph.D. degrees in electrical engineering from Helsinki University of Technology (HUT) in 1991 and 2000, respectively. Since 1995, he has been with the Electronic Circuit Design Laboratory, HUT. His research interests include VLSI architectures and mixed-signal integrated circuits for communication applications. Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Center of Finland. From 1984 to 1987 he was a research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Center (1990–1993). He was on leave of absence the academic year 1992–1993, acting as R&D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications, Helsinki University of Technology. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC'02 Conference year 2002. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author over a hundred and fifty international and national conference and journal publications on analog integrated circuits. He has several patents on analog integrated circuits.     

Up-conversion mixers in a complementary 0.4 μm SiGe process

In this paper a 0.4 μm complementary SiGe process is used to fabricate up-conversion mixers for base-station applications. A current feedback mixer, and a mixer with a folded input, were designed in order to test benefits obtainable from the use of equally fast PNP- and NPN-transistors. The target was to improve linearity and to increase output compression point ( ) of the mixers. A +5 dBm output compression point @2 GHz was measured while drawing 43 mA from 5 V voltage supply. Harri Pellikka was born in Espoo, Finland, in 1980. He received the M.Sc. degree in electronics and electrical engineering from Helsinki University of Technology in 2005. He has been with Helsinki University of Technology Electronic Circuit Design Laboratory since 2003, where he works as research engineer. His research interests include the design of integrated circuits for telecommunication applications. Esa Tiiliharju was born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in information technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland. He has joined the Microelectronics Laboratory in University of Turku in 2006. His research interests include the design of integrated circuits for telecommunication applications. Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology. From 1993 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC’02 Conference year 2002. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author over a hundred and fifty international and national conference and journal publications on analog integrated circuits. He has several patents on analog integrated circuits.     

A 200 MHz 4.8 mW 3 V Fully Differential CMOS Sample-and-Hold Circuit with Low Hold Pedestal

Wide frequency bandwidth has been internationally allocated for unlicensed operation around the oxygen absorption frequency at 60 GHz. A power amplifier and a low noise amplifier are presented as building blocks for a T/R-unit at this frequency. The fabrication technology was a commercially available 0.15 m gallium arsenide (GaAs) process featuring pseudomorphic high electron mobility transistors (PHEMT). Using on-wafer tests, we measured a gain of 13.4 dB and a +17 dBm output compression point for the power amplifier at 60 GHz centre frequency when the MMIC was biased to 3 volts V_dd. At the same frequency, the low noise amplifier exhibited 24 dB of gain with a 3.5 dB noise figure. The AM/AM and AM/PM characteristics of the power amplifier chip were obtained from the large-signal S-parameter measurement data. Furthermore, the power amplifier was assembled in a split block package, which had a WR-15 waveguide interface in input and output. The measured results show a 12.5 dB small-signal gain and better than 8 dB return losses in input and output for the packaged power amplifier.Mikko Kärkkäinen received the M.Sc. degree in electrical engineering from the Helsinki University of Technology, Espoo, Finland, in 2000, and is currently working toward the Ph.D. degree at the Electronic Circuit Design Laboratory, Helsinki University of Technology. He is interested in millimetre wave circuit design.Mikko Varonen received the M.Sc. degree in electrical engineering from the Helsinki University of Technology, Espoo, Finland, in 2002. He is currently working toward the Ph.D. degree in electrical engineering at the Electronic Circuit Design Laboratory, Helsinki University of Technology. His research interests involve millimetre-wave integrated circuits.Pekka Kangaslahti received the M.Sc. and Ph.D. degrees in electrical engineering from the Helsinki University of Technology, Finland, in 1992 and 1999, respectively. Since 1999 he has been a visiting scientist at the NASA Jet Propulsion Laboratory, Pasadena, USA. His research interests include nonlinear microwave and millimetre wave monolithic circuits, especially for signal generation in telecommunication and radar applications.Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987.From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Center of Finland. From 1984 to 1987 he was a research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Center (1990–1993). He was on leave of absence the academic year 1992–93, acting as R&D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications, Helsinki University of Technology. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC02 Conference year 2002.     

A Broadband Double-Conversion RF Tuner

A prototype design of upconverter and downconverter units for a double-conversion cable-modem RF tuner are presented. The upconverter upconverts a channel from 47–862 MHz input band to around 1575 MHz intermediate frequency. The image-reject downconverter shifts the channel to 36.125 MHz (EU) or to 43.75 MHz (US). The upconverter includes a variable-gain low-noise amplifier, a double-balanced mixer, a three-stage VCO bank for LO generation and a divide-by-two circuit for driving an external PLL. The downconverter includes a LNA, image-reject mixers in Hartley configuration, a 3-stage polyphase filter, an IF-amplifier and a SAW driver. For the second LO generation the circuit includes a 6-GHz on-chip VCO, a divide-by-four circuit for quadrature LO and a divide-by-16 for feeding an external PLL. Signal reversal switching in the LO buffer can be used for the selection of LSB/USB injection. All building blocks are presented in this paper and experimental results are given from the upconverter, downconverter, and RF tuner demonstrator including SAW filters with center frequencies at 1575 and 44 MHz. The circuits are fabricated in a 0.9- m SiGe bipolar process.Kari Stadius received the M.Sc. degree in electrical engineering in 1994 and the Licentiate of Technology degree in 1997, both from Helsinki University of Technology, where he is currently working as a research scientist. His research interests include the design and analysis of RF transceiver blocks with special emphasis on RF oscillators and modelling of passive components.Arto Malinen was born in Savonlinna, Finland, in 1978. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT), Finland, in 2003, where he is currently working towards the Ph.D. degree. He is a research engineer with the Electronic Circuit Design Laboratory, HUT. His main research interests are in RF IC design, including low-noise amplifiers and mixers.Petri S. Järviö was born in Kitee on December 10, 1975. He received the M.Sc (EE) degree in 2001 from the Helsinki University of Technology. From 1999 to 2001 he worked as a research assistant at the Electronic Circuit Design Laboratory in Helsinki University of Technology. Nowadays he works at Finnish Defence Forces Technical Research Centre, Electronics and Information Technology Division where his research area is Radio frequency sensors.Kari A.I. Halonen was born in Helsinki, Finland, in 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Centre of Finland. From 1984 to 1987 he was research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Centre (1990–1993). He was on leave of absence the academic year 1992/93, acting as R{&}D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of the Electrical Engineering and Telecommunications, Helsinki University of Technology. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author of a hundred international and national conference and journal publications on analog integrated circuits.     

Application of High-Speed, High-Accuracy Dacs for Generation of Multiple Channels

Most modern communication systems use frequency division multiplexing to serve more than one customer. The combination of FDM signals in the digital domain has several advantages over analog approaches. We show what DAC specifications are needed to build such systems and explain important limiting factors. Special attention is given to the multi-channel generation issues. This reveals that in some cases the DAC specifications are less stringent than what is generally expected. Jurgen Deveugele was born in 1976 in Kortrijk, Belgium. He received his masters degree in electronic engineering in 1999 at the Katholieke Universiteit Leuven, Belgium. He is currently working to wards a Ph.D. at Micas, Katholieke Universiteit Leuven, Belgium. His main research interests are in low-power and high-speed current-steering digital-to-analog converters. Michiel S.J. Steyaert was born in Aalst, Belgium, in 1959. He received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (K.U. Leuven), Heverlee, Belgium in 1983 and 1987, respectively. From 1983 to 1986 he obtained an IWNOL fellowship (Belgian National Fundation for Industrial Research) which allowed him to work as a Research Assistant at the Laboratory ESAT at K.U. Leuven. In 1987 he was responsible for several industrial projects in the field of analog micropower circuits at the Laboratory ESAT as an IWONL Project Researcher. In 1988 he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT, K.U. Leuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the K.U. Leuven. His current research interests are in high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing. Prof. Steyaert received the 1990 and 2001 European Solid-State Circuits Conference Best Paper Award. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications. Prof.Steyaert received the 1995 and 1997 IEEE-ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and is currently an IEEE-Fellow.     

Design of a Class E Power Amplifier with LDMOS in Standard CMOS

This paper describes the development of a high-voltage transistor in a standard 0.35 μm CMOS technology and its application on a class E power amplifier for mobile communications. The use of a higher voltage already available in the battery has the benefit of reducing the electromigration constrains and having lower voltage drops in the interconnects due to the use of a lower current.Measured results on the active device and simulation show that is possible to achieve a higher power added efficiency using a lateral double diffused MOS, while reducing the current draining the battery.João Ramos (S’02) was born in Angola, in 1974. He received the Licenciatura degree in Electrical Engineering and Computer Science from Instituto Superior Técnico, Lisbon, Portugal.Currently, he is a research assistant at the ESAT-MICAS group of the Katholieke Universiteit Leuven. He is working towards a Ph.D. degree on RF CMOS Power Amplifiers. For this work, he obtained a scholarship from the FCT, Portugal.Michiel S.J. Steyaert (S’85–A’89–SM’92–F’03) was born in Aalst, Belgium, in 1959. He received the M.Sc. degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (KU Leuven), Heverlee, Belgium, in 1983 and 1987, respectively.From 1983 to 1986, he was a Research Assistant with the Laboratory ESAT at KU Leuven, funded by an IWNOL fellowship (Belgian National Foundation for Industrial Research). In 1987, as an IWONL Project Researcher, he was responsible for several industrial projects in the field of analog micropower circuits with the Laboratory ESAT. In 1988, he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989, he was a Research Associate appointed by the National Fund of Scientific Research (Belgium); in 1992, he was promoted to a Senior Research Associate, and in 1996, he became Research Director at the Laboratory ESAT, KU Leuven. Between 1989 and 1996, he was also a part-time Associate Professor. He is currently a Full Professor at the KU Leuven. His current research interests include high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing.Prof. Steyaert received the European Solid-State Circuits Conference Best Paper Award in 1990 and 2001. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone Award for innovative work in integrated circuits for telecommunications. In 1995 and 1997, he received the IEEE-ISSCC Evening Session Award, and the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award.     

An On-Chip Spectrum Analyzer for Analog Built-In Testing

This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses a digital frequency synthesizer and a simple signal generator synchronized with a switched capacitor bandpass filter. A general methodology for the use of this structure in the functional verification of a DUT is also provided. The circuit-level design and experimental results of an integrated prototype in standard CMOS 0.5 m technology are presented to demonstrate the feasibility of the proposed BIT technique.Marcia G. Mendez-Rivera was born in Irapuato, Mexico in 1972. She received the Communications and Electronics Engineering Degree from the Universidad de Guanajuato, Guanajuato, Mexico. in 1996, the M.Sc. degree from the Instituto Nacional de Astrofisica, Optica y Electronica (INAOE), Puebla, Mexico in 1998 and the M.Sc. from Texas A&M University, College Station in 2002. Her research interest is in the design and fabrication of analog and mixed-signal circuits.Alberto Valdes-Garcia born in 1978, grew up in San Mateo Atenco, Mexico. He received the B.S. in Electronic Systems Engineering degree from the Monterrey Institute of Technology (ITESM), Campus Toluca, Mexico in 1999 (with honors as the best score from all majors). Since the fall of 2000 he has been working towards the Ph.D. degree at Analog and Mixed-Signal Center (AMSC), Texas A&M University. During the spring and summer of 2000 he was a Design Engineer with Motorola Broadband Communications Sector. In the summer of 2002 he was with the Read Channel Design Group at Agere Systems where he investigated wide tuning range GHz LC VCOs for mass storage applications. During the summer of 2004 he was with the Mixed-Signal Communications IC Design Group at the IBM T. J. Watson Research Center, where worked on design and analysis of SiGe power amplifiers for millimeter wave radios. Since the fall of 2001 he has been a Semiconductor Research Corporation (SRC) research assistant at the AMSC working on the development of analog built-in testing techniques. Since the fall of 2000, Alberto has been the recipient of a scholarship from the Mexican National Council for Science and Technology (CONACYT). He represented Mexico in the 1994 Odyssey of the Mind World Creativity Contest and in the 1997 International Exposition for Young Scientists. His present research interests include built-in testing implementations for analog and RF circuits, system level design for wireless receivers and RF circuit design for UltraWideBand (UWB) communications.Jose Silva-Martinez was born in Tecamachalco, Puebla, México. He received the B.S. degree in electronics from the Universidad Autónoma de Puebla, México, in 1979, the M.Sc. degree from the Instituto Nacional de Astrofísica Optica y Electrónica (INAOE), Puebla, México, in 1981, and the Ph.D. degree from the Katholieke Univesiteit Leuven, Leuven Belgium in 1992. From 1981 to 1983, he was with the Electrical Engineering Department, INAOE, where he was involved with switched-capacitor circuit design. In 1983, he joined the Department of Electrical Engineering, Universidad Autonoma de Puebla, where he remained until 1993; He was a co-founder of the graduate program on Opto-Electronics in 1992. From 1985 to 1986, he was a Visiting Scholar in the Electrical Engineering Department, Texas A&M University. In 1993, he re-joined the Electronics Department, INAOE, and from May 1995 to December 1998, was the Head of the Electronics Department; He was a co-founder of the Ph.D. program on Electronics in 1993. He is currently with the Department of Electrical Engineering (Analog and Mixed Signal Center) Texas A&M University, at College Station, where He holds the position of Associate Professor. His current field of research is in the design and fabrication of integrated circuits for communication and biomedical application. Dr. Silva-Martinez has served as IEEE CASS Vice President Region-9 (1997–1998), and as Associate Editor for IEEE Transactions on Circuits and Systems part-II from 1997–1998 and May 2002–December 2003. Since January 2004 is serving as Associate Editor of IEEE TCAS Part-I. He was the main organizer of the 1998 and 1999 International IEEE-CAS Tour in region 9, and Chairman of the International Workshop on Mixed-Mode IC Design and Applications (1997–1999). He is the inaugural holder of the TI Professorship-I in Analog Engineering, Texas A&M University. He was a co-recipient of the 1990 European Solid-State Circuits Conference Best Paper Award.Edgar Sánchez-Sinencio was born in Mexico City, Mexico. He received the degree in communications and electronic engineering (Professional degree) from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree from Stanford University, CA, and the Ph.D. degree from the University of Illinois at Urbana-Champaign, in 1966, 1970, and 1973, respectively. In 1974 he held an industrial Post-Doctoral position with the Central Research Laboratories, Nippon Electric Company, Ltd., Kawasaki, Japan. From 1976 to 1983 he was the Head of the Department of Electronics at the Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Puebla, Mexico. He was a Visiting Professor in the Department of Electrical Engineering at Texas A&M University, College Station, during the academic years of 1979–1980 and 1983-1984. He is currently the TI J Kilby Chair Professor and Director of the Analog and Mixed-Signal Center at Texas A&M University. He was the General Chairman of the 1983 26th Midwest Symposium on Circuits and Systems. He was an Associate Editor for IEEE Trans. on Circuits and Systems, (1985–1987), and an Associate Editor for the IEEE Trans. on Neural Networks. He is the former Editor-in-Chief of the Transactions on Circuits and Systems II. He is co-author of the book Switched Capacitor Circuits (Van Nostrand-Reinhold 1984), and co-editor of the book Low Voltage/Low-Power Integrated Circuits and Systems (IEEE Press 1999). In November 1995 he was awarded an Honoris Causa Doctorate by the National Institute for Astrophysics, Optics and Electronics, Mexico. The first honorary degree awarded for Microelectronic Circuit Design contributions. He is co-recipient of the 1995 Guillemin-Cauer for his work on Cellular Networks. He is a former IEEE CAS Vice President-Publications. He was also the co-recipient of the 1997 Darlington Award for his work on high-frequency filters He received the Circuits and Systems Society Golden Jubilee Medal in 1999. He was the IEEE Circuits and Systems Society, Representative to the Solid-State Circuits Society (2000–2002). He is presently a member of the IEEE Solid-State Circuits Fellow Award Committee. His present interests are in the area of RF-Communication circuits and analog and mixed-mode circuit design. He is an IEEE Fellow Member since 1992.     

A Fully Integrated Class 1 Bluetooth 0.25 μm CMOS PA

A fully integrated 0.25 m CMOS bluetooth class 1 power amplifier is presented. On this chip all inductors and decoupling capacitors are situated on the silicon die. Due to the high level of integration, a cheap flip chip assembly method has been used. The chip delivers 138 mW (21.4 dBm) of output power with a power added efficiency of 25.8%. When the amplifier is tuned to its optimum frequency of 2.1 GHz, the output power increases to 184 mW and the power added efficiency increases to 29.5%. To compare the performance of this realisation with other recently published PA, a figure of merit for saturated (switched) power amplifiers is introduced.Koen Mertens was born in Antwerpen, Belgium in 1971. He received the M.Sc. degree in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium in 1998. The subject of his M.Sc. thesis was the design of a 2.14 GHz BICMOS oscillator. The thesis was in cooperation with IMEC. Since 1998. He has been a research assistant at the ESAT-MICAS laboratories, where he is currently working towards a Ph.D. degree in CMOS RF Power Amplifiers. His research promotor is Prof. Michiel Steyaert.Michiel Steyaert Michel S.J. Steyaert was born in Aalst, Belgium, in 1959. He received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (K.U. Leuven), Heverlee, Belgium in 1983 and 1987, respectively.From 1983 to 1986 he obtained an IWNOL fellowship (Belgian National Fundation for Industrial Research) which allowed him to work as a Research Assistant at the Laboratory ESAT at K.U. Leuven. In 1987 he was responsible for several industrial projects in the field of analog micropower circuits at the Laboratory ESAT as an IWONL Project Researcher. In 1988 he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT, K.U. Leuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the K.U. Leuven. His current research interests are in high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing.Prof. Steyaert received the 1990 European Solid-State Circuits Conference Best Paper Award, the 1995 and 1997 ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and the 1991 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications.     

A High Dynamic Range Programmable CMOS Front-End Filter with a Tuning Range from 1850 to 2400 MHz

This paper presents a highly programmable front-end filter and amplifier intended to replace SAW filters and low noise amplifiers (LNA) in multi-mode direct conversion radio receivers. The filter has a 42 MHz bandwidth, is tunable from 1850 to 2400 MHz, achieves a 5.8 dB NF, –25 dBm in-band 1-dB input compression point (ICP) and 0 dBm out-of-band ICP while drawing 26 mA from a 2.5 V supply.Kâre T. Christensen received the M.Sc. and Ph.D. degrees in electrical engineering from the Technical University of Denmark in 1997 and 2002, respectively.In 1995-96 he was a visiting scholar working on switched current memory cells at the Spanish National Microelectronics Centre in Seville. In 1997 he worked on an asynchronous embedded MIPS16/MIPS32 microprocessor core for LSI Logic. In 1999-2000 he was a visiting researcher at Stanford University. During his stay he worked on fully integrated RF front-end filters in CMOS.From 1998 to 2002 he worked for Nokia Mobile Phones conducting research in the design of RF ICs for multi-band GSM terminals. He currently works for the Danish hearing aid manufacturer Oticon A/S designing micro-power RF circuits and systems in CMOS.He has lectured on several occasions at the Technical University of Denmark and other universities. He has authored or co-authored nine papers and holds three U.S. patents.Thomas H. Lee received the S.B., S.M. and Sc.D. degrees in electrical engineering, all from the Massachusetts Institute of Technology in 1983, 1985, and 1990, respectively.He joined Analog Devices in 1990 where he was primarily engaged in the design of high-speed clock recovery devices. In 1992, he joined Rambus Inc. in Mountain View, CA where he developed high-speed analog circuitry for 500 megabyte/s CMOS DRAMs.He has also contributed to the development of PLLs in the StrongARM, Alpha and AMD K6/K7/K8 microprocessors. Since 1994, he has been a Professor of Electrical Engineering at Stanford University where his research focus has been on gigahertz-speed wireline and wireless integrated circuits built in conventional silicon technologies, particularly CMOS.He has twice received the Best Paper award at the International Solid-State Circuits Conference, co-authored a Best Student Paper at ISSCC, was awarded the Best Paper prize at CICC, and is a Packard Foundation Fellowship recipient.He is an IEEE Distinguished Lecturer of both the Solid-State Circuits and Microwave Societies. He holds 35 U.S. patents and authored The Design of CMOS Radio-Frequency Integrated Circuits (now in its second edition), and Planar Microwave Engineering, both with Cambridge University Press. He is a co-author of four additional books on RF circuit design, and also cofounded Matrix Semiconductor.Erik Bruun received the M.Sc. and Ph.D. degrees in electrical engineering in 1974 and 1980, respectively, from the Technical University of Denmark. In 1980 he received the B.Com. degree from the Copenhagen Business School. In 2000 he also received the dr. techn. degree from the Technical University of Denmark.From January 1974 to September 1974 he was with Christian Rovsing A/S, working on the development of space electronics and test equipment for space electronics. From 1974 to 1980 he was with the Laboratory for Semiconductor Technology at the Technical University of Denmark, working in the fields of MNOS memory devices, IL devices, bipolar analog circuits, and custom integrated circuits. From 1980 to 1984 he was with Christian Rovsing A/S. From 1984 to 1989 he was the managing director of Danmos Microsystems ApS. Since 1989 he has been a Professor of analog electronics at the Technical University of Denmark where he has served as head of the Sector of Information Technology, Electronics, and Mathematics from 1995 to 2001. Since 2001 he has been head of ÿrstedïDTU.His current research interests are in the areas of RF integrated circuit design and integrated circuits for mobile phones.     

Reduced Impact of Induced Gate Noise on Inductively Degenerated LNAs in Deep Submicron CMOS Technologies

Designers of radio-frequency inductively-degenerated CMOS low-noise-amplifiers have usually not followed the guidelines for achieving minimum noise figure. Nonetheless, state-of-the-art implementations display noise figure values very close to the theoretical minimum. In this paper, we point out that this is due to the effect of the parasitic overlap capacitances in the MOS device. In particular, we show that overlap capacitances lead to a significant induced-gate-noise reduction, especially when deep sub-micron CMOS processes are used.Paolo Rossi was born in Milan, Italy, in 1975. He received the Laurea degree (summa cum laude) in electrical engineering from the University of Pavia, Pavia, Italy, in 2000, where he is currently working toward the Ph.D. degree. His research interests are in the field of analog integrated circuits for wireless transceivers in CMOS and BiCMOS technology, with particular focus on the analysis and design of LNA and mixer for multi-standard applications.Francesco Svelto received the Laurea and Ph.D. degrees in electrical engineering from the University of Pavia, Pavia, Italy, in 1991 and 1995, respectively. From 1996 to 1997, he held a grant from STMicroelectronics to design CMOS RF circuits. In 1997, he was appointed Assistant Professor at the University of Bergamo, Italy, and in 2000, he joined the University of Pavia, where he is an Associate Professor. His current research interests are in the field of RF design and high-frequency integrated circuits for telecommunications. Dr. Svelto has been a member of the technical program committee of the IEEE Custom Integrated Circuits Conference since 2000 and the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) since 2003, and the European Solid State Circuits Conference in 2002. He served as Guest Editor of the March 2003 special issue of the IEEE Journal of Solid-State Circuits, of which he is currently an Associate Editor.Andrea Mazzanti was born in Modena (Italy) in 1976. He received the Laurea degree (summa cum Laude) in Electrical Engineering from the University of Modena and Reggio Emilia, Modena, Italy in 2001. Since 2001 he is pursuing his PhD in Electrical Engineering at University of Modena and Reggio Emilia, Italy. His major research interest are modelling of microwave semiconductor devices and design of CMOS RF integrated circuits, with particular focus on low noise oscillators and analog frequency dividers. During the summer of 2003 he was with Agere Systems, Allentown, PA as an internship student, working on the design of an highly integrated CMOS FM transmitter.Pietro Andreani received the M.S.E.E. from the University of Pisa, Italy, in 1988. He joined the Dept. of Applied Electronics, Lund University, Sweden, in 1990, where he contributed to the development of software tools for digital ASIC design. After working at the Dept. of Applied Electronics, University of Pisa, as a CMOS IC designer during 1994, he rejoined the Dept. of Applied Electronics in Lund as an Associate Professor, where he was responsible for the analog IC course package between 1995 and 2001, and where he received the Ph.D. degree in 1999. He is currently a Professor at the Center for Physical Electronics, ØrstedDTU, Technical University of Denmark, Kgs. Lyngby, Denmark, with analog/RF CMOS IC design as main research field.     

A low-power, second-order Δ/Σ modulator using a single class-AB op-amp for voice-band applications

The design of a power-efficient second-order Δ/Σ modulator for voice-band is presented. At system level, a new single-loop, single-stage modulator is proposed. The modulator employs only one class-AB op-amp to realize a second-order noise shaping for voice-band applications. The modulator is designed in a 0.25μm standard CMOS process, and exhibits 86 dB dynamic range (DR) for a 4 kHz voice-bandwidth. The proposed modulator consumes 125μW from a 2.5 V supply. Aminghasem Safarian received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 2000, 2002, respectively. Since 2003 he is a research assistant at University of California, Irvine, working toward his Ph.D. degree in electrical engineering emphasizing on RF IC design for wireless communication systems. During the summer of 2005, he was with Broadcom Corporation, Irvine, CA, where he developed integrated receivers for RFID and WCDMA applications. Farzad Sahandiesfanjani was born in Tabriz, Iran in 1976. He received the B.S. and M.S. degrees in electronics from Sharif University of Technology, Tehran, Iran, in 1998 and 2000, respectively. The subject of his thesis was the design of 4th order cascade delta-sigma modulator for ADSL Analog Front End. From 1998 to 2003, he was with Emad Semicon Co., Tehran, Iran, where he designed circuits for voice application such as CODEC and SLIC chip. He also designed a 3rd order single loop class-D delta-sigma modulator for audio application. He joined Tripath Technology Inc., San Jose, CA, in 2003 and has been working on the design of analog and mixed-signal circuits for class-T audio power amplifier. He is also author of one patent for inductor-less switching audio power amplifier and also co-author of 3 more pending patents and 4 papers. Payam Heydari (S'98–M'00) received the B.S. and M.S. degrees (with honors) in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, Murray Hill, NJ, where he worked on noise analysis in deep submicron very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, radio-frequency (RF), and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who's Who in America. Dr. Heydari is an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—part I. He currently serves on the Technical Program Committees of Custom Integrated Circuits Conference (CICC), International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003. Mojtaba Atarodi received his Ph.D degree from USC (the University of Southern California, Los Angeles), in electrical engineering Electro-physics in 1993, his M.S from University of California at Irvine, and his B.SEE from the Tehran Polytechnic University with first Grade honor. Following his Ph.D completion, he was with Linear Technology Corporation from 1993 to 1996 as an analog design engineer. He has been with Sharif University of Technology as an Assistant and Visiting Professor since 1997. The Author of more than 50 technical journal and conference papers an a book on Analog CMOS IC Design, Dr Atarodi’s main research interests are analog and RF IC system, circuit, and signal processing design as well as analog synthesis tools. Having held several management and consulting positions during the last 15 years in the US industry, he holds one US patent in analog highly linear tunable Operational Transconductance Amplifiers and has applied for 5 more US patents as well.     

Extremely-Wide-Range Supply-Independent CMOS Voltage References for Telemetry-Powering Applications

This paper reports a voltage reference circuit in standard CMOS process. It exhibits excellent supply independency for a wide input voltage range, which is of great importance in telemetry-powered systems. This circuit is based on the well-known V_GS-reference supply-independent current reference circuit, but it is designed to serve as a voltage reference. While the reference current generated by this circuit varies with the supply voltage, a self-compensating mechanism can be found in voltage-mode operation of the circuit that results in a supply-independent reference voltage. This supply independency is well observed in the static operation of the circuit over an extremely wide input range, as well as in its dynamic behavior for high frequency ripples on the input voltage. Based on the proposed idea, a multi-output voltage reference and a CMOS DC level shifter are also designed. The proposed voltage reference circuits have been fabricated using MOSIS 1.6 μm standard CMOS process. The basic voltage reference provides 957 μV/V static supply dependency, rejects input ripples of up to 8 MHz by 60± 3dB, and consumes only 15.8–36.9 μA when the input voltage varies in the range 2.6–12 V. Amir M. Sodagar received the B.S. degree from K.N. Toosi (KNT) University of Technology, Tehran, Iran, and M.S. and Ph.D. degrees from Iran University of Science & Technology (IUST), Tehran, Iran all in Electrical Engineering in 1992, 1995, and 2000, respectively. From 1992 to 2000 he was with S. Rajaee University as a Lecturer. After receiving the Ph.D. degree until 2002 he was with the NSF Engineering Research Center for Wireless Integrated Micro Systems (WIMS), Electrical Engineering & Computer Science (EECS) Dept., University of Michigan as a Post-Doctoral Research Fellow. From 2002 to 2004 he was with S. Rajaee University and KNT University of Technology as an Assistant Professor and an Adjunct Professor, respectively, and since 2004 he has been with the University of Michigan as an Associate Visiting Research Scientist. Dr. Sodagar was known as the Outstanding Electrical Engineering Graduate Student of the IUST in 1995, and receiv ed the IUST's Best Ph.D. Research Achievement Award in 2000. He was also the recipient of S. Rajaee University's Distinguished Faculty Member Award for “1998–1999” and “1999–2000” academic years, and S. Rajaee University's Distinguished Researcher Award for “2002–2003” academic year. He was involved in the design of integrated circuits in collaboration with the Center for Semiconductor Research and Fabrication from 1994 to 1995, VLSI Circuits & Systems Laboratory at the University of Tehran from 1997 to 1998, and EMAD Semicon Company from 1998 to 2000. He has authored one book, authored/co-authored more than 20 journal and conference papers, and served as the technical paper reviewer for several IEEE journals/transactions and also conferences. Dr. Sodagar's research interests are generally in the field of mixed-signal integrated circuit design, and focused on: integrated circuits for neural recording & stimulation, telemetry powering and control of implantable microsystems, frequency synthesizers, analog building blocks, and transistor-level implementations of digital logic families. Khalil Najafi (IEEE S '84, M '86, SM '97, F'00) received the B.S., M.S., and the Ph.D. degree in 1980, 1981, and 1986 respectively, all in Electrical Engineering from the Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor. From 1986–1988 he was employed as a Research Fellow, from 1988–1990 as an Assistant Research Scientist, from 1990–1993 as an Assistant Professor, from 1993–1998 as an Associate Professor, and since September 1998 as a Professor and the Director of the Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan. His research interests include: micromachining technologies, micromachined sensors, actuators, and MEMS; analog integrated circuits; implantable biomedical microsystems; micropackaging; and low-power wireless sensing/actuating systems. Dr. Najafi was awarded a National Science Foundation Young Investigator Award from 1992–1997, was the recipient of the Beatrice Winner Award for Editorial Excellence at the 1986 International Solid-State Circuits Conference, of the Paul Rappaport Award for co-authoring the Best Paper published in the IEEE Transactions on Electron Devices, and of the Best Paper Award at ISSCC 1999. In 2003 he received the EECS Outstanding Achievement Award, in 2001 he received the Faculty recognition Award, and in 1994 the University of Michigan's “Henry Russel Award” for outstanding achievement and scholarship, and was selected as the “Professor of the Year” in 1993. In 1998 he was named the Arhtur F. Thurnau Professor for outstanding contributions to teaching and research, and received the College of Engineering's Research Excellence Award. He has been active in the field of solid-state sensors and actuators for more than twenty years, and has been involved in several conferences and workshops dealing with solid-state sensors and actuators, including the International Conference on Solid-State Sensors and Actuators, the Hilton-Head Solid-State Sensors and Actuators Workshop, and the IEEE/ASME Micro Electromechanical Systems (MEMS) Conference. Dr. Najafi is the Editor for Solid-State Sensors for IEEE Transactions on Electron Devices, an Associate Editor for the Journal of Micromechanics and Microengineering, Institute of Physics Publishing, and an editor for the Journal of Sensors and Materials. He also served as the Associate Editor for IEEE Journal of Solid-State Circuits from 2000–2004, and the associate editor for IEEE Trans. Biomedical Engineering from 1999–2000. He is a Fellow of the IEEE.     

A 10-b 120-MS/s CMOS Track-and-Hold Amplifier

A novel track-and-hold (T&H) employing an operational transconductance amplifier (OTA) with two cross-coupled differential pairs (CCDPs) is proposed for high-accuracy and high-frequency applications. The T&H has a simple architecture requiring smaller capacitors and fewer switches and offers higher speed, lower distortion, and lower power dissipation than its op-amp based counterparts. The chip implemented in 0.35 μm CMOS process operates from a single 1.8 V supply and achieves more than 10-bits precision for sampling rate in excess of 120 MS/s.Jong-Kug Seon was born in Seoul, Korea, in 1966. He received the B.S. and M.S. degrees in Electronic Engineering from INHA University, Korea, in 1993 and 1995, respectively. In 1995, he joined the research & Development Center, LG Industrial Systems Co., Ltd., Korea, where he was engaged in the development of In-Circuit Tester (ICT) and worked on circuit designs at Urban Business System Lab. He moved to France in 1997 and received the Ph.D degree with the subjects related to VHDL-AMS (Analog Mixed System) and circuit design of Phase-Locked Loop, in Communication and Electronic Engineering from ENST (Ecole Nationale Superieure des Telecommunications), Paris, France, in 2000. From November 2000 to December 2003, he was with Nortel Networks, Harlow, UK, as an Analog Circuit Design Engineer, where he was working on the research and development of high-speed integrated circuits for optical communications.Since 2004 he has been with the Telemetrics Laboratory at the research {&} Development Center, LG Industrial Systems Co., Ltd., Korea, as the project leader of the RF Integrated Circuit and System Design Unit.He specializes in CMOS and BiCMOS analog integrated circuits and RF device modeling, particularly for telecommunication applications. He has published more than 10 papers in international journals and conferences and holds 5 patents in the fields of Analog circuit design and MOSFET device modeling. He has been awarded the Outstanding Paper Award in Mixed Design of Integrated Circuits and Systems, Poland, 2000.     

New Single-Resistance-Controlled Oscillator Configurations Using Unity-Gain Cells

Unity-gain voltage followers and unity-gain current followers have attracted attention in the recent literature in the context of analog signal processing as well as signal generation because of the advantages of wider bandwidth and low power consumption of these active elements as compared to other more complex building blocks. Motivated by these advantages, followers have been used as alternatives to other more complex building blocks in the realisation of filters, oscillators and more recently, in impedance converters. Although some configurations for realizing sinusoidal oscillators using unity-gain voltage/current followers have been described in the earlier literature, only one of them is a second-order single-resistance-controlled oscillator but requires as many as eight followers. This paper derives, through a state-variable synthesis approach, a number of new follower-based single-resistance-controlled oscillators requiring a much smaller number (only two to four) of followers. The new circuits are shown to possess a number of other interesting features. The workability of the new structures has been confirmed by SPICE simulation results using CMOS-based followers. S.S. Gupta was born on July 2, 1962 at Kalinjer (Banda), UP, India. He obtained B.E. in 1982 (from Government Engineering College, Rewa, India) and M.E. (Honors) in 1988 (from Motilal Nehru National Institute of Technology, Allahabad, India)- both in Electrical Engineering. He worked as a Lecturer in Electrical Engineering Department of Motilal Nehru National Institute of Technology, Allahabad during 1984–85. He worked as Design Engineer at Bharat Heavy Electricals Limited, Jhansi during 1985–87 before joining Ministry of Industry, Govt. of India in 1988 where he worked as Assistant Development Officer till June 2000. Since June 2000, he is working as Assistant Professor in the Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, New Delhi. His teaching and research interest are in the areas of Network Synthesis and Filter Design, Analog Integrated Circuits and Signal Processing, Bipolar and MOS current mode circuit design and chaotic nonlinear circuits and he has published thirteen papers in various international journals of repute. Raj Senani was born on March 14, 1950 at Budaun, UP, India. He received B.Sc. from Lucknow University, B.Sc. Engg. from Harcourt Butler Technological Institute, Kanpur, M.E. (Honors) from Motilal Nehru National Institute of Technology, Allahabad and Ph.D. in Electrical Engg. from the University of Allahabad. Dr. Senani held the positions of Lecturer (1975–1986) and Reader (1987–1988) at the Electrical Engineering Department of M.N.R. Engineering College, Allahabad. He joined the Electronics and Communication Engineering (ECE) Department of the Delhi Institute of Technology (DIT), Delhi in 1988 as an Assistant Professor. He became a Professor in 1990. Since then, he has served as Head, ECE Department (1990–1993, 1997–1998), Head Applied Sciences (1993–1996), Head, Manufacturing Processes and Automation Engineering (1996–1998), Dean Research (1993–1996), Dean Academic (1996–1997), Dean Administration (1997–1999), Dean Post Graduate Studies (1997–2001), Director, Netaji Subhas Institute of Technology (NSIT) during June 1996–September 1996, February 1997–June 1997 and May 2003–January 2004. He is currently functioning as Head, Division of ECE at NSIT (2000-till date). Professor Senani's teaching and research interests are in the areas of Circuits, Systems and Signal Processing, Bipolar and CMOS analog integrated circuits, Current-mode Signal processing, Electronic Instrumentation, Chaotic nonlinear circuits and Log-domain/Translinear circuits. He has authored or co-authored 100 research papers in the above areas which have been published in IEEE (USA), IEE (UK) and other international journals of repute. He served as an Honorary Editor of the Research Journal of the Institution of Electronics and Telecommunication Engineers (IETE, India) during 1990–1995, in the area of Circuits and Systems and has been a Member of the Editorial Board of the IETE Journal on Education since 1995. He has been functioning as Editorial reviewer for a number of IEEE (USA), IEE (UK) and other international journals of repute. He is currently serving as an Associate Editor for the Journal on Circuits, Systems and Signal Processing, Birkhauser Boston (USA). He is listed in several editions of Marquis' Who's Who in the World, Marquis' Who's Who in Science and Engineering, Marquis' Who' Who in Finance and Industry (all published from N.J., USA during 1998–2004); 2000 Outstanding Scholars of the 21st Century and Outstanding people of the 20th Century (both published by International Biographical Centre, Cambridge); Indo-American Who's Who (2001), Indo-Asian Who's Who (2003), Asia's Who's Who of Men & Women of Achievement (2003), Asia/Pacific Who's Who (2004) and a number of other international biographical directories.     

A Triple-Mode Sigma-Delta Modulator for Multi-Standard Wireless Radio Receivers

A 1.8 V sigma-delta modulator with a 4 bit quantizer has been designed for GSM/WCDMA/WLAN receivers in a 0.18 um CMOS process. The modulator makes use of low-distortion sigma-delta modulator architecture and Pseudo-Data-Weighted-Averaging technique to attain high linearity over a wide bandwidth. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. In GSM mode, the modulator achieves 96/104 dB peak SNR/SFDR over 100 kHz bandwidth and dissipates 18 mW at a sampling frequency of 32 MHz. The modulator achieves 92/68 dB peak SFDR and 77/54 dB peak SNR over a 2 MHz/10 MHz bandwidth and dissipates 23/39 mW at a sampling frequency of 64 MHz/160 MHz in WCDMA/WLAN. Ana Rusu received degrees of diploma engineer in electronics and telecommunications engineering from Technical University of Iasi, Romania, in 1983 and Ph.D. in electronics engineering from Technical University of Cluj-Napoca, Romania, in 1998. During 1983–1986 she was with Research Institute for Electronics Iasi, as researcher engineer. From 1986 to 1988 she was with Territorial Computer Centre, Piatra-Neamt, Romania, as a programmer in software engineering. Since 1988 she has been with the Technical University of Cluj-Napoca, Electronics and Telecommunications Faculty. In 1999 she was appointed as an associate professor. She has been in visiting researcher positions in University of Bradford, England, and Institute National Politechnique of Grenoble, France, in 1997 and 2001, respectively. Since September 2001, she has been with the Royal Institute of Technology (KTH), Stockholm, Sweden, where she is a senior researcher in radio and mixed-signal systems group. Her research interests include data conversion techniques for wireless communications and the design of low-voltage low-power analog and mixed-signal ICs. Ana Rusu has authored or coauthored five books (published in Romanian language) and more than 40 papers in international conference proceedings and journals. Alexey Borodenkov received his B.Sc. degree in computer science and engineering from St. Petersburg Electrotechnical University, Russia in 2002 and M.Sc. degree in electrical engineering from Royal Institute of Technology (KTH), Stockholm, Sweden in 2004. In October 2004 he joined Samsung Electronics Co. Ltd., Gyeunggi-Do, Korea, where he is involved in the design of multi-standard transceivers for wireless communications. His current research interests include integrated-circuit development of frequency synthesizers and data converters. Mohammed Ismail received the B.S. and M.S. degrees in electronics and telecommunications engineering from Cairo University, Egypt, in 1974 and 1978 and the Ph.D. in electrical engineering from the University of Manitoba, Canada, in 1983. He is a Professor with the Department of Electrical Engineering, The Ohio State University, Columbus. Since April 2003, he is also a Professor with the Department of Microelectronics and Information Technology, Royal Institute of Technology (KTH) Stockholm, Sweden. He has over 20 years experience of R&D in the fields of analog, RF and mixed signal integrated circuits. He has held several positions in both industry and academia and has served as a corporate consultant to nearly 30 companies in the US, Europe and the Far East. His current interest lies in research involving digitally programmable/configurable fully integrated radios with focus on low voltage/low power first-pass solutions for 3G and 4G wireless handhelds. He publishes intensively in this area and has been awarded 11 patents. He has co edited and coauthored several books. He co-founded ANACAD-Egypt (now part of Mentor Graphics, Inc.) and Spirea AB, Stockholm (now Firstpass Semiconductors AB), a developer of CMOS radio and mixed signal IPs for handheld wireless applications. Dr. Ismail has been the recipient of several awards including the US National Science Foundation Presidential Young Investigator Award, the US Semiconductor Research Corp Inventor Recognition Awards in 1992 and 1993, and a Fulbright/Nokia fellowship Award in 1995. He is the founder of the International Journal of Analog Integrated Circuits and Signal Processing, Springer and serves as the Journal's Editor-In-Chief. He has served as Associate Editor for many IEEE Transactions, was on the Board of Governors of the IEEE Circuits and Systems Society and is the Founding Editor of “The Chip” a Column in The IEEE Circuits and Devices Magazine. He is a Fellow of IEEE. Hannu Tenhunen received degrees of diploma engineer in electrical engineering and computer sciences from Helsinki University of Tehnology, Helsinki, Finland, in 1982 and Ph.D. in Microelectronics from Cornell University, Ithaca, NY, U.S.A., in 1986. During 1978–1982 he was with Electron Physics Laboratory, Helsinki University of Technology, and from 1983 to 1985 at Cornell University as a Fullbright scholar. From September 1985 he has been with Tampere University of Technology, Signal Processing Laboratory, Tampere, Finland, as an associate professor. He was also a coordinator of National Microelectronics Program of Finland during 1987–1991. Since January 1992, he has been with Royal Institute of Technology (KTH) Stockholm, Sweden, where he is a professor of electronic system design. His current research interests are VLSI circuits and systems for wireless and broadband communication, and related design methodologies and prototyping techniques. He has made over 400 presentations and publications on IC technologies and VLSI systems worldwide, and has over 16 patents pending or granted.     

A Wide Tuning Range, Fractional Multiplying Delay-Locked Loop Topology for Frequency Hopping Applications

This paper introduces a low-jitter and wide tuning range delay-locked loop (DLL) -based fractional clock generator (CG) topology. The proposed fractional multiplying DLL (FMDLL) architecture overcomes some disadvantages of phase-locked loops (PLLs) such as jitter accumulation while maintaining the advantageous of a PLL as a multi-rate fractional frequency multiplier. Based on this topology, a CG with 1–2.5 GHz output frequency tuning range has been designed in a digital 0.18 um CMOS technology while the multiplication ratios are M+k/(2N_C) in which M, k, and N_C are adjustable. To generate some finer ratios, k is changed periodically or randomly (by a digital delta-sigma modulator) between two consecutive integer numbers. Operating in 2.5 GHz, total circuit including digital part consumes 15.5 mW from 1.8 V supply voltage. At the proposed architecture, reference clock is injected into a ring oscillator in specified times and to the specified delay-stages to synthesize the fractional frequency multiplication as well as resetting the accumulated jitter during previous cycles. Operating in maximum speed, simulated RMS (root-mean-square) and PTP (peak-to-peak) jitter values are 1.8 and 14.5 ps, respectively, while the settling time is 5 us. Armin Tajalli received the B.Sc. from Sharif University of Technology (SUT), Tehran, Iran, in 1997, and M.Sc. from Tehran Polytechnic University, Tehran, Iran, in 1999. From 1998 he has joint Emad Co. as a senior design engineer where he has worked on several industrial and R&D projects on analog and mixed-mode ICs. He received the award of the Best Design Engineer from Emad Co., 2001, the Kharazmi Award of Industrial Research and Development, Iran, 2002, and Presidential Award of the Best Iranian Researchers, in 2003. He is now working toward his Ph.D. degree at SUT. His current interests are design of high speed circuits for telecommunication systems. Pooya Torkzadeh was born in Isfahan, on April 21, 1980. He received the B.Sc. degree from Isfahan University of Technology (IUT), Isfahan, in 2002 and the M.Sc. degree from Sharif University of Technology (SUT), Tehran, in 2004, both in electrical engineering. From 2002 to 2004, he was an Assistant with SUT and the member of Sharif Integrated Circuit And System Group (SICAS). His major activities are in Electronics Integrated Circuit Designing and Digital Signal Processing (DSP). He specializes in CMOS Integrated Circuits particularly for Clock Generation, Clock-Data Recovery Systems, and Sigma-Delta Analogue to Digital Converter Applications. Mojtaba Atarodi received the B.S.E.E. from Amir Kabir University of Technology (Tehran Polytechnic) in 1985, and M.Sc. degree in electrical engineering from the University of California, Irvine, in 1987. He received the Ph.D. degree from the University of Southern California (USC) on the subject of analog IC design in 1993. From 1993 to 1996 he worked with Linear Technology Corporation as a senior analog design engineer. Since then, he has been consulting with different IC companies. He is currently a visiting professor at Sharif University of Technology. He has published more than 30 technical papers in the area of analog and mixed-signal integrated circuit design as well as analog CAD tools.     

Editor's Notice (June 1968)

With this issue the IEEE Journal of Solid-State Circuits completes its second full year of publication. This Journal is sponsored by the IEEE Solid-State Circuits Council on behalf of the Groups on Circuit Theory, Electron Devices, Electronic Computers, Microwave Theory and Techniques, and Magnetics. Its paramount objective is to bring to the members of these groups a new and stronger level of reporting in a major technical area that previously had not been served by a single publication. The interests of the Journal in the technical area of solid-state circuits correspond well with the content of the annual International Solid-State Circuits Conference. As sponsor of the Journal and cosponsor of the ISSCC, the Solid-State Circuits Council has provided a salutory connection between these two complementary activities.     

Voltage-Mode Universal Biquadratic Filters with One Input and Five Outputs

Four new voltage-mode universal biquadratic filters each with one input terminal and five output terminals are presented. Each of the first two proposed circuits uses four plus-type second-generation current conveyors, two grounded capacitors and five resistors. The third proposed circuit employs two plus-type second-generation current conveyors, one differential voltage current conveyor, two grounded capacitors and five resistors. The fourth proposed circuit employs two multi-output second-generation current conveyors, two grounded capacitors and five resistors. Each of the proposed circuits can realize all the standard filter functions; highpass, bandpass, lowpass, notch and allpass, simultaneously, without changing the passive elements. The proposed circuits enjoy the features of orthogonal controllable of resonance angular frequencies and quality factors, using only grounded capacitors as well as low active and passive sensitivities. Jiun-Wei Horng was born in Tainan, Taiwan, Republic of China, in 1971. He received the B.S. degree in Electronic Engineering from Chung Yuan Christian University, Chung-Li, in 1993, and the Ph.D. degree from National Taiwan University, Taipei, in 1997. From 1997 to 1999, he served as a Second-Lieutenant in China Army Force. From 1999 to 2000, he joined CHROMA ATE INC. where he worked in the area of video pattern generator technologies. From 2000 to 2005, he joined the Department of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan as an Assistant Professor. Since 2005, he is an Associate Professor. His teaching and research interests are in the areas of Circuits and Systems, Analog and Digital Electronics, Active Filter Design and Current-Mode Signal Processing. Chun-Li Hou was born in Taipei, Taiwan, Republic of China, in 1951. He received the B.S. degree, M.S. degree, and Ph.D. degree in Electrical Engineering from National Taiwan University, Taipei, in 1974, 1976, and 1991, respectively. From 1977 to 1979, he taught as a lecture in Tamkang College. From 1981 to 1991, he taught as a lecture in the department of Electronic Engineering, Chung-Yuan Christian University, Chung, Taiwan. From 1992 until now, he taught there as an Associate Professor. His teaching and research interests are in the areas of Current-Mode Analog Circuit Analysis and Design, Active Network Synthesis Circuit theory and Applications. Chun-Ming Chang obtained his bachelor and master degrees, both in the field of electrical engineering, from National Cheng Kung University, Tainan, Taiwan, R.O. China, and his Ph.D. degree in the field of electronics and computer science from the University of Southampton, U.K. He had been an associate professor in Chung Yuan Christian University in Taiwan from 1985 to 1991, and has been a full professor in the same University since 1991. His research interest is divided by two relative fields, network synthesis before 1991 and analog circuit design after 1991. He had been a chairman of the electrical engineering department in Chung Yuan Christian University from 1995 to 1999. Recently, he was recommended for inclusion in The Contemporary Who's Who of Professionals 2004 Edition, and nominated by the Governing Board of Editors of the American Biographical Institute for the prestigious title MAN OF THE YEAR-2005, and became an Advisor of the ABI's distinguished RESEARCH BOARD OF ADVISORS due to the invention of Analytical Synthesis Method and OTA-Only-Without-C Circuits in the field of analog circuit design. Wen-Yaw Chung was born in Hsin-Chu, Taiwan, R.O.C., 1957. He received the B.S.E.E. and M.S. degrees from Chung Yuan Christian University, Chung Li, Taiwan, in 1979 and 1981 respectively, and the Ph.D. degree in Electrical and Computer Engineering from Mississippi State University, USA, in 1989. Subsequently, he joined the Advanced Microelectronics Division, Institute for Technology Development in Mississippi, where he was involved in the design of a bipolar optical data receiver. In 1990 he worked as a design manager for the Communication Product Division, United Microelectronics Corporation, Hsin-Chu, where he was involved in the design of analog CMOS data communication integrated circuits. Since 1991 he has been an Associate Professor in the Department of Electronic Engineering at Chung Yuan Christian University. His research interests include mixed-signal VLSI design, biomedical IC applications, sensor and actuator interfacing for deep submicron VLSI electronics.     

An analysis of high-frequency noise in RF active CMOS mixers

An analysis of high-frequency noise in RF active CMOS mixers including single-balanced and double-balanced architectures is presented. The analysis investigates the contribution of non-white gate-induced noise to the output noise power as well as the spot noise figure (NF) of the RF CMOS mixer. It accounts for the non-zero correlation between the gate-induced noise and the channel’s thermal noise. The noise contribution of the RF transconductor and the switching pair to the output noise power is studied. Experimental results verify the accuracy of the analytical model. Payam Heydari (S’98–M’00) received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, where he worked on noise analysis in deep submicrometer very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, RF, and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Mention Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who’s Who in America. Dr. Heydari Professor Heydari has been the Associate Editor of IEEE TRANS. ON CIRCUITS AND SYSTEMS, I, since 2006. He currently serves on the Technical Program Committees of International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003.