城市客运交通枢纽平行系统体系研究

城市客运交通枢纽系统是一个典型的复杂巨系统, 传统的管理方法难以形成具有动态适应能力的有效解决方案. 运用复杂系统研究中的ACP (人工系统、计算机实验、平行执行)方法, 首次给出城市客运交通枢纽平行控制与管理系统研究框架. 以该框架为基础, 首先,分析了人工交通枢纽系统中模型的构成及支撑条件; 进而对人工交通枢纽系统计算实验中涉及的实验场景设计、实验内容设计进行了详细阐述; 最后,对人工交通枢纽系统平行执行内容进行了说明. 该体系框架的提出, 对于城市客运交通枢纽管控水平的提高具有重要指导意义.     

TMS320C54X DSP混合编程的方法研究

提出并分析了在考虑程序代码效率、执行效率和程序的可读性及可移植性的情况下,对于TMS320C54X系列,采用C语言和汇编语言混合编程的优点;详细阐述了混合编程方法的特点、应遵循的规则和详细接口规范;给出了程序设计实例。     

基于改进局部特征分布的图像分类方法

提出一种概率签名的图像分布描述及对应的图像分类算法．算法首先通过高斯混合模型建立图像局部特征分布,然后以混合模型中各个模式的均值为聚类中心,以图像中满足约束条件的局部特征对相应模式的后验概率之和为聚类大小来形成初始的概率签名,最后执行一个压缩过程确定最终的概率签名特征,并通过训练基于Earth Mover's Distance (EMD)核的SVM分类器完成图像分类．概率签名允许一个局部特征对多个聚类做出反映,可以编码更多判别信息以及从视觉感知上捕捉更多的相似性．通过与其它图像分类方法在场景识别和对象分类两项任务上的对比实验,验证了文中提出的分类方法的有效性．     

基于平行Petri网的制造系统调度与控制一体化方法

为了消除制造系统调度层与控制层之间的隔阂,实现对生产事件快速灵活响应,本文提出了一种调度与控制一体化的方法.首先,定义了一种新型Petri网模型,即平行Petri网,从而集成地描述了传感器、执行器、任务和资源信息,构建制造系统的信息物理系统模型;其次,提出了一种从平行Petri网到赋时Petri网的抽象简化方法,大规模压缩优化调度所需搜索的状态空间;再次,定义了策略Petri网以描述最优调度策略.最后,给出了平行Petri网与策略Petri网同步执行算法,使得平行Petri网与物理系统同步执行.     

基于加权决策树的蛋白质序列分类算法研究

针对蛋白质序列分类的需求,深入研究了蛋白质序列分类算法。对蛋白质序列的特征属性进行了大量的分析和研究,给出了蛋白质序列特征属性的描述形式。在此基础上设计了一种基于加权决策树的蛋白质序列分类算法,详细阐述了加权决策树的构造过程以及决策树的主要参数计算方法,而且根据蛋白质序列的特征,对决策树进行了改进,给出了加权决策树的实现方法。测试结果表明：设计的蛋白质序列分类算法具有较高的分类精度和较快的执行速度。     

过程控制调节阀的选择

主要阐述了调节阀的组成和分类，以及调节阀的类型、执行机构、作用方式、流量特性等选择原则和方法，并对调节阀选择的方法、原则进行了分析。     

平行控制: 数据驱动的计算控制方法

本文简述平行控制的理念、概念及基本方法与应用, 主要强调虚实互动的平行扩展方式与同时计算的并行划分方式的不同之处. 平行控制方法是ACP理论在控制领域中的具体应用, 其核心是利用人工系统进行建模和表示、通过计算实验进行分析和评估、最后借助平行执行实现对复杂系统的控制和管理. 这一控制方法是反馈控制, 特别是自适应控制方法向复杂系统问题扩展的自然结果, 是一种迈向数据驱动控制和计算控制的必然且有效途径.     

基于小波分析和HMM的语音识别模型建立与仿真

利用隐马尔可夫模型HMM优异的时序建模能力及小波变换可以对信号进行多尺度分析并有效提取信号的局部信息的特点,建立了混合语音识别模型.在语音信号的识别过程中考虑到了信号的非平稳性,采用并行识别的方法分别获取分类信息,根据混合模型的识别算法做出识别决策,减小了系统对环境的依赖性,提高了其自适应能力.仿真实验结果表明,混合模型识别结果比单一HMM模型或小波模型识别结果更佳,提高了整体的识别速度和识别率.     

基于ACP方法的载人登月中止规划的计算实验研究

针对载人登月中止规划存在的不确定性因素, 提出了基于ACP (Artificial systems, computational experiments, parallel execution)方法的载人登月中止规划框架, 论述了该框架下人工系统和平行执行的初步设计, 主要讨论了计算实验设计、分析和验证过程. 针对中止规划时中止点状态误差的不确定性, 提出利用短时间的累积观测值确定中止点状态误差的计算实验方法, 并应用模拟退火单纯形混合算法求解从载人登月轨道上任一点返回地球的中止机动方案. 最后给出基于正交实验设计的计算实验示例性算例, 验证本文提出方法的有效性.     

CPU/FPGA混合架构上的硬件线程加速方法

CPU/FPGA混合架构是可重构计算的普遍结构,为了简化混合架构上FPGA的使用,提出了一种硬件线程方法,并设计了硬件线程的执行机制,以硬件线程的方式使用可重构资源.同时,软硬件线程可以通过共享数据存储方式进行多线程并行执行,将程序中计算密集部分以FPGA上的硬件线程方式执行,而控制密集部分则以CPU上的软件线程方式执行.在Simics仿真软件模拟的混合架构平台上,对DES,MD5SUM和归并排序算法进行软硬件多线程改造后的实验结果表明,平均执行加速比达到了2.30,有效地发挥了CPU/FPGA混合架构的计算性能.     

Speculative plan execution for information gathering

The execution performance of an information gathering plan can suffer significantly due to remote I/O latencies. A streaming dataflow model of execution addresses the problem to some extent, exploiting all natural opportunities for parallel execution, as allowed by the data dependencies in a plan. Unfortunately, plans that integrate information from multiple sources often use the results of one operation as the basis for forming queries to a subsequent operation. Such cases require sequential execution, an inefficiency that can erase prior gains made through techniques like streaming dataflow. To address this problem, we present a technique called speculative plan execution, an out-of-order method that capitalizes on knowledge gained from prior executions as a means for overcoming remaining data dependencies between plan operators. Our approach inserts additional plan operators that generate and confirm speculative results, while preserving the safety and fairness of overall execution. To increase the utility of speculative execution, we propose a method of value prediction that combines caching with the more effective and space-efficient techniques of classification and transduction. We present experimental results that demonstrate how the performance of information gathering plans can benefit from speculative execution and how its overall utility can be increased through our hybrid method of value prediction.     

Communication-Aware Supernode Shape

In this paper we revisit the supernode-shape selection problem, that has been widely discussed in bibliography. In general, the selection of the supernode transformation greatly affects the parallel execution time of the transformed algorithm. Since the minimization of the overall parallel execution time via an appropriate supernode transformation is very difficult to accomplish, researchers have focused on scheduling-aware supernode transformations that maximize parallelism during the execution. In this paper we argue that the communication volume of the transformed algorithm is an important criterion, and its minimization should be given high priority. For this reason we define the metric of the per process communication volume and propose a method to minimize this metric by selecting a communication-aware supernode shape. Our approach is equivalent to defining a proper Cartesian process grid with MPI_Cart_Create, which means that it can be incorporated in applications in a straightforward manner. Our experimental results illustrate that by selecting the tile shape with the proposed method, the total parallel execution time is significantly reduced due to the minimization of the communication volume, despite the fact that a few more parallel execution steps are required.     

Towards implementation of a novel scheme for data prefetching on distributed shared memory systems

High speed networks and rapidly improving microprocessor performance make the network of workstations an extremely important tool for parallel computing in order to speedup the execution of scientific applications. Shared memory is an attractive programming model for designing parallel and distributed applications, where the programmer can focus on algorithmic development rather than data partition and communication. Based on this important characteristic, the design of systems to provide the shared memory abstraction on physically distributed memory machines has been developed, known as Distributed Shared Memory (DSM). DSM is built using specific software to combine a number of computer hardware resources into one computing environment. Such an environment not only provides an easy way to execute parallel applications, but also combines available computational resources with the purpose of speeding up execution of these applications. DSM systems need to maintain data consistency in memory, which usually leads to communication overhead. Therefore, there exists a number of strategies that can be used to overcome this overhead issue and improve overall performance. Strategies as prefetching have been proven to show great performance in DSM systems, since they can reduce data access communication latencies from remote nodes. On the other hand, these strategies also transfer unnecessary prefetching pages to remote nodes. In this research paper, we focus on the access pattern during execution of a parallel application, and then analyze the data type and behavior of parallel applications. We propose an adaptive data classification scheme to improve prefetching strategy with the goal to improve overall performance. Adaptive data classification scheme classifies data according to the accessing sequence of pages, so that the home node uses past history access patterns of remote nodes to decide whether it needs to transfer related pages to remote nodes. From experimental results, we can observe that our proposed method can increase the accuracy of data access in effective prefetch strategy by reducing the number of page faults and misprefetching. Experimental results using our proposed classification scheme show a performance improvement of about 9–25% over the same benchmark applications running on top of an original JIAJIA DSM system.

一种基于缓存的并发ETL数据流程处理框架

ETL(Extraction-Transformation-Loader)是企业内部和企业间信息资源交换和共享的关键技术。随着企业数据量的剧增,如何提高数据处理能力和执行效率成为ETL需要解决的难题之一。提出一个基于缓存的并发ETL数据流程处理框架,该框架使用基于组件分类的缓存复用技术来降低内存消耗和数据拷贝次数;同时使用一种并发的数据处理流程调度执行策略,该策略具有任务、流水线、数据处理多粒度并行的特点。该方法已在网驰平台ONCE DQ实现并得到验证。     

网络计算系统的分类研究

计算系统的分类是计算机科学的一项基础工作,对计算系统的设计、编程和优化都有直接影响和指导作用.近二十年来,众多的网络计算系统得到了广泛使用,但学术界尚未研究出一套有效的分类方法,影响了网络计算系统的研究和知识共享.文中借鉴并行计算系统分类的成功经验,从应用编程的角度出发,给出了一套基于(执行、控制、层次)三维坐标的分类方法,能够覆盖代表性网络计算系统,如网格、云计算、互联网服务等系统.     

Using true concurrency to model execution of parallel programs

Parallel execution of a programR (intuitively regarded as a partial order) is usually modeled by sequentially executing one of the total orders (interleavings) into which it can be embedded. Our work deviates from this serialization principle by usingtrue concurrency to model parallel execution. True concurrency is represented via completions ofR tosemi total orders, called time diagrams. These orders are characterized via a set of conditions (denoted byCt), yielding orders or time diagrams which preserve some degree of the intended parallelism inR. Another way to express semi total orders is to use re-writing or derivation rules (denoted byCx) which for any programR generates a set of semi-total orders. This paper includes a classification of parallel execution into three classes according to three different types ofCt conditions. For each class a suitableCx is found and a proof of equivalence between the set of all time diagrams satisfyingCt and the set of all terminalCx derivations ofR is devised. This equivalence between time diagram conditions and derivation rules is used to define a novel notion of correctness for parallel programs. This notion is demonstrated by showing that a specific asynchronous program enforces synchronous execution, which always halts, showing that true concurrency can be useful in the context of parallel program verification.     

Parallel partitioning for distributed systems using sequential assignment

This paper introduces a method to combine the advantages of both task parallelism and fine-grained co-design specialisation to achieve faster execution times than either method alone on distributed heterogeneous architectures. The method uses a novel mixed integer linear programming formalisation to assign code sections from parallel tasks to share computational components with the optimal trade-off between acceleration from component specialism and serialisation delay. The paper provides results for software benchmarks partitioned using the method and formal implementations of previous alternatives to demonstrate both the practical tractability of the linear programming approach and the increase in program acceleration potential deliverable.     

Low-cost static performance prediction of parallel stochastic task compositions

Current analytic solutions to the execution time distribution of a parallel composition of tasks having stochastic execution times are computationally complex, except for a limited number of distributions. In this paper, we present an analytical solution based on approximating execution time distributions in terms of the first four statistical moments. This low-cost approach allows the parallel execution time distribution to be approximated at ultra-low solution complexity for a wide range of execution time distributions. The accuracy of our method is experimentally evaluated for synthetic distributions as well as for task execution time distributions found in real parallel programs and kernels (NAS-EP, SSSP, APSP, Splash2-Barnes, PSRS, and WATOR). Our experiments show that the prediction error of the mean value of the parallel execution time for N-ary parallel composition is in the order of percents, provided the task execution time distributions are sufficiently independent and unimodal.     

Classification and retrieval of knowledge on a parallelmarker-passing architecture

Frame-based systems or semantic networks have been generally used for knowledge representation. In such a knowledge representation system, concepts in the knowledge base are organized based on the subsumption relation between concepts, and classification is a process of constructing a concept hierarchy according to the subsumption relationships. Since the classification process involves search and subsumption test between concepts, classification on a large knowledge base may become unacceptably slow, especially for real-time applications. In this paper, a massively parallel classification and property retrieval algorithm on a marker passing architecture is presented. The subsumption relation is first defined by using the set relationship, and the parallel classification algorithm is described based on that relationship. In this algorithm, subsumption test between two concepts is done by parallel marker passing and multiple subsumption tests are performed simultaneously. To investigate the performance of the algorithm, time complexities of sequential and parallel classification are compared. Simulation of the parallel classification algorithm was performed using the SNAP (Semantic Network Array Processor) simulator, and the influence of several factors on the execution time is discussed     

基于混合输入的环境交互问题研究

针对软件安全测试中静态符号执行技术难以处理环境交互的问题, 提出了一种基于混合输入的符号执行方法。首先, 定义了程序执行的一致性模型, 系统化地分析了符号执行与实际执行的逼近问题; 接着, 提出了符号执行与具体执行的转换方法及维护一致性的启发式策略; 最后, 通过区分可求解约束和复杂约束条件, 提出了具体值和符号值混合代入法化简复杂约束的路径求解算法。实验结果表明该方法在处理环境交互问题上的可行性和有效性, 扩展了静态符号执行的能力。