Ultrafast growth of single-crystalline Si nanowires

Silicon nanowires (SiNWs) have been catalytically synthesized by heat treatment of Si nanopowder at 980 °C. The SiNWs comprise crystalline Si nanoparticles interconnected with metal catalyst. The formation mechanism of nanowires generally depends on the presence of Fe catalysts in the synthesis process of solid–liquid–solid (SLS). Although gas phase of vapor–liquid–solid (VLS) method can be used to produce various of different nanowire materials, growth model based on the SLS mechanism by heat treatment is more ascendant for providing ultrafast growth of single-crystalline Si nanowires and controlling the diameter of them easily. The growth of single-crystalline SiNWs and morphology were discussed.     

Growth of germanium nanowires on silicon(111) substrates by molecular beam epitaxy

Heteroepitaxial growth of Ge nanowires was carried out on Si(111) substrates by MBE. Au seeds were used as precursor for the VLS growth of the nanowires. Even if the Au droplets do not act as catalyst for the dissociation of gas, they are local preferential areas where the energetic barrier of Ge nucleation is lowered compare to the remaining non activated surface. Two sets of Au seeds were used as precursors for the VLS process. The first set have an average diameter of 125 nm and the second of 25 nm. In-situ RHEED monitoring showed a Au wetting layer between these seeds before the nanowires growth as well as at the end of the Ge nanowires growth. It means that the wetting layer acted as a surfactant from the Si(111) surface to the Ge grown layer between the nanowires. Analysis of SEM images brought the fact that the diffusion of gold from the droplets on the surface and the sidewalls of the nanowires via the Ostwald ripening is a key parameter of the growth of the nanowires.     

Controlling heterojunction abruptness in VLS-grown semiconductor nanowires via in situ catalyst alloying

For advanced device applications, increasing the compositional abruptness of axial heterostructured and modulation doped nanowires is critical for optimizing performance. For nanowires grown from metal catalysts, the transition region width is dictated by the solute solubility within the catalyst. For example, as a result of the relatively high solubility of Si and Ge in liquid Au for vapor-liquid-solid (VLS) grown nanowires, the transition region width between an axial Si-Ge heterojunction is typically on the order of the nanowire diameter. When the solute solubility in the catalyst is lowered, the heterojunction width can be made sharper. Here we show for the first time the systematic increase in interface sharpness between axial Ge-Si heterojunction nanowires grown by the VLS growth method using a Au-Ga alloy catalyst. Through in situ tailoring of the catalyst composition using trimethylgallium, the Ge-Si heterojunction width is systematically controlled by tuning the semiconductor solubility within a metal Au-Ga alloy catalyst. The present approach of alloying to control solute solubilities in the liquid catalyst may be extended to increasing the sharpness of axial dopant profiles, for example, in Si-Ge pn-heterojunction nanowires which is important for such applications as nanowire tunnel field effect transistors or in Si pn-junction nanowires.     

Silicon nanowire growth on glass substrates using hot wire chemical vapor deposition

We report here, the first observation of silicon nanowire growth via the VLS route at 400 °C using the HWCVD technique with gold (Au) as catalyst. The supersaturation of the alloy droplet, due to a large flux of atomic silicon generated due to efficient dissociation of the silane over the hot wire, leads to the precipitation of Si nanowires. The hot wire process plays a dual role in the entire nanowire growth. Firstly, the atomic hydrogen generated from the hot wire leads to the formation of the metal nanoclusters. Secondly, it offers a continuous supply of silicon atoms enabling efficient diffusion of Si into the Si-Au eutectic alloy leading to the growth of dense silicon nanowires as observed in the SEM. The Raman and TEM data show that the Si nanowires are amorphous in nature. Precise tuning of the hot wire CVD process parameters gives rise to a high density of silicon nanowires having diameters as small as 50 nm and lengths of about a few microns.     

Gold nanocluster distribution on faceted and kinked Si nanowires

Si nanowires were grown on (111) substrates by ultra high vacuum chemical vapor deposition using the Au-catalyzed vapor-liquid-solid (VLS) technique. Depending on the growth temperature, the nanowires can be straight in the <111> direction or kinked towards <112>. We present a transmission electron microscopy investigation of the <112> Si nanowires. Results exhibit the relationship between the morphology of nanowires and the distribution of gold on sidewalls bounding the nanowires. The distribution of Au nanoclusters is used as a probe to investigate the growth mechanisms of the VLS process. Our observations are consistent with the model of nucleation and step flow related to the oscillatory behavior of the catalyst droplet.     

Growth of silicon nanowires by electron beam evaporation using indium catalyst

For the first time silicon nanowires have been grown on indium (In) coated Si (100) substrates using e-beam evaporation at a low substrate temperature of 300 °C. Standard spectroscopic and microscopic techniques have been employed for the structural, morphological and compositional properties of as grown Si nanowires. The as grown Si nanowires have randomly oriented with an average length of 600 nm for a deposition time of 15 min. As grown Si nanowires have shown indium nanoparticle (capped) on top of it confirming the Vapor Liquid Solid (VLS) growth mechanism. Transmission Electron Microscope (TEM) measurements have revealed pure and single crystalline nature of Si nanowires. The obtained results have indicated good progress towards finding alternative catalyst to gold for the synthesis of Si nanowires.     

Morphology control of layer-structured gallium selenide nanowires

Layer-structured group III chalcogenides have highly anisotropic properties and are attractive materials for stable photocathodes and battery electrodes. We report the controlled synthesis and characterization of layer-structured GaSe nanowires via a catalyst-assisted vapor-liquid-solid (VLS) growth mechanism during GaSe powder evaporation. GaSe nanowires consist of Se-Ga-Ga-Se layers stacked together via van der Waals interactions to form belt-shaped nanowires with a growth direction along the [11-20], width along the [1-100], and height along the [0001] direction. Nanobelts exhibit a variety of morphologies including straight, zigzag, and saw-tooth shapes. These morphologies are realized by controlling the growth temperature and time so that the actual catalysts have a chemical composition of Au, Au-Ga alloy, or Ga. The participation of Ga in the VLS catalyst is important for achieving different morphologies of GaSe. In addition, GaSe nanotubes are also prepared by a slow growth process.     

Toward local growth of individual nanowires on three-dimensional microstructures by using a minimally invasive catalyst templating method

We present a novel minimally invasive postprocessing method for catalyst templating based on focused charged particle beam structuring, which enables a localized vapor-liquid-solid (VLS) growth of individual nanowires on prefabricated three-dimensional micro- and nanostructures. Gas-assisted focused electron beam induced deposition (FEBID) was used to deposit a SiO(x) surface layer of about 10 × 10 μm(2) on top of a silicon atomic force microscopy cantilever. Gallium focused ion beam (FIB) milling was used to make a hole through the SiO(x) layer into the underlying silicon. The hole was locally filled with a gold catalyst via FEBID using either Me(2)Au(tfac) or Me(2)Au(acac) as precursor. Subsequent chemical vapor deposition (CVD)-induced VLS growth using a mixture of SiH(4) and Ar resulted in individual high quality crystalline nanowires. The process, its yield, and the resulting angular distribution/crystal orientation of the silicon nanowires are discussed. The presented combined FIB/FEBID/CVD-VLS process is currently the only proven method that enables the growth of individual monocrystalline Si nanowires on prestructured substrates and devices.     

Plasma-plasmonics synergy in the Ga-catalyzed growth of Si-nanowires

This paper reports on the growth of Si nanowires (NWs) by SiH₄/H₂ plasmas using the non-noble Ga-nanoparticles (NPs) catalysts. A comparative investigation of conventional Si-NWs vapour–liquid–solid (VLS) growth catalyzed by Au NPs is also reported. We investigate the use of a hydrogen plasma and of a SiH₄/H₂ plasma for removing Ga oxide shell and for enhancing the Si dissolution into the catalyst, respectively. By exploiting the Ga NPs surface plasmon resonance (SPR) sensitivity to their surface chemistry, the SPR characteristic of Ga NPs has been monitored by real time spectroscopic ellipsometry in order to control the hydrogen plasma/Ga NPs interaction and the involved processes (oxide removal and NPs dissolution by volatile gallium hydride). Using in situ laser reflectance interferometry the metal catalyzed Si NWs growth process has been investigated to find the effect of the plasma activation on the growth kinetics. The role of atomic hydrogen in the NWs growth mechanism and, in particular, in the SiH₄ dissolution into the catalysts, is discussed. We show that while Au catalysts because of the re-aggregation of NPs yields NWs that do not correspond to the original size of the Au NPs catalyst, the NWs grown by the Ga catalyst retains the diameter dictated by the size of the Ga NPs. Therefore, the advantage of Ga NPs as catalysts for controlling NWs diameter is demonstrated.     

In2O3 nanowires for gas sensors: morphology and sensing characterisation

Thin and densely packed In₂O₃ nanowires have been synthesised on alumina substrates via transport and condensation method, starting from nanoparticles of indium or palladium as catalysts for the condensation process. Indium catalyst promoted wires growth according to vapour-solid (VS) mechanism, while palladium catalyst leads to wires formation based on vapour-liquid-solid (VLS) condensation. Electron microscopy and related diffraction analysis demonstrated that the wires are monocrystalline, with atomically sharp termination of the lateral sides, and are free from extended defects. The sensing properties of nanowires bundles have been tested to acetone using the flow through technique in the temperature range between 100 and 500 °C.     

Direct measurement of individual deep traps in single silicon nanowires

The potential of the metal nanocatalyst to contaminate vapor-liquid-solid (VLS) grown semiconductor nanowires has been a long-standing concern, since the most common catalyst material, Au, is known to induce deep gap states in several semiconductors. Here we use Kelvin probe force microscopy to image individual deep acceptor type trapping centers in single undoped Si nanowires grown with an Au catalyst. The switching between occupied and empty trap states is reversibly controlled by the back-gate potential in a nanowire transistor. The trap energy level, i.e., E(C) - E(T) = 0.65 ± 0.1 eV was extracted and the concentration was estimated to be ～2 × 10(16) cm(-3). The energy and concentration are consistent with traps resulting from the unintentional incorporation of Au atoms during the VLS growth.     

Selective growth of silica nanowires in silicon catalysed by Pt thin film

Selective growth of amorphous silica nanowires on a silicon wafer deposited with Pt thin film is reported. The mechanism of nanowire growth has been established to follow the vapour liquid solid (VLS) model via the PtSi phase acting as the catalyst. Nanowires grow with diameters ranging from 50 to 500?nm. These bottom-up grown nanowires exhibit photoluminescence with a stable emission of blue light at 430?nm under excitation. The effect of varying the seed layer thickness (Pt film) from 2 to 100?nm has been studied. It is observed that, above 10?nm thickness, a continuous layer of Pt(2)Si re-solidifies on the surface, inhibiting the growth of nanowires. The selectivity to the Pt thickness has been exploited to create regions of nanowires connected to conducting silicide (Pt(2)Si) simultaneously in a single furnace treatment. This novel approach has opened the gateways for realizing hybrid interconnects in silicon for various nano-optical applications such as the localization of light, low-dimensional waveguides for functional microphotonics, scanning near-field microscopy, and nanoantennae.     

Manufacturing aspects of oxide nanowires

Exploring the mass manufacturing aspects of nanostructures can enable the transition from laboratory-based research into a commercial product. Among the several one-dimensional nanostructures, oxide nanomaterials have a wide variety of applications including energy harvesting, photonics and biosensing applications. In this article, mass manufacturing aspects of bottom-up grown silica nanowires on silicon (Si) by metal thin film catalysis have been detailed. The investigation reports on (a) a growth model derived from studying nanowire nucleation as a function of heating time, (b) nanowire growth rate estimation via weight differential of the Si substrate before and after growth, and (c) reusability of the Si substrate for nanowire growth.Silica nanowires were found to grow on Pd coated Si substrate in an open tube furnace at 1100 °C with Ar as a carrier gas and a Si support wafer. Nanowires nucleated following a combination of Vapor Liquid Solid (VLS) and Oxide Assisted Growth (OAG) mechanisms conducive for mass manufacturing. The role of SiO vapor was found to be critical in the growth of the wires. Further, five distinct growth regimes were identified while estimating the growth rate. Experimental observations indicated the non-reusability of the Si substrate after one time growth due to depletion of catalyst.     

Investigation of initial growth of ZnO nanowires and their growth mechanism

ZnO nanowires were synthesized on Si substrates by a simple metal vapor deposition method without any catalysts. The initial growth and the growth mechanism of the ZnO nanowires were studied using scanning and transmission electron microscopy. We found that the ZnO nanowires grew on the Si substrate via a self-seeding vapor-solid mechanism. The growth process of the ZnO nanowires consisted of four steps: self-seeding, one-dimensional epitaxial growth of the nanowires on the seeds by a base-growth mode, further acceleration of nanowire growth with additional seeding, and active formation of the nanowires.     

Formation of Single Tiers of Bridging Silicon Nanowires for Transistor Applications Using Vapor–Liquid–Solid Growth from Short Silicon‐on‐Insulator Sidewalls

Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon‐on‐insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vapor–liquid–solid (VLS) process. The growth of unobstructed nanowire material occurs due to the attachment of catalyst nanoparticles on silicon surfaces and the removal of catalyst nanoparticles from the SOI‐buried oxide (BOX). Three‐terminal current–voltage measurements of the structure using the substrate as a planar backgate after VLS nanowire growth reveal transistor behaviour characteristics.     

Phase selection enabled formation of abrupt axial heterojunctions in branched oxide nanowires

Rational synthesis of nanowires via the vapor-liquid-solid (VLS) mechanism with compositional and structural controls is vitally important for fabricating functional nanodevices from bottom up. Here, we show that branched indium tin oxide nanowires can be in situ seeded in vapor transport growth using tailored Au-Cu alloys as catalyst. Furthermore, we demonstrate that VLS synthesis gives unprecedented freedom to navigate the ternary In-Sn-O phase diagram, and a rare and bulk-unstable cubic phase can be selectively stabilized in nanowires. The stabilized cubic fluorite phase possesses an unusual almost equimolar concentration of In and Sn, forming a defect-free epitaxial interface with the conventional bixbyite phase of tin-doped indium oxide that is the most employed transparent conducting oxide. This rational methodology of selecting phases and making abrupt axial heterojunctions in nanowires presents advantages over the conventional synthesis routes, promising novel composition-modulated nanomaterials.     

Solid-phase diffusion mechanism for GaAs nanowire growth

Controllable production of nanometre-sized structures is an important field of research, and synthesis of one-dimensional objects, such as nanowires, is a rapidly expanding area with numerous applications, for example, in electronics, photonics, biology and medicine. Nanoscale electronic devices created inside nanowires, such as p-n junctions, were reported ten years ago. More recently, hetero-structure devices with clear quantum-mechanical behaviour have been reported, for example the double-barrier resonant tunnelling diode and the single-electron transistor. The generally accepted theory of semiconductor nanowire growth is the vapour-liquid-solid (VLS) growth mechanism, based on growth from a liquid metal seed particle. In this letter we suggest the existence of a growth regime quite different from VLS. We show that this new growth regime is based on a solid-phase diffusion mechanism of a single component through a gold seed particle, as shown by in situ heating experiments of GaAs nanowires in a transmission electron microscope, and supported by highly resolved chemical analysis and finite element calculations of the mass transport and composition profiles.     

Physical consequences of the equivalence of conditions for the steady-state growth of nanowires and the nucleation on triple phase line

A new theoretical model describing the steady-state growth and crystalline structure of semiconductor nanowires (NWs) is proposed and its physical consequences are considered. It is demonstrated that the Nebol’sin-Shchetinin condition (nonwetting of the NW side surface by the liquid drop) necessary for the steady-state growth of NWs according to the vapor-liquid-solid (VLS) mechanism is equivalent to the Glas condition of nucleation on the triple phase line for the monocentric NW growth. An energy criterion for the steady-state growth of NWs is formulated in the general case of faceted NW side surface. Effective surface energies are found that determine the activation barrier for nucleation at the NW top. Based on the proposed model, the issue of determining the III–V semiconductor NW crystal structure (cubic zinc blende type versus hexagonal wurtzite type) is considered. In particular, it is shown that a decrease in the surface energy of a catalyst must lead to the predominant formation of a cubic phase, which is confirmed by experimental data on the growth of GaAs nanowires according to the VLS mechanism with Au and Ga catalysts.     

SiGe nanowire growth and characterization

Single-crystal SiGe nanowires were synthesized via the vapour-liquid-solid (VLS) growth mechanism using disilane and germane as precursor gases. We have investigated the effect of temperature, pressure, and the inlet gas ratio on the growth and stoichiometry of Si(x)Ge(1-x) nanowires. The nanowires were characterized using scanning and transmission electron microscopies and energy dispersive x-ray analysis. It was found that nanowires with a Si:Ge ratio of about 1 had smooth surfaces, whereas departure from this ratio led to rough surfaces. Electrical properties were then investigated by fabricating back-gated field effect transistors (using a focused ion beam system) where single SiGe nanowires served as the conduction channels. Gated conduction was observed although resistance in the undoped devices was high.     

Batchwise growth of silica cone patterns via self-assembly of aligned nanowires

Silica-cone patterns self-assembled from well-aligned nanowires are synthesized using gallium droplets as the catalyst and silicon wafers as the silicon source. The cones form a triangular pattern array radially on almost the whole surface of the molten Ga ball. Detailed field-emission scanning electron microscopy (SEM) analysis shows that the cone-pattern pieces frequently slide off and are detached from the molten Ga ball surface, which leads to the exposure of the catalyst surface and the growth of a new batch of silicon oxide nanowires as well as the cone patterns. The processes of growth and detachment alternate, giving rise to the formation of a volcano-like or a flower-like structure with bulk-quantity pieces of cone patterns piled up around the Ga ball. Consequently, the cone-patterned layer grows batch by batch until the reaction is terminated. Different to the conventional metal-catalyzed growth model, the batch-by-batch growth of the triangular cone patterns proceeds on the molten Ga balls via alternate growth on and detachment from the catalyst surface of the patterns; the Ga droplet can be used continuously and circularly as an effective catalyst for the growth of amorphous SiO(x) nanowires during the whole growth period. The intriguing batchwise growth phenomena may enrich our understanding of the vapour-liquid-solid (VLS) growth mechanism for the catalyst growth of nanowires or other nanostructures and may offer a different way of self-assembling novel silica nanostructures.