A modified current mirror with level shifting capability and low input impedance

A current mirror with DC level shifting capability and low input impedance is described. The input impedance can be varied over a limited range without significantly altering the current gain of the circuit, and lateral p-n-p transistors can be used to provide reasonable performance up to a few megahertz.     

Low power high output impedance high bandwidth QFGMOS current mirror

Current mirror is a basic block of any mixed-signal circuit for example in an analog-to-digital converter. Its precise performance is the key requirement for analog circuits where offset is a measure issue. The key parameter which defines the performance of current mirror is its input/output impedance, input swing, and bandwidth. In this paper, a low power design of current mirror using quasi-floating gate MOS transistor is presented. The proposed current mirror boosts its output impedance in range of giga-ohm through use of regulated cascode structure followed by super-cascode. Another improvement is done in reduced input compliance voltage limits with the help of level shifter. The proposed current mirror operates well for input current range 0–700 $\mathrm{\mu }A$ with an input and output impedance of 160 $\Omega$ and 8.55 $\mathrm{G}\Omega$ respectively and high bandwidth of 4.05 $\mathrm{GHz}$. The total power consumption of the proposed current mirror is about 0.84 mW. The low power consumption with enhanced output impedance and bandwidth suits proposed current mirror for various high-speed analog designs. Performance of the presented current mirror circuit is verified using HSpice simulations on 0.18 $\mathrm{\mu }m$ mixed-mode twill-well technology at a supply voltage of ±0.5 V.     

A novel ultra-high compliance, high output impedance low power very accurate high performance current mirror

In this paper a novel ultra-high compliance, low power, very accurate and high output impedance current mirror/source is proposed. Deliberately composed elements and a good combination (for a mutual auto control action) of negative and positive feedbacks in the proposed circuit made it unique in gathering ultra-high compliances, high output impedance and high accuracy ever demanded merits. The principle of operation of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by HSPICE simulation in TSMC 0.18 μm CMOS, BSIM3 and Level49 technology. Simulation results with 1 V power supply and 8 μA input current show an input and output minimum voltages of 0.058 and 0.055 V, respectively, which interestingly provide the highest yet reported compliances for current mirrors implemented by regular CMOS technology. Besides an input resistance of 13.3 Ω, an extremely high output resistance of 34.3 GΩ and −3 dB cutoff frequency of 210 MHz are achieved for the proposed circuit while it consumes only 42.5 μW and its current transfer error (at bias point) is the excellent value of 0.02%.     

A high speed low input impedance current pulse amplifier cell

A high speed CMOS current pulse amplifier cell with low input impedance, devoted to nuclear multichannel detectors where crosstalk is a serious problem, is presented. The symmetry of the circuit achieved with complementary transistors yields both an input and an output with low offset voltage, opening a large field of applications such as transimpedance amplifiers and therefore transimpedance operational amplifiers.     

High input impedance current conveyor filters

Two new active RC canonic band pass filters are presented. The new configurations offer a very high input impedance and employ single grounded resistors for independent adjustments of ω₀, Q and gain.     

A bulk-driven quasi-floating gate FVF current mirror for low voltage,low power applications

This paper introduces a new low-voltage, low-power FVF current mirror circuit. The bulk-driven (BD) technique is employed to achieve extended input voltage swing and low supply voltage. Besides, the quasi-floating gate (QFG) is used to achieve high frequency performance. The merging of (BD) and (QFG) appear as a good and attractive solution to improve the circuit performance with reduced supply voltage. Benefiting from the interesting properties of (BD-QFG) MOSFET (MOST) technique, the proposed FVF current mirror circuit exhibits superior performance compared to other previously reported works. The workability of the proposed circuit has been verified through ELDO simulator based on a 0.18 μm USMC process. It achieves an enhanced bandwidth (2.7 GHz), low power consumption (79.33 μW), a low input impedance (130 Ω), and high output impedance (9.5 G Ω) from a low supply voltage (0.8 V). Monte Carlo simulation is also carried out, which proves the robust performance of the proposed circuit against mismatches. An application of the proposed current mirror is presented in the form of the current comparator to ensure the workability of the proposed BD-QFG current mirror.     

Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements

This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output stage to achieve low input resistance and very high output resistance. It can be used as a high-precision current mirror in analog and mixed signal circuits with a power supply close to a transistor's threshold voltage. The proposed current mirror has been simulated and a bandwidth of 40 MHz has been obtained. An experimental chip prototype has been sent for fabrication and has been experimentally verified, obtaining 0.15-V input-output voltage requirements, 100-/spl Omega/ input resistance, and more than 200-M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1.2-V supply in a standard CMOS technology.     

Very low dark current heterojunction CCD's

A model has been formulated which accounts for the major sources of dark current (JD) associated with a single pixel of a heterojunction, Schottky gate charge-coupled device (CCD). This model predicts the temperature dependence of JDand shows that for properly fabricated gates, bulk generation in the channel is the primary source of dark current. To verify the model, the dark current of Al0.3Ga0.7As/ GaAs n-p⁺heterostructure CCD's was measured over the temperature range 23-55°C. At room temperature,J_{D} approx 83pA/cm², typically, and some pixels have JDas low as 43 pA/cm². These are the lowest dark currents reported to date for a CCD structure. The data at 55°C show that, typically, JDincreases to ∼ 1 nA/cm². Furthermore, the data confirm the temperature dependence of JDpredicted by the model.     

A 1-V low power gain boosted self-cascoding current mirror operational transconductance amplifier

A low-voltage, micro-power, low-noise, high-gain, high-output swing current mirror-based operational transconductance amplifier (OTA) is presented. The proposed OTA achieves high DC gain and output swing by the adoption of gain boosted current mirroring and self-cascoding techniques. From the simulation, the proposed OTA implemented on a 0.18 μm CMOS shows the DC gain up to 90 dB with a gain bandwidth of 700 KHz for a load capacitor of 1 pF and an output voltage swing of 600 mV. The OTA dissipates only 750 nW from 1.0 V supply.     

一种基于恒定电流技术的具有低功耗和低失真的轨导轨输入输出放大器

本文提出了一种应用于音频信号处理的具有恒定的跨导Rail-to-Rail放大器,并且恒定跨导是通过一种恒定电流技术来实现。此技术是基于差分输入对工作在弱反型区。对于工作在弱反型区的MOSFET具有低失调和低功耗的优势。采用标准的0.35微米的CMOS工艺对电路进行流片,此芯片占有面积75×183 μm2。测试结果表明：在3.3V电源电压下,电路最大功耗为85.37mW;在2kHz时总谐波失真为1.2%。     

A low power and low distortion rail-to-rail input/output amplifier using constant current technique

A rail-to-rail amplifier with constant transconductance,intended for audio processing,is presented.The constant transconductance is obtained by a constant current technique based on the input differential pairs operating in the weak inversion region.MOSFETs working in the weak inversion region have the advantages of low power and low distortion.The proposed rail-to-rail amplifier,fabricated in a standard 0.35μm CMOS process,occupies a core die area of 75×183μm~2.Measured results show that the maximum power consumption is 85.37μW with a supply voltage of 3.3 V and the total harmonic distortion level is 1.2%at 2 kHz.     

A low impedance receiver for power efficient current mode signalling across on-chip global interconnects

In this work we propose a low impedance receiver for on-chip high speed current-mode signalling over global interconnect. The receiver provides a very low input impedance even with a low quiescent power. The low input impedance helps to get high link bandwidth without any passive terminator. Moreover, the receiver has high transimpedance gain over a large bandwidth. This facilitates in reducing the signalling current by 6.7 times compared to a passive termination. A test chip has been fabricated in 0.18 μm CMOS process to test the topology with a prototype global interconnect having a length of 10 mm. Power consumption of the transceiver for a data rate of 2.5 Gbps data is 2 mW. This gives an energy efficiency of 0.8 pJ/b.     

Quasi-floating gate MOSFET based low voltage current mirror

This paper demonstrates the use of quasi-floating gate MOSFET (QFGMOS) in the design of a low voltage current mirror and highlights its advantages over the floating gate MOSFET (FGMOS). The use of resistive compensation has been shown to enhance the bandwidth of QFGMOS current mirror. The proposed current mirror based on QFGMOS has a current range up to 500 μA with offset of 2.2 nA, input resistance of 235 Ω, output resistance of 117 kΩ, current transfer ratio of 0.98, dissipates 0.83 mW power and exhibits bandwidth of 656 MHz which increases to 1.52 GHz with resistive compensation. The theoretical and simulation results are in good agreement. The workability of the circuits has been verified using PSpice simulation for 0.13 μm technology with a supply voltage of ±0.5 V.     

一种基于衬底驱动PMOS晶体管的低压共源共栅电流镜

基于衬底驱动PMOS晶体管设计了低压PMOS衬底驱动CMOS共源共栅电流镜电路(BDCCM),并讨论分析了其输入阻抗、输出阻抗和频率特性.基于TSMC 0.25μm 2P4M CMOS工艺的仿真和测试结果说明,BDCCM的最低输入压降要求只有0.3V,但是其输入输出线性度和频率带宽要比传统的共源共栅电流镜低,是低频低压CMOS模拟集成电路设计的新型高性能共源共栅电流镜.     

Comparison of high impedance input topologies with low EMI susceptibility

Different Input Topologies with resistance to electromagnetic interferences (EMI) are analyzed and compared in terms of EMI reduction. The emphasis in this study is put on circuit robustness and applicability to industrial applications, which requires sufficient EMI rejection over all process corners. Furthermore, a new topology based on a replica amplifier is introduced, that is more robust to process variation compared to previous works (Jean-Michel Redouté and Michiel Steyaert, ESSCIRC, Sept. 2008; Fiori, IEEE Transac Electromag Compat 49(4):834–839, 2007) that rely on accurate matching of absolute values in order to achieve efficient EMI cancellation.     

Very low power consumption semiconductor optical amplifier array

Very low power consuming and polarization insensitive semiconductor optical amplifier arrays with submicron-wide InGaAsP active layers are realized by selective MOVPE technique. 20-dB signal gain at a low injection current of 25 mA was achieved in four-channel arrays     

低功耗单端输入差分输出低噪声放大器

该文设计了应用于无线局域网2.4GHz低噪声放大器(LNA),采用了SMIC0.18μm CMOS工艺技术和单端输入差分输出的电路结构.电路同时采用了双支路的电流复用技术,实现了低功耗、低噪声和高增益的性能;通过在输出级增加一级共栅级放大电路,有效地增加了电路的对称性;共源支路串联电感,解决了差分信号相位偏差问题.仿真结果表明,设计的LNA的噪声系数为1.76dB,增益为20.9dB,在1.8V电源电压下,功耗为8.5mW.     

Differential amplifier input impedance

The analysis of a simple differential amplifier excited by two separate voltage sources reveals that the input impedance which loads the voltage source at the inverting input is not a constant but rather is a function of the characteristics of each voltage source. An expression is derived for the input impedance and the result is illustrated in a simple example.     

Very low threshold current ridge-waveguide AlGaAs/GaAs single-quantum-well lasers

Ridged-waveguide AlGaAs/GaAs single-quantum-well lasers were fabricated from a molecular-beam-grown GRIN-SCH wafer in which a superlattice buffer layer was introduced. Fabricated diodes exhibited excellent lasing characteristics including a very low threshold current of 5 mA with a T0 value as high as 160 K.