The development of thermoelectric power generators

This work is a review of the technical developments that have led from early semiconductor research to the emergence of the thermoelectric generator as a rapidly growing power source of high reliability.     

MHD power generators in central stations

The broad area of MHD power generation is surveyed in this article, with emphasis on its application to central stations. Following a brief discussion of the MHD principle, three types of combined power plants are described: the coal-burning MHD-steam power plant, the noble-gas MHD generator with a nuclear heat source, and the liquid-metal MHD generator. Design problems and operating characteristics are presented, together with possible advantages and problem areas.     

Fuel cell power system and high power DC-DC converter

This paper discusses the principle and electrical characteristics of the fuel cell, designs an innovative hybrid power system, and proposes a new DC/DC converter scheme to combine the fuel cell with the storage system. An effective converter scheme for the fuel cell is obtained by analyzing the high efficient topology as well as the phase shifted pulse-width modulation. Through comparing several different control modes of converters, a 75-kW prototype system is constructed, moreover, which steady-state operating characteristics are illustrated and discussed in detail. At last, experimental results are also shown to verify the proposed scheme.     

Coal comes clean [thermal power stations]

Coal-fired power stations provide some 40% of the world's electricity, making coal the prime fossil fuel for power generation. In 1989, world coal-fired capacity for electricity generation was over 800 GW, equivalent to an annual consumption of 1950 Mt. Here, however, the author details how coal's status as the dominant fuel for electricity generation is under threat, and describes, how, the coal industry is responding with a range of cleaner and more efficient combustion technologies     

锌／空气燃料电池有望成为清洁电源

适合用于要求:容量比较大,充电速度快,并且不污染环境的应用系统。     

Programmable PFC based hybrid multipulse power rectifier for ultra clean power application

A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THD/sub I/). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.     

双馈风力发电机功率解耦控制的研究

介绍双馈风力发电机的基本原理,利用矢量控制并结合定子磁场定向的矢量控制,建立基于Matlab的双闭环控制系统仿真模型。为了更为准确地实现定子磁场定向并考虑到定子绕组电阻对磁场定向的影响,采用改进型的定予磁链观测模型。通过仿真验证了采用改进型定子磁场定向的双馈风力发电控制系统,实现了有功功率和无功功率解耦。     

Peak power and bandwidth efficient linear modulation

In portable wireless communication systems, power consumption is of major concern. Traditional modulation and coding schemes have been designed from the standpoint of minimizing average power. However, for linear power amplifiers needed for spectrally efficient modulation formats, amplifier efficiency and hence power consumption are determined by the peak power of the transmitted signal. This paper looks into modulation formats which minimize peak power and retain high spectral efficiency. Peak power is broken into a sum (in terms of decibels) of average power and a peak-to-average power ratio, and a variety of modulation formats are evaluated in terms of peak power efficiency in both a Gaussian noise and Rayleigh fading channel. A generalized phase shift keying (PSK) modulation format is developed and shown to offer superior peak power efficiency relative to that of commonly used linear modulation formats. Two schemes are presented for reducing the peak-to-average power ratio of various modulation formats. First, data translation codes are used to avoid data sequences which cause large peaks in the transmitted signal. This approach was found to be most productive in quadrature amplitude modulation (QAM) formats. Finally, an adaptive peak suppression algorithm is presented which further reduces the peak-to-average power ratios of the PSK and generalized PSK formats. The peak suppression algorithm is also applicable to π/4-QPSK and was found to improve peak power efficiency of that format by about 1.25 dB over a Rayleigh fading channel     

Linearised and highly efficient CDMA power amplifier

A high efficiency class F 1.9 GHz power amplifier (PA) module with a predistortion lineariser is proposed for IS-95 CDMA. Efficiency and linearity are evaluated for class F and AB operation. Further improvements were obtained using a low cost RF predistorter. Good agreement was obtained between experiment and simulation     

Design of efficient power amplifier for low power transmitters

This paper presents a fully integrated, low transmit-power and high-efficiency 2.4 GHz class-E power amplifier (PA) in TSMC 0.18 μm CMOS process for low-power transmitters such as wireless sensor networks (WSN). In this paper, a new output load has been proposed. Also, analytical design equations have been included to design an efficient low power circuit. This PA, employs the pad capacitance and bond-wire inductance of the output node, for satisfying class-E zero-voltage switching (ZVS) condition and matching the antenna’s 50 Ω resistance. By using bond-wire inductance instead of inductor in the output filter, smaller chip size and higher efficiency has been achieved compared to other works for low transmit-power applications. Also, the effectiveness of bulk-drive technique on faster switching and increasing efficiency have been evaluated. It has been proved that this technique leads to increase the efficiency of switching PAs. This PA delivers a range of output power from 2.7 to 7.2 dBm with a supply voltage range from 500 to 850 mV while achieving overall power efficiency range of 57.3–60.7%.     

Low power wide gates for modern power efficient processors

In this paper, a low power register file and tag comparator is proposed which has lower leakage and higher noise immunity without dramatic speed degradation due to the wide fan-in gates. Simulation of register files and tag comparators designed is done using low-V_th 90 nm CMOS process technology model in all process corners. The results demonstrate 20% power reduction and 2× noise-immunity improvement in the implemented register file using the proposed circuit at the same delay compared to the standard domino circuits. On the other hand, simulation of tag comparators implemented using the other proposed circuit shows 41%, 22% and 7.5% reduction in power, delay and area, respectively compared to the standard footless domino at the same robustness condition. Moreover, the register file and the tag comparator designed with the proposed circuits respectively show 2.48 and 3 times improvement in the defined figure of merit compared to the counterpart circuits designed with the conventional domino circuit. Thus, the proposed are power efficient and suitable approaches for embedded processors with multi-ported register file and fully-associative caches with large number of tag comparators.     

Low power dynamic circuit for power efficient bit lines

In this paper, a low power dynamic circuit is presented to reduce the power consumption of bit lines in multi-port memories. Using the proposed circuit, the voltage swing of the pull-down network is lowered to reduce the power consumption of wide fan-in gates employed in memory’s bit lines. Wide fan-in OR gates are designed and simulated using the proposed dynamic circuit in 90 nm CMOS technology. Simulation results show at least 40% reduction of power consumption and 1.2X noise immunity improvement compared to the conventional dynamic circuits at the same delay. Exploiting the proposed dynamic circuit, wide fan-in multiplexers are also designed. The multiplexers are simulated using a 90 nm CMOS model in all process corners. The results show 41% power reduction and 27% speed improvement for the proposed 128-input multiplexer in comparison with the conventional multiplexer at the same noise immunity.     

Fuel cell power plants for automotive applications

The SPE^®fuel cell has been under continuous development since the mid-fifties. For the most part the applications have been of a specialty type such as for space vehicle electrical power, remote or mobile ground power, and undersea systems. The common denominator of these specialty power plant applications is that each is obliged to pay a premium for electric power generation. As a result the SPE fuel cell has been economically competitive in the specialty powerplant market. Until recently the SPE fuel cell has not been considered economically viable in the industrial/commercial markets in competition with gas turbine generators or internal combustion engines. However, in the last few years the electrical current density capability of the SPE fuel cell has markedly increased which has the impact of reducing capital costs on the basis of the kW output rating. During 1981, a study was conducted for the Los Alamos National Laboratory (LANL) to determine the feasibility of using this SPE fuel cell technology for vehicular propulsion. The results show that with adequate development, a power plant is possible which will meet the performance, size, and weight objectives, and that the costs for such a system could be competitive with other potential advanced power systems.     

高效率E类射频功率放大器

研究了E类RF放大器的电路结构、工作原理、存在问题以及解决的方法--差分和交叉耦合反馈结构,最后给出了E类放大器的实例.由于具有低成本、高集成度、多功用等优点,MOS工艺在射频功率放大方面有很大的发展潜力.在本文中,用0.6 u m CMOS工艺实现了E类放大器的设计.     

燃料电池带我们进入分散供电新时代

据专家分析预测,一种小巧的燃料电池（Smart FuelCell）将在2005年开始商品化。届时,笔记本电脑、IMT-2000手机和PDA等便携式网络终端设备,将由小巧的燃料电池供电,用户将省掉为蓄电池充电或更换新干电池的麻烦。与其说这是一种小巧的燃料电池,倒不如说这是一台小型发电机,它所用的燃料在街上将随处可以买到。这样一来,在便携式设备里占居统治地位的锂离子蓄电池将黯然失色。 小巧燃料电池的出现,将会引起便携式电子设备用电池的变革。一石激起千层浪,也将波及至汽车、住宅乃至社会供电系统的改变。于是,城市里街道两边的架在高空的送电线将逐渐消失,只需在利用电力的现场就近发电即可。在21世纪里,人们将迎来分散供电的新时代。鉴于此情,本文扼要地介绍燃料电池的普通常识,谨供参考。     

面向智能电网的清洁能源联合供电系统设计

清洁能源联合供电是新能源利用的重要方向之一,针对现有清洁能源联合供电系统设计中未重点考虑对蓄电池的管理,导致供电效率低的问题,提出并设计一种面向智能电网的清洁能源联合供电系统。利用DC/DC变换器,完成对清洁能源能量的传递和转换;利用DC/AC变换器,通过直流母线为蓄电池提供能量;利用蓄电池控制器,对蓄电池充放电进行控制;系统软件部分主要对供电系统的蓄电池充电子程序及放电子程序进行分析,联合完成对面向智能电网的清洁能源联合供电系统设计。实验结果表明,该系统的供电效率可高达89%,蓄电池故障率远低于传统方法,具有良好的供电性能。     

Implementation of scalable power and area efficient high-throughputViterbi decoders

Today's data reconstruction in digital communication systems requires designs of highest throughput rate at low power. The Viterbi algorithm is a key element in such digital signal processing applications. The nonlinear and recursive nature of the Viterbi decoder makes its high-speed implementation challenging. Several promising approaches to achieve either high throughput or low power have been proposed in the past. A combination of these is developed in this paper. Additional new concepts allow building a signal-flow graph suitable for the design of high-speed Viterbi decoders with low power. Using a flexible datapath generator facilitates the essential quantitative optimization from architectural down to physical level to fully exploit the low-power and high-speed potential of a given technology. With parameterizable design entry, this datapath generator establishes the basis of a scalable platform-based design library. Altogether, this allows coverage of the range of today's industrial interest in high throughput rates, from 150 Msymbols/s up to 1.2 Gsymbols/s using conventional CMOS logic. The features of two exemplary Viterbi decoder implementations prove the benefit of this physically oriented design methodology in terms of speed and low power, when compared to other leading edge implementations