Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure

ADCs are fully characterized by both static and dynamic parameters. Testing methods usually combine a histogram-based approach with a spectral analysis to determine the complete set of ADCs parameters. In the view of a unique test procedure, this paper investigates the correlation between both kinds of parameters. Experimental results demonstrate that under appropriate test conditions, the dynamic parameters extracted from a classical FFT exhibit significant variations against ADC offset, gain and non-linearity errors, opening the way of a low-cost test strategy in the frequency domain.     

无锡地面数字电视覆盖与同频干扰分析和测试

介绍了无锡DS-33频道地面数字电视的覆盖规划过程,通过理论计算和覆盖仿真,详细分析广电大厦发射点、二茅峰发射点的覆盖效果以及对周边城市同频道模拟电视信号的干扰情况,并由实际测试结果验证规划的可行性,为其他城市的地面数字电视覆盖规划提供参考。     

Balance testing and balance-testable design of logic circuits

We propose a low-cost method for testing logic circuits, termed balance testing, which is particularly suited to built-in self testing. Conceptually related to ones counting and syndrome testing, it detects faults by checking the difference between the number of ones and the number of zeros in the test response sequence. A key advantage of balance testing is that the testability of various fault types can be easily analyzed. We present a novel analysis technique which leads to necessary and sufficient conditions for the balance testability of the standard single stuck-line (SSL) faults. This analysis can be easily extended to multiple stuck-line and bridging faults. Balance testing also forms the basis for design for balance testability (DFBT), a systematic DFT technique that achieves full coverage of SSL faults. It places the unit under test in a low-cost framework circuit that guarantees complete balance testability. Unlike most existing DFT techniques, DFBT requires only one additional control input and no redesign of the underlying circuit is necessary. We present experimental results on applying balance testing to the ISCAS 85 benchmark circuits, which show that very high fault coverage is obtained for large circuits even with reduced deterministic test sets. This coverage can always be made 100% either by adding tests or applying DFBT.This research was supported by the National Science Foundation under Grant No. MIP-9200526. Parts of this paper were published in preliminary form in Proc. 23rd Symp. Fault-Tolerant Computing, Toulouse, June 1993, and in Proc. 31st Design Automation Conf, San Diego, June 1994.     

基于中间件的故障注入技术在嵌入式软件逻辑覆盖测试中的应用

以使用中间件故障注入增加软件测试覆盖率为目的,对故障注入技术和原理进行了介绍;并通过实际工程例子提出了一种基于中间件故障注入技术的应用,同时比较了采用故障注入技术后的软件逻辑覆盖测试结果与使用常规测试手段进行的覆盖测试结果,为嵌入式软件的逻辑覆盖测试提供了一种便利、有效的方法。     

On the testability of array structures for FFT computation

This article presents new approaches for testing VLSI array architectures used in the computation of the complexN-point Fast Fourier Transform. Initially, an unrestricted single cell-level fault model is considered. The first proposed approach is based on a process whose complexity is independent (or C- as constant) of the number of cells in the FFT architecture. This is accomplished by showing a topological equivalence between the FFT array and a linear (one-dimensional) array. The process of fault location is also analyzed. The second proposed method is based on a testing process whose complexity is linear with respect to the number of stages (columns) of the FFT array. A component-level fault model is also proposed and analyzed. The implications of this model on the C-testability process are fully described.This research is supported by grants from NSF and NSERC.     

面向FPGA芯片开发的测试方法设计与实现

针对自主研发的SOI-CMOS工艺FPGA芯片VS1000,开发出一种FPGA测试工具(VVK)软件系统.VVK是借助Verilog HDL描述电路和UCF约束电路的特性开发并实现的全自动测试方法.其意义在于解决了设计FPGA芯片过程中面临的最冗繁棘手的验证和测试难题,可以实现FPGA全芯片、内部各种逻辑模块的功能结构的验证和测试.该工具可以用于FPGA流片前的行为级、晶体管级的仿真和验证、FPGA圆片测试、以及FPGA芯片抗辐照测试.验证和测试的结果证明了这套方法的正确性、高效性,同时这种测试方法也适用于其他架构FPGA的测试.     

Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy

A two-port memory contains two duplicated sets of address decoders, which operate independently. Testing such memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible tests for single-port and two-port memories, as well as the test strategy. In this paper the effects of interference and shorts between the address decoders of the two ports on the fault modeling are investigated. Fault models and their tests are introduced. In addition, the consequences of the port restrictions (read-only or write-only ports) on the fault models and tests are discussed, together with the test strategy.     

WCDMA室内信号覆盖系统及其可靠性分析

当前建设3G室内信号覆盖系统可选用多种信源方案和分布方式,针对这一现状,列举了一些室内覆盖方案,并对其系统可靠性进行了分析,指出过量采用没有蓄电池供电的RRU会影响系统的可靠性。     

基于CGAL多雷达传感器覆盖范围仿真计算及可视化分析

如何快速、实时地计算与绘制多雷达传感器覆盖范围是目前雷达仿真的重点和难点。为解决此问题,在分析国内外研究成果基础上引入CGAL开源库,提出了一种解决方法,并基于典型的三角网格求交算法和Delaunay三角剖分算法进行了仿真分析。仿真结果充分验证了所提解决方法的有效性、合理性与实用性。     

扫描测试和扫描链的构造

本文首先论述了扫描设计与测试向量自动生成（ATPG）这种测试方法的关键技术，并由此为依据，提出部分扫描设计中，扫描链构造的分层次的三个选取原则。     

新形势下广播电视无线传输覆盖发展探讨

随着媒体技术的快速发展以及媒体融合的持续深化,广播电视无线传输覆盖在广播电视行业发展中的重要性愈加显现。然而,针对新形势下广播电视媒体发展的实际要求,当前的无线传输覆盖技术仍然存在较大的提升空间,这就需要结合媒体发展的实际情况进行深度的挖掘和有效开展。在明确广播电视无线传输覆盖的特点及优势的基础上,就新形势下广播电视无线传输覆盖发展面临的挑战以及相应的科学应对策略进行现实性的分析论证,以探索无线传输覆盖发展的新思路、新路径。     

On a Class of Orthonormal Algorithms for Principal and Minor Subspace Tracking

This paper elaborates on a new class of orthonormal power-based algorithms for fast estimation and tracking of the principal or minor subspace of a vector sequence. The proposed algorithms are closely related to the natural power method that has the fastest convergence rate among many power-based methods such as the Oja method, the projection approximation subspace tracking (PAST) method, and the novel information criterion (NIC) method. A common feature of the proposed algorithms is the exact orthonormality of the weight matrix at each iteration. The orthonormality is implemented in a most efficient way. Besides the property of orthonormality, the new algorithms offer, as compared to other power based algorithms, a better numerical stability and a linear computational complexity.     

目标飞行特性与机载预警雷达探测威力关系研究

基于机载预警雷达的威力与空中目标飞行速度和飞行方向之间的关系,说明了目标回波信号落入雷达探测清洁区、副瓣杂波区和盲区的条件,并分析了机载预警雷达不同方位的探测威力。提出一种速度盲区的表示方法,可简单地计算出速度盲区的比例。     

信息高速公路中卫星无缝隙覆盖综合业务发展的技术问题与解决途径（下）

信息高速公路中卫星无缝隙覆盖综合业务发展的技术问题与解决途径（下）陈如明（邮电部电信总局北京１００８０４）４一些主要技术问题与可能的解决途径在明确了未来ＳＤＨ／ＡＴＭ卫星网络与地面网络无缝隙覆盖综合的基本网络结构考虑后，下面进一步讨论欲实施其相应互操...     

On the Effectiveness of the System Validation Based on the Black Box Testing Methodology

With the advancement of technology in recent years, effective fault diagnosis became a necessity to verify the performance and ensure the quality of complex systems. In this paper, an original verification methodology for complex consumer electronic devices is presented. Verification of the system which consists of hardware （integrated circuit） and corresponding software within a flat panel TV set is in the focus. Proposed methodology provides reliable functional failure detection using the concept of black box testing. Further, the approach is fully automated, improving the reliability and speed of failure detection. The methodology effectiveness has been experimentally evaluated and the analysis results have been reported.     

数字电视解调芯片的可测试性设计与优化

介绍了VLSI芯片的测试技术及故障模型,针对一款数字电视接收系统解调芯片,从设计中不同的阶段分析了集成电路的可测试性设计及其优化,解决了由于集成大量存储器引起的测试覆盖率低的问题,完成了该芯片满足时序要求的可测试性设计及优化过程,达到了流片要求.     

Hard-Fault Detection and Diagnosis During the Application of Model-Based Data Converter Testing

The concept of model-based test was developed in order to reduce the production test effort for data converters (Cherubal and Chatterjee (IEEE Trans Circuits Syst part I 50(3):317–327, 2003); Stenbakken and Souders (1985) Modelling and test point selection for data converter testing. In: ITC, Int Test Conf, pp 813–817; Wegener and Kennedy (IEEE Trans Circuits Syst I 51(1):213–217, 2004); Wrixon and Kennedy (IEEE Trans Instrum Meas IM-48(5):978–985, 1999)). In applying this concept, a vector of model parameters is determined for each device under test (DUT). Typically, this model parameter vector is merely used to calculate the DUT performance characteristic which is then subject to specification-oriented testing. However, each element of the model parameter vector represents an independent error source which contributes to performance degradations; thus, the model parameter vector can be viewed as a signature of the error sources. In this work, analyzing the error source signature is used to devise a model-based methodology for hard-fault detection and diagnosis. We investigate conditions under which hard-faults are detectable/diagnosable in spite of masking effects due to manufacturing process variations. In particular, we show that taking the model parameter vector as the fault signature is optimal as it minimizes the masking effects and thus maximizes detectability/diagnosibility.

关于图的极大独立集的理论及生成方法

本文研究了生成一个图的全部极大独立集所需的理论，提出了一个实用的生成方法。     

汽轮发电机组润滑油系统的故障诊断及分析

润滑油系统是汽轮发电机组中非常重要的辅助系统,该辅助系统的安全性直接关系到整个发电机组的工作效率和运行可靠性。润滑油系统在汽轮机中起到润滑、散热、减振的作用,因此,做好汽轮发电机组润滑油系统的故障诊断和分析工作至关重要。