An operational definition for breakdown of thin thermal oxides of silicon

As MOS devices with thinner gate oxides are put into production, the high-field oxide breakdown definition used for process monitoring must be revised to account for noncatastrophic electrical conduction. This conduction is due to electron injection by Fowler-Nordheim tunneling into the oxide conduction band, and it can be as large as 0.1 A/cm²without causing irreversible breakdown of thin oxides. We propose that breakdown should be defined as the passage of a large current at a low value of applied electric field, after stressing of the oxide at a high field. We show that this definition represents a truly irreversible catastrophic breakdown, that it can be adapted easily for automated testing, and that it yields reliable results for breakdown of thin (less than 500 Å) gate oxides.     

A characterization model for ramp-voltage-stressed I-V characteristics of thin thermal oxides grown on silicon substrate

A theoretical model considering the effects of Fowler-Nordheim tunneling, image-force lowering, first-order trapping kinetics and impact ionization has been developed to characterize the ramp-voltage stressed current-voltage characteristics of thin oxides grown on silicon substrate. Based on the developed model, physical parameters of thin oxides such as effective total trapping density, trap capture cross section, recombination capture cross section and dielectric breakdown field can be extracted from the measurements. In general, the dielectric field strength of the oxide can be enhanced by increasing the amount of traps, which is especially important when the effective total trapping density is above 10¹³ cm⁻². Besides, smaller leakage current across thin oxide can be obtained with larger effective total trapping density and trap capture cross section. The recombination capture cross section is found to be in the order of 10⁻¹⁵–10⁻¹⁴ cm² for thin SiO₂ ranging from 92 to 196 Å. The dielectric field strength is enhanced and the leakage current is reduced as the trapped electron centroid shifts toward the cathode electrode, however, this is less prominent when the effective total trapping density is ⩽10¹² cm⁻².     

Dielectric characterization of ferroelectric thin films deposited on silicon

This paper describes some experimental results concerning the dielectric characterizations of PZT, PT and BT ferroelectric thin films deposited on silicon. Firstly, the ferroelectric properties of these films are checked, notably the high dielectric constant values. Secondly, assuming a simple electrical model, we derive from impedance measurements the conductivity of the platinum deposited as a bottom electrode.     

Dielectric reliability in deep-submicron technologies: From thin to ultrathin oxides

This paper focuses on the dielectric reliability in the thin and ultrathin oxide regime. The wear-out mechanisms and the breakdown phenomena related to the Si/SiO₂ system are considered within the 12nm-5nm oxide thickness range. The degeneration evolution with respect to the oxide thickness and the consequences of the mechanisms involved in the various failure modes which limit the dielectric reliability are discussed.     

The effect of thin interfacial oxides on the electrical characteristics of silicon bipolar devices

The effect of thin interfacial oxides on the impurity diffusion from polysilicon to the silicon substrate has been studied in detail. Polysilicon films were deposited on the silicon substrate in two different process conditions to control the thickness of interfacial oxides. Results show that the presence of about 1-nm-thick oxides retarded the impurity diffusion by about 10 nm and an increase of the sheet resistance of about 10 percent has been observed. Bipolar devices, which are sensitive to the impurity profiles, were fabricated with identical processing apart from the polysilicon deposition conditions. A detailed analysis of their electrical characteristics shows the difference of collector current components and hence the increase of current gain by about two times. These results indicate that the effect of interfacial oxides on the impurity profile is expressed by the segregation coefficientm, which is the ratio of Csi/CpolySiat the interface. The sensitivity ofmfor the device characteristics was calculated by a process-device simulator, and it is demonstrated that the current gain is a strong function ofmfor shallow emitters.     

Rapid thermal oxidation of silicon for thin gate dielectric

Rapid thermal oxidation of silicon has been carried out in the temperature range 1000 to 1250°C for an oxidation time of 5 to 60 s. The new kinetics data show that oxidation is carried out by a two-energy activation process. Assuming linear growth during the first 5 s of fast oxidation, the first process occurs with an activation energy Ea of 0.9 eV. The second process takes place with Ea = 1.4 eV for linear growth kinetics from 5 to 60 s.     

Dielectric and transport properties of thin films precipitated from sols with silicon nanoparticles

Dielectric properties of thin films precipitated on solid substrates from colloidal solutions containing silicon nanoparticles (average diameter is 10 nm) are studied by optical ellipsometry and impedance-spectroscopy. In the optical region, the values of real ɛ′ and imaginary ɛ″ components of the complex permittivity ɛ vary within 2.1–1.1 and 0.25–0.75, respectively. These values are significantly lower than those of crystalline silicon. Using numerical simulation within the Bruggeman effective medium approximation, we show that the experimental ɛ′ and ɛ″ spectra can be explained with good accuracy, assuming that the silicon film is a porous medium consisting of silicon monoxide (SiO) and air voids at a void ratio of 0.5. Such behavior of films is mainly caused by the effect of outer shells of silicon nanoparticles interacting with atmospheric oxygen on their dielectric properties. In the frequency range of 10–10⁶ Hz, the experimentally measured ɛ′ and ɛ″ spectra of thin nanoscale silicon films are well approximated by the semi-empirical Cole-Cole dielectric dispersion law with the term related to free electric charges. The experimentally determined power-law frequency dependence of the ac conductivity means that the electrical transport in films is controlled by electric charge hopping through localized states in the unordered medium of outer shells of silicon nanoparticles composing films. It is found that the film conductivity at frequencies of ≤2 × 10² Hz is controlled by proton transport through Si-OH groups on the silicon nanoparticle surface.     

Effects of vacancy structural defects on the thermal conductivity of silicon thin films

Vacancy structural defect effects on the lattice thermal conductivity of silicon thin films have been investigated with non-equilibrium molecular dynamics simulation.The lattice thermal conductivities decrease with increasing vacancy concentration at all temperatures from 300 to 700 K.Vacancy defects decrease the sample thermal conductivity,and the temperature dependence of thermal conductivity becomes less significant as the temperature increases.The molecular dynamics result is in good agreement with the theoretical analysis values obtained based on the Boltzmann equation.In addition,theoretical analysis indicates that the reduction in the lattice thermal conductivity with vacancy defects can be explained by the enhanced point-defect scattering due to lattice strain.     

空位缺陷对Si薄膜热导率的影响

利用非平衡分子动力学方法研究了空位结构缺陷对Si薄膜热导率的影响。当温度在300K-700K之间变化时,热导率随着空位浓度的增加而降低,并且随着温度的升高空位浓度对热导率的影响以及同一空位浓度下温度对热导率的影响都在逐渐减弱。本文还利用Boltzmann输运理论对MD模拟进行验证,结果基本与其一致。同时理论方法还表明,空位缺陷对薄膜热导率的巨大影响归因于晶格应力的存在使点缺陷也发生散射作用的结果。     

Impact of light soaking and thermal annealing on amorphous silicon thin film performance

Nowadays, there is a wide debate in literature related to the silicon thin films seasonal performance. Amorphous modules seem to react positively to the temperature, while the temperature parameters indicate a negative thermal response. Periodic fluctuations of nominal power due to light soaking and thermal annealing effects are observed. On the other hand, the module temperature reached in some open rack plants seems too low to activate annealing power regeneration process so that the seasonal performance trend may depend mainly on other effects such as spectral or irradiance. In the following paper, a model that allows to calculate the impact of all the phenomena that affect the photovoltaic performance is used. The light soaking and thermal annealing contributions are measured from outdoor data using two different methods. Both methods lead to similar results, and the model is able to reproduce the seasonal performance with an acceptable level of reliability on the day, hour, minute time scale. An analysis of each effect contribution to the seasonal performance is also provided. Thus, main open questions related to a‐Si thin films performance such as positive reaction to temperature and seasonal fluctuations are discussed. Copyright © 2015 John Wiley & Sons, Ltd.     

Two-dimensional thermal oxidation of silicon. II. Modeling stresseffects in wet oxides

For pt.I see ibid., vol.ED-34, p.1008-17 (May 1987). The authors propose that the stress from two-dimensional oxide deformation affects the kinetic parameter in the Deal-Grove model (1965). In particular, the viscous stress associated with the nonuniform deformation of the oxide is identified as the fundamental force of retardation. In this model, the stress normal to the Si-SiO₂ interface reduces the surface reaction rate in both convex and concave surfaces, whereas the stress in the bulk of the oxide (compressive for concave and tensile for convex surfaces) is responsible for the thinner oxides on the concave structures. The model is described by a simplified mathematical formulation made possible by the symmetry in cylindrical structures. Comparisons with experimental data, possible applications, and limitations of the model are also discussed     

Rapid thermal processing of thin gate dielectrics. Oxidation of silicon

A new rapid process for the growth of thin thermal oxide films on crystalline silicon is described. This rapid thermal oxidation (RTO) is performed in a controlled oxygen ambient with the heating provided by tungsten-halogen lamps. The resulting oxides with thicknesses from 40-130 Å have a uniformity of better than 2 percent across the 75-mm wafers. Oxidation times at 1150°C vary from 5 to 30 s. Typical breakdown fields of 100-Å oxide films were 13.8 MV/cm and typical midgap interface state densities were of the order of 1 × 10¹⁰eV^-1cm^-2. The present RTO films have characteristics equal to or better than furnace grown oxides and because of the short temperature-time cycle they have potential applications for submicrometer VLSI.     

Chemical contamination of thin oxides and native silicon for use in modern device processing

The characterization of native oxide residuals and contaminants during the clean-up of silicon substrates prior to oxide growth is crucial for the development of accurate growth algorithms. Studies of contaminant concentrations based on Auger analysis are reported, showing carbon to be the critical contaminant. A critical etching time is established, for which carbon content and residual native oxide thickness are minimal. Variations in refractive index with etching period and native oxide thickness are also reported, showing an increase in refractive index with increase in native oxide thickness. These results should prove useful in improving the accuracy of ellipsometric techniques, and will aid in growth algorithm development.     

Electrical and physical characteristics of thin nitrided oxides prepared by rapid thermal nitridation

Ultrathin oxides (5-12 nm) were nitrided by lamp-heated rapid thermal annealing in ammonia at temperatures of 900-1150°C for 5-300 s. Elemental depth profiles were measured by Auger electron spectroscopy (AES) and secondary ion mass spectroscopy (SIMS). Both the nitrogen concentration measured by AES and the hydrogen one measured by SIMS for a nitrided oxide are found to increase monotonically as nitridation proceeds. The AES depth profiles of oxygen show that the Si-SiO2interface does not move during nitridation. Dependences of midgap interface state density (D_{it}_{m}) and fixed charge density (Nf) on nitridation temperature and on oxide thickness were studied. For a given temperature, bothD_{it}_{m}and (Nf) are found to show turnarounds as nitridation time increases in a similar manner: at first both increase, reach respective maxima at a certain nitridation timet_{max}, and then decrease gradually. The (D_{it}_{m}) and (Nf) increase more rapidly and thet_{max}is shorter as the nitridation temperature is raised or the oxide film is thinner. The maximum ofD_{it}_{m}increases as the oxide film is thinner. A two-step model is newly proposed to explain the turn-around behaviors ofD_{it}_{m}and Nf: the first step is defect formation as a result of nitrogen incorporation and the second step is reduction of the defects by an annealing-type process. The simulation reproduces the turnaround behaviors very well.     

Gate oxide thickness dependence of high-field-induced interface state generation in thin thermal oxides

The oxide thickness dependence of the high-field-induced interface state generation Delta D/sub it/ in the nanometre-range thin (6-10 nm) gate oxides prepared by rapid thermal oxidation have been studied. It is shown that Delta D/sub it/ is a strong function of the oxide thickness. The thickness dependence of Delta D/sub it/ is found to be a function of stress time. Physical mechanisms are discussed to account for the experimental results.<>     

Anomalous thermal oxidation of gadolinium thin films deposited on silicon by high pressure sputtering

Thin gadolinium metallic layers were deposited by high-pressure sputtering in pure Ar atmosphere. Subsequently, in situ thermal oxidation was performed at temperatures ranging from 150 to 750 °C. At an oxidation temperature of 500 °C the films show a transition from monoclinic structure to a mixture of monoclinic and cubic. Regrowth of interfacial SiO_x is observed as temperature is increased, up to 1.6 nm for 750 °C. This temperature yields the lowest interface trap density, 4 × 10¹⁰ eV⁻¹ cm⁻², but the effective permittivity of the resulting dielectric is only 7.4. The reason of this low value is found on the oxidation mechanism, which yields a surface with located bumps. These bumps increase the average thickness, thus reducing the capacitance and therefore the calculated permittivity.     

Reliable fluorinated thin gate oxides prepared by liquid phasedeposition following rapid thermal process

A reliable fluorinated thin gate oxide prepared by liquid phase deposition (LPD) following rapid thermal oxidation (RTO) in O₂ or nitridation (RTN) in N₂O ambient was reported. Fluorine (F) atoms incorporated into the oxides during LPD process are found to be helpful to the improvement of oxide quality. It is observed that these fluorinated gate oxides show good properties in radiation hardness, charge to breakdown (Q_bd), and oxide breakdown field (E_ox) endurances. Interestingly, the Q_bd 's for the fluorinated gate oxides are 10 times larger than those for the gate oxides prepared by RTO in O₂ or RTN in N₂ O directly. Some of the E_ox's are even higher than 17 MV/cm for the samples investigated in this work     

On the influence of the variation of measurement conditions on the FNT characteristics of stressed thin silicon oxides

We have investigated the influence of the Fowler–Nordheim-tunneling (FNT) measurement conditions on current voltage characteristics of stressed thin oxides. In the pre-tunneling voltage range we have studied the influence of stress condition, measurement time of the measurement equipment, sweep direction and voltage-step height of the voltage ramp. An influence of the transient and stationary stress induced leakage current on the FN current voltage characteristic could be observed, which can be explained by the trapping and detrapping of electrons using a simple energy band diagram.     

Deposition of high quality Sol-Gel oxides on silicon

We have fabricated high quality sol-gel derived silicate and aluminoborosilicate thin films deposited on silicon substrates. From capacitance vs voltage measurements we observe low interface trap densities (<10¹¹/cm²eV) and very low densities of slow interface state (<10¹⁰/cm²) in most films investigated. We have been able to make significant improvements over previous sol-gel derived oxides on silicon by controlling some of the key factors which effect the structure of the sol-gel derived thin films.