Impact of Inductor Placement on the Performance of Adjustable-Speed Drives Under Input Voltage Unbalance and Sag Conditions

Voltage unbalance or sag conditions generated by the line excitation can cause the input rectifier stage of an adjustable-speed drive (ASD) to enter a single-phase rectifier operation. This degradation of the input power quality can have a significant negative impact on the induction machine performance characteristics, but the presence of an$LC$filter in the drive's input rectifier stage can be used to attenuate these undesired effects. The purpose of this paper is to investigate the impact of the inductor placement in the ASD topology on the drive's performance under voltage unbalance or sag conditions. More specifically, the relative advantages of choosing either a dc-link choke inductor or three ac line inductors are discussed using a combination of closed-form analysis and simulations. The results of first-order sizing calculations show that a dc-link choke inductor may offer some volume and mass advantages over three separate ac line inductors for the same ASD performance under unbalanced voltage conditions. Experimental results using a 5-hp ASD confirm the key analytical performance predictions.     

DC-Bus Electrolytic Capacitor Stress in Adjustable-Speed Drives Under Input Voltage Unbalance and Sag Conditions

This paper analyzes the effects of the input voltage unbalance and sags on the dc-bus electrolytic capacitors in adjustable-speed drives (ASDs) in order to predict their impact on expected capacitor lifetime. The key phenomenon that causes these problems is the transition of the rectifier stage from three-phase to single-phase operation. Since the equivalent series resistance increases at low frequencies, the low-order harmonic current components (e.g., 120 and 240 Hz) contribute disproportionately to the capacitor power losses and temperature rise, resulting in reduced lifetime. Closed-form expressions are developed for predicting these effects including the impact of finite line impedance, finite bus capacitance, and varying load. The impact of inverter space-vector pulsewidth-modulation switching on the capacitor loss is also included. Simulations and experimental tests are used to verify the accuracy and effectiveness of the closed-form analysis using a 5-hp ASD system     

UPFC直流侧电容电压弱控制策略研究

在分析UPFC直流侧电容电压传统控制方式的基础上,提出了直流侧电容电压弱控制策略的概念,并分析了直流侧电容容量、直流侧电压等级和线路传输功率之间的关系.通过仿真实验,比较了单机无穷大系统线路发生三相对称短路时,线性最优控制和直流侧电容电压弱控制策略下系统的运行情况.结果表明该策略能够利用UPFC直流侧电容吸收部分暂态能量,从而加速故障后线路上潮流稳定过程.     

A non‐isolated high step‐up DC‐DC converter with integrated 3 winding coupled inductor and reduced switch voltage stress

In this paper, a non‐isolated high step‐up dc‐dc converter based on coupled inductor is proposed. The proposed converter can be used in renewable energy applications. In suggested converter, the high voltage is achieved using 3‐winding coupled inductor, which leads to low voltage rate of the switch. A clamp circuit is used to recycle the leakage inductance energy. Also, the clamp circuit prevents the creation of voltage spikes on semiconductor devices and causes the voltage stress of elements are limited to less than the output voltage. The presented theoretical analyses show that the operation of suggested converter in continuous conduction mode needs to small magnetic inductor. Therefore, the size of coupled inductor's core is reduced, and so the size and cost of presented converter will be decreased. Analysis of the proposed converter is provided with laboratory results to verify its performance.     

A new interleaved bidirectional dc/dc converter with zero voltage switching and high voltage gain: analyses,design and simulation

In this paper, a new interleaved non‐isolated bidirectional dc–dc converter with capability of zero voltage switching and high voltage gain is proposed. In the proposed converter by using two coupled inductors and one capacitor, the voltage gain is extended. Moreover, by using only an auxiliary circuit that includes an inductor and two capacitors, the zero voltage switching (ZVS) of two used switches in the first phase of converter can be achieved. The ZVS operation of two used switches in the second phase is always obtained without using any extra auxiliary circuit. This converter similar to other interleaved converters has low input current ripple and low current stress on switches. In this paper, the proposed converter is analyzed in all operating modes, and also the voltage gain, required conditions for ZVS operation of switches, voltage and current stresses of all switches, and the value of input current ripple in both boost and buck operations are obtained. Finally, the accuracy performance of the proposed converter is verified through simulation results in EMTDC/PSCAD software. Copyright © 2017 John Wiley & Sons, Ltd.     

电压暂降对光伏逆变器的影响分析

首先,分析了单相和三相光伏并网逆变器在电压暂降发生时刻的开关模态,对其电流变化规律进行了数学推导;再在理论分析的基础上,对逆变器在不同输出功率、跌落深度和跌落相位角等工况条件下进行了电压暂降实验。实验结果表明,电网电压暂降时由于并网电感两端电压的突变导致电感电流的骤升,电感电流的变化速率远超过逆变器的控制带宽。对于未设计低电压穿越功能的逆变器,电压暂降通常会触发逆变器保护动作封锁驱动导致停机。     

Using the DC-bus current to improve the power factor in low-cost electric drives

In this paper, a new approach is presented aimed at improving the power factor of pulsewidth-modulation inverters that equip low-power electric motor drives for household appliances. The key feature of the proposed approach consists of exploiting the dc-bus current as a suitable dither generator by means of a high-frequency transformer. Such a strategy is used to force the diode rectifier to draw current from the mains in those periods when, in conventional systems, the diodes are reverse biased, i.e., when the dc-bus capacitor voltage exceeds the ac input voltage. The proposed method allows for elimination of the power-factor controller (PFC) front end, traditionally used to comply with power quality requirements. In comparison with standard PFCs based on a dc/dc converter, the proposed approach represents a cheaper and more feasible solution, not using additional power devices and control circuits. Simulation and experimental results confirm the consistency of the proposed approach.     

A single‐phase buck‐boost PFC converter with output‐voltage,ripple‐reducing operation

This paper describes a new single‐phase buck‐boost power‐factor‐correction (PFC) converter with output‐voltage, ripple reducing operation. The converter consists of a conventional buck‐boost PFC converter and an additional switch to obtain a freewheeling mode of the dc inductor current, and is operated by two modulators. The first modulator controls the buck‐boost switch to obtain PFC. The other modulator controls the square value of the instantaneous dc inductor current to perform the output‐voltage‐ripple‐reducing operation. In the two modulations, the time integral value of the input and output currents in each modulation period are controlled directly and indirectly, respectively. Thus, modulation errors or undesirable distortions of the input current and output voltage ripple are eliminated even if the dc inductor current produces large ripple in a low‐frequency range. The theories and combination techniques for the two modulators, implementation, and experimental results are described. © 1998 Scripta Technica, Electr Eng Jpn, 126(2): 56–70, 1999     

Active power filter based on three-phase two-leg switch-clamped inverter

A novel three-phase two-leg switch-clamped inverter is presented to achieve multilevel pulse-width modulation (PWM) operation, harmonics elimination, reactive power compensation and dc-link voltage regulation. Four active switches with voltage stress of dc-link and two ac switches with voltage stress of half dc-link are used in the proposed inverter. In this paper, the proposed inverter is operated as a controllable current source to supply the necessary active power for the compensation of inverter losses, to suppress current harmonics, and to compensate the reactive power drawn from the non-linear loads. Therefore, the balanced and sinusoidal line currents are drawn from the ac source. Two control loops are used in the adopted control scheme to maintain the constant dc-link voltage (outer loop with low-bandwidth control) and to achieve the line current command tracking (inner 1oop with high-bandwidth control). The mathematical model of the proposed converter for the operation active power filter is derived and the control scheme is provided. Computer simulations and experimental results based on a laboratory scale-down prototype are presented to verify the effectiveness of the proposed control scheme.     

A detailed comparison of system topologies for dynamic voltage restorers

In this paper, four different system topologies for dynamic voltage restorers (DVRs) are analyzed and tested, with particular focus on the methods used to acquire the necessary energy during a voltage sag. Comparisons are made between two topologies that can be realized with a minimum amount of energy storage, with energy taken from the grid during the voltage sag, and two topologies that take energy from stored energy devices during the voltage sag. Experimental tests using a 10-kVA DVR show that the no-energy storage concept is feasible, but an improved performance can be achieved for certain voltage sags using stored energy topologies. The results of this comparison rank the no-storage topology with a passive shunt converter on the load side first, followed by the stored energy topology with a constant dc-link voltage.     

An approach to regulating the DC-link voltage of a voltage-source BTB system during power line faults

A voltage-source back-to-back system for the purpose of achieving power flow control and/or line-frequency change in transmission systems has the attractive features of reliable and continuous operation, even during power line faults. However, an overvoltage appearing across the dc link during the faults should be limited to as low a value as possible because it does affect the power device ratings. This paper proposes a dc-link voltage regulator for effectively suppressing the overvoltage during power line faults. This regulator is characterized by compensating for a time delay inherent in each current controller, and for a power flow imbalance occurring during power line faults. The validity of the proposed regulator is confirmed by theory and computer simulation.     

A voltage sag study in an industry with adjustable speed drives

This article presents voltage sag measurements and their analysis, which were performed in two industries for a period of 17 months. Voltage sags are caused by faults in the utility's transmission system, since both industries are fed by a 115 kV line, but from different circuits. Even faults in 230 or 400 kV lines are felt by the industries' entrance substation as voltage sags. These events cause interruptions in important continuous processes because the adjustable speed drives (ASDs) involved are sensitive to voltage variations. It is shown that, with the measurements made, ASDs are more sensitive to voltage sags than data processing equipment, according to the tolerance curve shown in C51. Also identified were ASDs that tripped more frequently with voltage sags. This allowed the selection of problem areas in both industrial plants, requiring a more detailed analysis in order to select some type of power line conditioning equipment     

Compensation of voltage disturbances in distribution systems using single-phase dynamic voltage restorer

In this paper, a new topology is proposed for a single-phase dynamic voltage restorer (DVR) using direct ac/ac converter. This topology does not require dc-link energy storage elements. The proposed topology has a simple structure and can compensate several types of voltage disturbances such as voltage sags, swells, harmonics and flickers. This topology will not face any problem in long time compensation due to the fact that it provides the required energy directly through grid. The proposed topology can be easily extended to n-phase systems such as three-phase based on the same principle of the operation. In n-phase systems, the voltage sags and swells can be properly compensated regardless of the balanced or unbalanced operation. A new control method is also proposed for direct ac/ac converter in the proposed topology. The simulation and experimental results verify the effectiveness of the proposed topology and its control method in voltage restoration.     

中压区域性动态电压恢复器的滤波器参数设计

动态电压补偿器(DVR)可治理配电网中的电压的跌落和不对称等动态电能质量问题,其输出滤波器的参数设计将影响电压跌落的补偿效果。本文对应用于中压配电网的级联H桥DVR的输出滤波器参数的设计进行了研究。通过对逆变器输出电压在电容两端和电感两端分配的情况进行分析,推导了滤波器电感和电容取值与电感两端和电容两端电压分配之间的关系,并结合低通滤波器谐振频率与DVR等效开关频率和系统工频的关系,计算得到电容和电感的取值。结合实例给出了具体的实现步骤,通过仿真计算验证了文中提出的滤波器参数设计方法的正确性和有效性。     

基于反馈神经网络的电压暂降特征量实时检测方法

动态电压恢复器(DVR)主要用于补偿电压暂降,而实现电压暂降特征量快速、准确地检测是电压暂降补偿的前提.本文提出了一种基于反馈型神经网络的电压暂降快速、实时检测方法,探讨了该方法的建模问题和仿真技术.该方法利用反馈神经网络实现了在误差最小条件下的电压暂降检测,检测精度高、响应速度快、实时性好,为实现快速、准确电压暂降检测提供了一种新方法.仿真结果证明了该方法的有效性和优良性能.     

Z源逆变器交流调速系统前馈控制策略研究

提出了一种适用于Z源逆变器交流调速系统(Adjustable Speed Drives System,简称ASDS)的前馈控制策略,用以抑制由二极管整流所带来的6倍于工频频率的纹波(简称6脉低频周期纹波)对系统的影响.由于Z源逆变器具有独特的升/降压功能,使得能通过调节直通占空比的大小得到恒定的逆变器输入直流链电压.首先,从定性和定量两个方面分析了6脉低频纹波对Z源逆变器ASDS的影响.根据前馈补偿之主动、超前补偿的特点,提出了适用于Z源逆变器ASDS的前馈补偿方法.根据全补偿理论设计了前馈补偿器.最后,通过仿真和实验验证了理论分析的正确性.     

单相功率因数校正变换器输入电流过零畸变的改善方法

输入电流在输入电压过零点附近会发生畸变是功率因数校正(PFC)变换器普遍存在的现象。当输入频率增大时，其畸变会变得非常严重。该文详细分析了PFC变换器的输入电流在输入电压过零附近产生畸变的原因,指出电感大小和电流环的相位差是影响高频输入下过零畸变严重的根本原因， Boost三电平变换器由于可以减小电感，提高等效开关频率，因此可以有效地减小过零畸变。仿真和实验结果证明了该变换器输入电流的各次谐波均有效地减小。该拓扑适合于高输入频率下的PFC应用场合，尤其对于即将采用360Hz-800Hz变频交流供电体制的航空电网。     

单相PFC变换器输入电流过零畸变的改善方法

输入电流在输入电压过零点附近会发生畸变是功率因数校正(PFC)变换器普遍存在的现象。当输入频率增大时,其畸变会变得非常严重。本文详细分析了PFC变换器的输入电流在输入电压过零附近产生畸变的原因,指出电感大小和电流环的相位差是影响高频输入下过零畸变严重的根本原因,Boost三电平变换器由于可以减小电感,提高等效开关频率,因此可以有效地减小过零畸变。仿真和实验结果证明了该变换器输入电流的各次谐波均有效地减小。该拓扑适合于高输入频率下的PFC应用场合,尤其对于即将采用360Hz-800Hz变频交流供电体制的航空电网。