Performance comparison of integrated fully-differential filterless class-D amplifiers with different feedback techniques

Two integrated stereo fully differential filterless class-D amplifiers are presented in this paper. The object is to develop a modulation of a class-D audio amplifier with high power efficiency in this paper. The traditional H-bridge class-D audio amplifier has a shortcoming of large signal distortion which is worse than realized. However, the proposed circuit improves the drawback and provides high power efficiency at the same time. The circuit implements a modified scheme of pulse-width modulation. In this paper, we presented two class-D amplifiers, compared their differences and explained why the efficiency and distortion performance can be modified. The increase in total harmonic distortion (THD) is due to non-linearity in the triangle wave. To overcome this problem, a negative feedback from the output of the switching power stage is adopted to reduce the THD. When a 0.7-V_PP and 1 kHz sine wave is used as an input signal, the minimum THD is 0.029 % and the maximum power efficiency is 83 %. The fully differential class-D audio amplifier is implemented with a TSMC 0.35-μm 2P4M CMOS process, and the chip area is 2.57 × 2.57 mm² (with PADs).     

用于数字D类放大器的双边PWM调制模块

文中介绍了一种双边PWM调制的数字D类放大器调制模块,使用伪自然采样法消除谐波失真。该伪采样算法是将牛顿-拉夫森迭代法和多项式逼近法相结合而形成的。近年来,虽有较多关于前沿PWM调制（LEPWM）和后沿PWM调制（TEPWM）的数字D类放大器的文献,但基于双边PWM（DEPWM）调制的数字 D类放大器方面的文献较少。因此本文利用现有的噪声整形技术,基于牛顿-拉夫森迭代法的伪采样算法等实现了一种用于数字D类放大器的双边PWM调制模块,并使用FPGA搭建了一个24位立体声数字音频D类放大器调制系统。经测试,该调制系统THD＋N@6 kHz性能达到-80.5 dB。     

高效D类音频功率放大器的设计

D类功率放大器适应便携设备高效节能的客观需求,从而在音频模拟集成领域具有优势,随着设计技术的不断进步,D类功率放大器的性能指标也逐渐接近AB类放大器。通过分析基于CMOS工艺的D类音频功率放大器构成、驱动实现、性噪比、失真度等方面的特性来简要描述此类电路的设计思路。同时具体讨论了D类音频放大器各模块的工作原理和设计要点,针对设计要求比较高的驱动部分、抗干扰和噪声抑制部分以及抗EMS的设计都做了较详细的分析和论述。     

An integrated 200-W class-D audio amplifier

An integrated stereo class-D audio power amplifier realized in a silicon-on-insulator (SOI)-based BCD technology is presented. The amplifier is capable of delivering 2/spl times/100 W in two 4-/spl Omega/ loads at a supply voltage of 60 V. A second-order feedback loop is used to suppress supply ripple and pulse-shape errors in the switching power stage. The limiting factor in the performance of any class-D amplifiers is the quality of the switching power stage. A high-speed low-current levelshifter and a robust deadtime control arrangement are proposed that enable the realization of a robust high-quality switching power stage. Some practical issues with respect to robustness and electromagnetic compatibility are discussed.     

A THD-reduction high-efficiency audio amplifier using inverter-based OTAs with filter-output feedback

This paper presents an integrated low-voltage THD-reduction high-efficiency class-D audio amplifier using inverter-based operational transconductance amplifiers (OTAs). We propose a negative feedback loop which can compensate for external perturbations and improving output precision. The compensator increases the audio-frequency loop gain, and leads to a better rejection of audio-frequency disturbances. The use of inverter-based OTA and comparator provides low-voltage operation and low-power dissipation. The audio amplifier operates with a 1.5 V supply voltage with maximum power efficiency of 90%. The proposed class-D amplifier was implemented using a TSMC 0.18-μm 1P6M CMOS process, and the active chip area is 1.87 mm².     

D类音频功放在移动电话中的应用研究

D类功放比传统的模拟功放效率高,体积小,功耗低,越来越多被用在移动电话中.文中介绍了基于脉宽调制技术的D类功率放大器EMT7026的原理和EMT7026在移动电话中的应用.通过在功放前端和后端加入滤波电路的方法降低了功放的POP噪声,实验结果显示功放输出功率为1.2W时失真度THD N小于1%,实现了移动电话的低功耗和高音质的设计思想.     

数字音频D类功放电源误差校正方法研究

为了实时校正供电电源噪声引起的数字音频D类功放输出误差,提出一种基于FPGA的电源误差校正方法。使用高精度ADC芯片将电源纹波信号转化为数字量后送入FPGA,校正模块根据电源纹波的大小对数字音频D类功放Sigma-Delta调制器输入值进行预校正处理,从而实现在功放输出端有效的抑制电源噪声。经过实际电路测试,该方法可以有效的抑制电源噪声对数字音频D类功放的影响,电源抑制比达到36.78 dB。     

A design methodology for high-order class-D audio amplifiers

This paper presents a design methodology for high-order class-D amplifiers, based on their similarity with sigma–delta ( $\Upsigma\Updelta$ ) modulators, for which established theory and toolboxes are available. The proposed methodology, which covers the entire design flow, from specifications to component sizing, is validated with three design examples, namely a second-order, a third-order, and a fourth-order class-D amplifier. Moreover, the third-order class-D amplifier has been integrated on silicon and characterized, further confirming the validity of the whole design flow. The achieved results demonstrate that high-order class-D amplifiers can achieve total-harmonic-distortion (THD) performance compatible with the specifications of high-end audio applications (THD  ≈ 90 dB), which would be unfeasible with conventional first-order class-D amplifiers.     

A high efficiency PWM CMOS class-D audio power amplifier

Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.     

D类功放在便携式设备中的应用

采用D类放大器可延长电池供电终端产品的工作时间,并产生更少的热量,因此高效率D类音频功率放大器正越来越多地被用在移动电话、智能电话、PDA及其他类似便携式应用中,以取代AB类放大器。简单陈述了D类功放的原理,并以TI公司的芯片TPA2012D2为例,着重介绍了该芯片在便携式媒体播放器(PMP)中的应用实例。该例在实际应用中得到较好的音频播放表现。     

基于Ternary调制技术的数字音频功放的后级设计

论述了数字音频功放中传统调制方式的不足点,重点阐述了一种基于Ternary调制技术的数字音频功放后级电路的设计,该电路实现从脉冲编码调制(PCM)信号到脉冲宽度调制(PWM)信号转换,并通过Active-HDL和HSPICE相结合的数模混合仿真方式,验证了提出的后级电路,不仅能够很好地实现数字音源到模拟信号的转换,而且能克服传统调制方式下的闲置功耗、噪声和死区效应等不足点。     

A power-efficient audio amplifier combining switching and lineartechniques

Integrated class-D audio amplifiers are very power efficient but require an external LC reconstruction filter, which prevents further integration. Also due to this filter, large feedback factors are hard to realize, so that the load influences the distortion and transfer characteristics. The 30 W amplifier presented in this paper consists of a switching part that contains a much simpler filter and a linear part that ensures a low distortion and flat frequency response. The switching part of the amplifier was integrated in a BCD process. Combined with a linear part and with a loudspeaker as load, it has a flat frequency response ±0.3 dB, a dissipation that is up to five times lower than a traditional class-AB audio amplifier, and a distortion of <0.02% over power and frequency range     

Integrated overcurrent protection system for class-D audio power amplifiers

A fully integrated overcurrent protection system is presented suitable for application in integrated class-D audio power amplifiers. Accurate overcurrent detection is used based on parallel measurement of the voltage drop across the DMOS power transistors. A logic circuit enables continuous current limiting during overload situations. Actual short circuits can be distinguished from load impedance minima using a simple short-circuit discrimination method.     

Intelligent magnetic-amplifier-controlled soft-switching method foramplifiers and inverters

This paper proposes a simple efficient soft-switching method for switching power converters, inverters and amplifiers. Soft switching of a DC/AC H-bridge power converter is realized by paralleling two auxiliary switches and a magnetic amplifier with the load. The auxiliary switches are turned on at a predetermined time before the commutation of the main switches. The magnetic amplifier then automatically determines the necessary amount of redirection current to ensure soft switching of all switches under any load conditions. This method requires no expensive sensors or complex control circuitry. It is ideal for class-D audio power amplifiers, where the load current is widely changing. Further applications include DC/DC power converters, motor drivers, uninterruptible power supplies (UPS), communication and space power applications, where high efficiency, low electromagnetic interference (EMI) and small size are crucial     

增益可控BTL D类音频功率放大器TPA3007D1及其应用

TI公司新推出的6．5W单声道桥接负载(BTL)D类音频功率放大器芯片TPA3007D1采用第三代调制技术，增益可通过两个输入端(GAIN0和GAIN1)设定。文中介绍了TPA3007D1的内部结构、引脚功能、新一代调制技术及应用电路。     

D类音频功率放大器的研究与实现

介绍了采用D类放大器来完成音频信号变换与放大的电路设计。D类放大器采用了改进的方案,即用FPGA作为逻辑控制器实现对PWM H全桥功率放大电路的控制。设计的D类放大器可对数字音源输出的音频信号进行直接放大,为数字音源和功率放大的整合提供了完整的解决方案。他具有比其他类型放大器更高的效率和更低的转换失真,正越来越多地应用在便携式器件中,因此设计课题具有很好的现实意义。     

Carrier Distortion in Hysteretic Self-Oscillating Class-D Audio Power Amplifiers: Analysis and Optimization

An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers-carrier distortion-is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic comparator input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1-0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the input of a hysteretic comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into 8 Omega or 80 W into 4Omega from a plusmn34 V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance.     

低失真正弦波逆变电源设计

D类功率放大器是一种相当成熟的宽频率功率低失真放大器件,直接用他构成当前大量使用的逆变电源核心电路,具有正弦波形失真低,电路结构简化,易于扩展设计等特点。使用现有技术成熟的成品器件有利于减少专用电源器件的开发和设计费用。通过对TDA7490的正弦逆变电源运用设计,尝试出一种利用D类开关音频器件设计低失真逆变电源的方法。     

Digital correction of PWM switching amplifiers

Pulsewidth modulated (PWM) signals for driving a switching audio amplifier can be synthesized in the digital domain with extremely high linearity and precision. However, nonidealities associated with the power stage degrade output performance. A method to digitally correct for these nonidealities, resulting in very low total harmonic distortion (THD) and high signal-to-noise ratio (SNR) performance, is presented. This method also provides excellent rejection of power supply noise which is otherwise absent in digital PWM amplifiers. To meet noise requirements for hi-fi audio, the feedback structure is a fourth-order structure which shapes the noise beyond the audio band. The method has been implemented on a bread board, and state-of-the-art performance was achieved. Total harmonic distortion of 85 dB and dynamic range of 100 dB was measured using Audio Precision test equipment.     

Implementation of THD-reduction stereo audio amplifier using compensators and sigma–delta modulators

This paper presents an integrated stereo audio amplifier that employs sigma?Cdelta (????) modulation techniques with compensators. Traditional closed-loop audio amplifiers adopt pulse-width modulation or ???? modulation techniques. The design method proposed in this study uses a negative feedback closed-loop system with compensator and ???? modulator. This combination of compensator and ???? modulator significantly reduces the noise and total harmonic distortion (THD) compared with a traditional closed-loop system. The proposed negative feedback loop can automatically compensate for external perturbations, improving the precision of the eventual output. The compensator increases the audio-frequency loop gain, and leads to better rejection of audio-frequency disturbances. At a sample rate of 10?MHz, the proposed audio amplifier achieves 0.04% THD and a signal to noise ratio of 87?dB with efficiency above 92%. The proposed audio amplifier was implemented in a TSMC 3.3?V 0.35???m 2P4M CMOS process.