模拟乘法器在信号处理中的应用

模拟乘法器不仅可以用来进行数学运算,而且还具有频率变换功能。在通信、电视及广播领域中,广泛用于调幅、检波、混频、鉴相等信号处理。MC1596是Motorola公司生产的通用型单片集成模拟乘法器,以MC1596为例,介绍了模拟乘法器的工作原理以及它在信号处理中的应用,并结合教学、科研中的经验和体会,对电路外部元件的参数选择及使用中的注意事项作了比较详细的说明。     

A Current-Mode based Field-Programmable Analog Array for Signal Processing Applications

This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs),¹ which avoids excessive number of programming elements in the signal path, thus enhancing the performance. The paper also introduces a novel FPAA architecture, devoid of the conventional switching and connection modules. The proposed FPAA is based on simple current mode sub-circuits. An uncompounded methodology has been employed for the programming of the Configurable Analog Cell (CAC). Current mode approach has enabled the operation of the FPAA presented here, over almost three decades of frequency range. We have demonstrated the feasibility of the FPAA by implementing some signal processing functions.     

Analog Integrated Circuits and Signal Processing

Analog Integrated Circuits and Signal Processing -     

Low-Voltage MOS Translinear Analog Signal Processing

Different design procedures to operate MOS translinear loops at low supply voltage are presented. They utilize innovative biasing strategies based on flipped voltage followers and floating batteries. An alternate topology based on coupled negative feedback loops is also introduced. Simulation and measurement results for various test chip prototypes validate the proposed techniques and allow comparison among them.     

Sequential Unfolding SVD for Tensors With Applications in Array Signal Processing

This paper contributes to the field of higher order $(N>2)$ tensor decompositions in signal processing. A novel PARATREE tensor model is introduced, accompanied with Sequential Unfolding SVD (SUSVD) algorithm. SUSVD, as the name indicates, applies a matrix singular value decomposition sequentially on the unfolded tensor reshaped from the right hand basis vectors of the SVD of the previous mode. The consequent PARATREE model is related to the well known family of PARAFAC tensor decomposition models. Both of them describe a tensor as a sum of rank-1 tensors, but PARATREE has several advantages over PARAFAC, when it is applied as a lower rank approximation technique. PARATREE is orthogonal (due to SUSVD), fast and reliable to compute, and the order (or rank) of the decomposition can be adaptively adjusted. The low rank PARATREE approximation can be applied for, e.g., reducing computational complexity in inverse problems, measurement noise suppression as well as data compression. The benefits of the proposed algorithm are illustrated through application examples in signal processing in comparison to PARAFAC and HOSVD.      

基于可编程模拟器件的信号发生器

介绍了TRAC完全可重配置模拟器件和及其开发应用软件，并以此为基础设计了信号发生器，给出了设计图纸和仿真结果，该信号发生器性能稳定，不需要调试。     

CCD视频信号处理电路应用分析

首先对ＣＣＤ输出信号特性进行简要描述,然后针对ＣＣＤ信号存在复位噪声,对相关双采样法进行细致分析。为了改善视频图像,需要对图像的对比度和亮度进行调节,提出了可编程增益控制和数字化偏置控制方法。另外,对暗电子平自动和Ａ／Ｄ模数转换也进行比较深入的研究。ＸＲＤ４４６０是ＣＣＤ视频处理专用集成芯片,它包含了上面所述的所有功能。本文已成功地将ＸＲＤ４４６０ＣＣＤ视频信号处理与用芯片应用于遥感ＣＣＤ相机中,     

An NMOS Microprocessor for Analog Signal Processing

A special purpose microprocessor for real time processing of analog signals is described. Design and implementation of architecture allowing a user programmable and erasable read only memory (EPROM), a 25 bit digital processor and a 9 bit analog acquisition system on the same substrate is discussed. The relationship between the device's resources and specific signal processing building blocks is discussed.     

图象处理系统等效信号发生器

介绍了一种基于FPGA的等效图象信号发生器的设计，它能够提供数幅图象数据，并且能工作在几种不同频率。图象数据进行了并串转换，能够以并行和串行两种方式与其他图象处理系统相接口。     

面向多功能模拟信号处理的开关电流型可重构模拟电路研究

现有的离散时间型可重构模拟电路采用开关电容技术,存在功能有限、带宽低、与数字CMOS工艺不兼容等问题.本文提出了一种基于电流模取样数据技术的可重构模拟电路,能够与数字CMOS工艺技术兼容.设计了细粒度开关电流型可重构模拟单元,设计了面向开关电流型CAB互连的可编程网络结构.在4×2规模的可重构模拟阵列上,重构实现了三个...     

Low-Power CMOS Analog Signal Processing Using Spatial Mapping

This paper presents a low-power analog circuit for signal processing on pulse coded signals using spatial mapping. By successively delaying a periodic pulse train, and correlating delayed copies of the input signal with the input signal itself, the frequency component(s) are mapped spatially to output signals. The single delay line structure is then extended to a parallel structure with redundancy. In this way, we improve the signal-to-noise ratio. The design has been simulated and fabricated, and both simulation measurement results are presented, indicating the feasibility of the proposed methods.     

电流模式模拟信号处理的进展与展望

本文介绍了电流模式方法的基本概念和电流模式信号处理集成电路的积木块,回顾了其研究的历史和新近的进展,讨论了电流模式信号处理的基本原理,指出了电流模式信号处理的前沿研究及发展趋势。     

并行多通道模拟信号发生器的设计与实现

介绍了多通道模拟信号发生器,利用FPGA并行工作的特点结合DDS直接数字频率合成技术,实现80路模拟信号并行输出,同时设计了转接扩展卡,最大可扩展至512路输出。采用AD9744高速D/A转换芯片,输出信号频率范围0～100 kHz,可输出正弦波、方波、直流量等波形,频率分辨力0.01 Hz,输出精度千分之一。     

A Function Generator for Neurophysiological Applications

A function generator is described that basically generates a trapezoidal waveform whose leading and trailing ramps and positive and negative plateaus can be varied in duration, independently, between 0.5 ms and 50 s. By appropriate interconnections between the constituent units of the generator, a total of 12 different waveforms are generated, including triangular, sinusoidal, square, rectangular, and sawtooth waveforms. The output may be either free running or externally triggered to produce an adjustable integral number of cycles.     

Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications

This work presents a technique for the generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. Two integrated demonstrators are presented to show the feasibility of the approach. The proposed generation technique is based on a modified analog filter that provides a sinusoidal output as the response to a DC input. It has the attributes of digital programming and control, low area overhead, and low design effort, which make this approach very suitable as test stimulus generator for built-in test applications. The demonstrators—a continuous-time generator and a discrete-time one—have been integrated in a standard 0.35 μm CMOS technology. Simulation results and experimental measurements in the lab are provided, and the obtained performance is compared to current state-of-the-art on-chip generation strategies.     

基于FPGA的三通道函数信号发生器

采用Actel公司的Fusion系列AFS600 混合信号,FPGA结合外部D/A设计了一种直接数字频率合成高精度三通道相位可调函数信号发生器。以单片机和键盘液晶屏实现人机接口,通过串行口将设置参数传输给FPGA,在FPGA内部实现各种信号的合成运算,最后通过高速D/A转换和信号调理获得输出,可实现正弦、三角、锯齿、PWM等信号输出,通道间相位可调。各种功能均进行了实验测定,达到了预期设计要求。     

智能函数信号发生器的设计

函数信号发生器是一种常用的信号源，它广泛地应用在电子技术实验、自动控制系统和其他科研领域.目前用集成电路组成的函数信号发生器，大都需手动进行波形切换，一般可靠性较差，准确度较低，难以满足科研和高精度实验的需要。对设计正弦波、方波和三角波三种波形进行了研究，利用VHDL语言进行源程序代码编写，在Quartus Ⅱ平台下进行编译并通过仿真工具ModelSim进行测试，最后用EPF10K10LC84—4芯片实现其功能。     

函数信号发生器的设计与仿真

针对经济欠发达的西部地区学校经费不足的特点,利用集成运算放大器LM301,设计出能产生正弦、三角、方波、梯形、锯齿波和尖顶波等多种波形的函数信号发生器,且通过仿真很好地得到了各种波形。该函数信号发生器能满足一般的实验及演示的需要,并且成本很低,操作简洁方便,具有一定的参考价值。     

Constant Envelope Signal Generator with Improved Phase Linearity

In a recent paper entitled "Generation of constant envelope signals," Dickerson and Warren introduced a technique for the generation of a constant envelope signal which does not require hard limiting. The nonlinear distortion of the resultant phase modulator is, however, quite high. In this correspondence, we suggest two simple but effective modifications to improve the phase linearity of the modulator.