Vertical FET's in GaAs

Vertical FET's in GaAlAs material systems have been fabricated. The present structure makes possible extremely short (less than 1000-Å) channel devices which are beyond the reach of optical lithographic processes. Devices with transconductance gmas high as 280 mS/mm have been obtained.     

Amorphous-Silicon gate GaAs FET's

Silicon-germanium-boron ternary amorphous alloy has been applied to GaAs FET as a gate contact material. A good Schottky contact with a barrier height as large as 0.94 V has been realized. Schottky-barrier gate GaAs FET's fabricated using the amorphous film as a gate contact layer exhibit excellent normally off FET characteristics of a large saturated drain curent, which has never been attained by conventional GaAs MESFET's.     

Shielding of backgating effects in GaAs integrated circuits

Shielding of backgating effects in GaAs IC's by using Schottky metal, ohmic metal, and n⁺-implant has been studied. Contrary to what is expected from the electrostatic principle, positive bias to the shielding bars enhances backgating. Negative bias to the Schottky shielding bars increases the threshold for backgating, effectively reducing the backgating effect. These phenomena are explained in terms of carrier injection controlled by the surface potential. The results indicate that backgating effects can be reduced through proper circuit layout.     

Analysis of kink-related backgating effect in GaAs MESFET

Two-dimensional simulation of backgating effect in a GaAs MESFET is made in which impact ionization of carriers and deep donors “EL2” in the substrate are considered. The kink-related backgating is reproduced, which is qualitatively consistent with recent experiments. Based on the simulated results, physical mechanism of kink-related backgating effect is discussed     

Carrier injection and backgating effect in GaAs MESFET's

The relation between the backgating effects on GaAs MESFET's and current conduction in the semi-insulating substrate is studied. The onset voltage of the backgating effect is found to coincide with the trap-fill-limited voltage for the substrate conduction. This observation implies that carrier injection in the substrate is directly related to the backgating effect.     

An experimental study of backgating effects in GaAs MESFETs

This paper presents the results of a series of experiments concerning the backgating effect in GaAs MESFETs, and high-field current behavior of backgate diode structures. The devices tested were selectively ion-implanted and mesa-etched structures fabricated on semi-insulating (SI) undoped and Cr-doped LEC substrates. These experiments were performed to separate the effects of the substrate bias and the backgate bias and to identify the carrier emission processes using bias variations and optical excitations. The main objective was to determine the effects of surface condition by comparing the behaviors of devices with untreated and nitride-a and Al-deposited SI surfaces. A model for the backgating effect is proposed that involves trapping of electrons near the surface in the backgate structure, and space charge build-up beneath the MESFET channel region by deep-level trapping and free-carrier distribution. The temperature dependence of the backgating high-field current suggests that surface trapping by shallow levels is often significant and this causes the backgating threshold voltage to increase rather rapidly, as the temperature is lowered.     

Reduction of backgating in GaAs SISFET's with a low-temperaturebuffer

The use of a low-temperature molecular beam epitaxy (MBE)-grown buffer layer to reduce backgating in GaAs/AlGaAs semiconductor-insulator-semiconductor FETs (SISFETs) is discussed. Comparison with a control wafer having no low-temperature buffer (LTB) reveals an improvement in backgating threshold voltage by a factor of 3, improvement in output conductance and short-channel characteristics, and no significant change in threshold voltage, threshold-voltage spread, and microwave characteristics. The FETs with LTB exhibited increased sensitivity, at 80 K, to trapping of hot electrons     

Long-term transient radiation-resistant GaAs FET's

The amplitude of long term, pulse-radiation-induced transients in ion implanted GaAs FET's has been reduced by up to two orders of magnitude by the addition of a deep buried p-layer beneath the active n-layer. The p-layer was formed by ion implantation of Be to depth of 0.8 µm below the Si implanted n-active channel. Backgating was also greatly reduced as indicated by a much smaller amplitude transient response following application of a positive gate pulse and by the absence of light sensitivity and looping in the current/ voltage (I-V) characteristics.     

Low field mobility in GaAs ion-implanted FET's

We describe a new technique which allows one to deduce the mobility profiles under the gate of an ion-implanted GaAs MESFET. The technique is based on the measurements of the transconductance and the series resistance at very low drain-to-source voltages. The experimental results show that the mobility drops to about 1000 cm²/V . s at the channel interface from its maximum value of about 2500 cm²/ V . s.     

Noise temperature in GaAs epi-layer for FET's

The noise temperature field-dependent relationship was experimentally investigated in thin GaAs epi-layer. It was found that the commonly used relationship is inaccurate for most of the devices. A new relationship of extended, validity was derived in the lattice temperature 90-370 K.     

Inclusion of impact ionization in the backgating of GaAs FETs

It is shown that the familiar threshold behavior of the backgate current of GaAs MESFETs has hysteresis. This is associated with an S-type negative differential conductivity (S-NDC) of the semi-insulating substrate. It is difficult to account for this hysteresis using conventional trap-fill-limited (TFL) theory, and it is attributed to the impact ionization of traps in the substrate. A simple model of this ionization, involving two trap levels, is used to incorporate its effect into an existing analytical model of GaAs FETs. The result is a qualitative interpretation of the backgating characteristics of GaAs MESFETs. The calculations show that a simple combination of two ohmic elements to represent parasitic resistances, and a nonohmic one to represent impact ionization in the substrate, can imitate the observed backgating behavior     

Mechanisms for low-frequency oscillations in GaAs FET's

Low-frequency oscillations in GaAs MESFET's were observed under back-gating conditions. The FET oscillations are directly related to oscillations in leakage currents in the semi-insulating GaAs substrate. The occurrence of these oscillations in the substrate is strongly dependent upon GaAs material. It is proposed that oscillating substrate leakage currents modulate the FET current in two ways; first, by modulating the active channel-substrate junction and second, by inducing periodic voltage fluctuations on the gate via gate pad contacts on the semi-insulating substrate. The latter mechanism is dominant and dependent upon gate bias and gate impedance.     

Millimeter-wave GaAs FET's prepared by MBE

GaAs MESFET's suitable for operation in the millimeter-wave frequency range have been developed. These devices feature electron-beam-defined sub-half-micrometer gates with MBE grown materials. With an active-layer doping of 6 × 10¹⁷/cm³, an extrinsic transconductance of 330 mS/mm was obtained. A 75-µm gate-width device has achieved a gain of 13, 9.5, and 6.5 dB at 35, 44, and 60 GHz, respectively.     

Photoelectrochemical plating of via GaAs FET's

A new photoelectrochemical (PEC) technique for filling via holes in GaAs FET's with a solid deposit of metal, such as gold, has been developed. Photogenerated electrons reduce solvated Au(CN)2-, directly on the FET source pads, allowing narrow straight-walled plasma-etched via holes to be filled without forming voids. The photogenerated holes cause the decomposition of a small amount of the semi-insulating (SI) substrate. With illumination from a 1200-W tungsten-halogen lamp, plating rates of 0.8 µm/min over a 2-in-diam wafer are achieved. The plating rate is insensitive to Au(CN)2- concentration in the range 0.01 to 0.15 M. The resulting GaAs FET's show improved mechanical stability and thermal resistance.     

Temperature dependence of backgating effect in GaAs integrated circuits

The backgating effect in GaAs IC's has been found to be temperature dependent. The threshold voltage for backgating increases with temperature, resulting in lower backgating at higher temperatures. The measured activation energy of the backgating threshold versus temperature is 83 meV, in agreement with the energy difference between the Fermi level and the EL2 level at the surface of semi-insulating GaAs.     

Quarter micron low noise GaAs FET's

New quarter-micron gate GaAs MESFET's fabricated with optical lithography have yielded the best noise figures ever reported for FET's at frequencies between 12 and 32 GHz.     

Analytical models of ion-implanted GaAs FET's

This paper describes analytical models for the calculation of the current-voltage characteristics of ion-implanted GaAs FET's. The models, which take into account backgating, capping, the source and drain series resistances, and the output conductance, provide simple analytical expressions for the current-voltage characteristics and are quite suitable for the parameter acquisition and computer-aided design of GaAs FET's and IC's. In particular, the effective implanted charge and, hence, the activation efficiency may be deduced from the measured pinchoff voltage. The theory may be also used for optimization of doping profiles of GaAs FET's. The results of the calculation are in good agreement with experimental data.     

Reduction of backgating effect in MBE-Grown GaAs/AlGaAs HEMT's

We have investigated the backgating effect in high electron mobility transistors (HEMT's) fabricated on MBE-grown GaAs/AlGaAs layers, which is undesirable for LSI fabrication. Comparing five different types of devices, we related the backgating effect to the interface between the GaAs substrate and the undoped GaAs buffer layer. By using a thermally etched GaAs substrate, we successfully reduced the backgating to the same order as that of ion-implanted GaAs MESFET's.     

The reduction of backgating in GaAs MESFETs by impact ionization

The reduction of drain current due to reverse substrate bias in GaAs MESFETs fabricated on EL2-compensated substrates is recovered with the application of sufficient drain bias. The recovery is shown to be due to the compensation of the negative space charge at the channel-substrate interface by holes generated by impact ionization in the MESFET channel. Illumination raises the value of drain bias needed for current recovery due to the requirement of additional hole flux to offset the effects of optically generated electrons on EL2 occupancy. Simulation results show that the channel current becomes independent of substrate bias when the bias value is sufficient to completely delete the p-type surface layer