Growth-parameter dependence of deep levels in molecular-beam-epitaxial GaAs

Deep levels in GaAs grown by molecular-beam epitaxy have been examined. Dependence of both electron and hole trap densities on growth parameters such as growth temperature have been obtained.     

Effects of ion implantation on deep levels in GaAs

We have studied the effects of ion implantation in GaAs using the techniques of deep-level transient spectroscopy. Samples included an unimplanted epitaxial buffer layer, a sample implanted directly into that buffer layer and then capped with Si3N4, a sample implanted into that buffer layer through a similar cap, and a sample implanted directly into a semi-insulating substrate and then capped. All implants were with Si29 and both types of implant were annealed at 860°C for fifteen minutes. We find that the total density of deep levels is not changed significantly by direct implantation, capping and annealing but that implantation through a cap greatly in creases the total deep-level concentration. Deep levels found in implanted layers after capping and annealing are primarily characteristic of the substrate or buffer layer into which the implantation is made, unless the implant is through a cap in which case contaminants from the capping process may be evident at high densities.     

Low-frequency emissions from deep levels in GaAs MESFETs

Low-frequency natural oscillations have been observed in ion-implanted GaAs test MESFETs based on undoped LEC grown semi-insulating substrates that originate from deep levels.     

Photocapacitance of deep levels in GaAs:Cr and GaAs:O

Photocapacitance measurements have been applied to characterize deep impurities present in bulk-grown single crystals of n-type GaAs:O and GaAs:Cr. Three principal defects in GaAs:O have levels located at (E_c ? 0.79 eV), (E_v + 0.40 eV) and (E_c ? 0.46 eV); the first of these corresponds to the level commonly associa with oxygen and agrees well with the Lucovsky model for photoionization spectrum. The Cr level in GaAs:Cr does not follow the Lucovsky model and appears to undergo “lattice relaxation” during optical transitions.     

Damage related deep electron levels in ion implanted GaAs

A study has been made of the deep electron levels in semi-insulating GaAs implanted with either ⁷⁸Se⁺ or ²⁹Si⁺ ions and rendered n-type by subsequent annealing without encapsulation in partial pressures of arsenic or arsine. Three implantation related deep states were detected with concentration profiles approximating to the type of Gaussian distributions expected for point defects related to ion implantation damage. Further heat treatment of the samples at 500°C in a gas ambient of N₂/H₂ substantially reduced concentrations of these deep levels. Two of these states were thought to be related to displacements of the substrate atoms. The third, at E_c − 0.67 eV, was found in only ⁷⁸Se⁺ ion implanted GaAs substrates and was thought to be a defect involving both Se and As atoms, rather than intrinsic lattice disorder. It is proposed that the annealing rate of these implantation related deep levels depends crucially on the in-diffusion or creation of arsenic vacancies during heat treatments.     

The impact of deep levels on the photocurrent transients in semi-insulating GaAs

The photocurrent transients, I_PC(t), were studied in semi-insulating (SI) GaAs during a low-temperature (low-T) illumination. Unusual transients were explained by the model, relating I_PC(t) to the deep levels/traps and their occurpancy. Such traps were actually detected and characterized by the independent measurements of the thermally stimulated currents (TSCs). The processes of the generation, recombination, and capture were described by a set of coupled differential equations and solved numerically. The I_PC(t), calculated without any free parameter, well reproduced (through eight orders of magnitude) the experimental transients over a wide range of the photon energies and intensities. The best-fit parameters agreed well with those determined from the TSC measurements.     

Characterization of deep levels in modulation-doped AlGaAs/GaAs FET's

Deep levels in modulation-doped field-effect transistors (MODFET's) fabricated from MBE-grown AlGaAs/GaAs heterostructures, have been characterized by a modified deep-level transient spectroscopy (DLTS) technique. Assuming donor-like traps in the AlGaAs layer, it is shown that the threshold voltage Vtvaries exponentially with time under pulsed-biased conditions. This result is verified experimentally by observing the transient in the drain current IDin long-gate FET's biased in saturation. The resulting Δ √{I_{D}} DLTS spectrum reveals an electron trap with an activation energy of 0.472 eV in Si-doped Al0.3Ga0.7As.     

A study of deep levels in GaAs by capacitance spectroscopy

We show how the DLTS capacitance spectroscopy technique can be used to detect small amounts of deep level impurities in GaAs p-n junctions. The DLTS spectra associated with Cu, Fe, Cr, 0, and two unidentified but commonly occurring deep levels in GaAs are shown. The LPE distribution coefficients are obtained for Cu, Fe, and Cr. The carrier capture cross sections for six levels are measured and give evidence for capture by multiphonon emission.     

Interface properties and deep levels in InGaAsN/GaAs and GaAsN/GaAs heterojunctions

Interface properties of dilute slightly lattice mismatched GaAsN/GaAs (0.35 at.% N) and closely lattice matched InGaAsN (1 at.% In, 0.35 at.% N) heterojunctions (HJs) were studied by means of capacitance–voltage profiling, deep levels transient spectroscopy (DLTS) and current–voltage measurements. It is found that the lattice matched HJs show no electrical breakdown when the space charge region crosses the interface. The carrier concentration profiles in such HJ show, as expected, the accumulation region on the low-bandgap side and the depletion region on the high-bandgap side of the HJ. This is not the case for the GaAsN/GaAs (GaAsN layer on top) and the GaAs/GaAsN (GaAs layer on top) HJ. The density of deep traps in GaAsN, InGaAsN films and in GaAs films grown on GaAsN underlayers was very much higher than in epitaxial GaAs films. The dominant deep centers were the EL6 and the EL3 electron traps. The interface regions of the GaAs/GaAsN and the InGaAsN/GaAs HJs were shown to be enriched by EL3 traps, while for the GaAsN/GaAs HJ those regions were enriched by EL6 traps which was associated with the former films being Ga-rich and thus facilitating incorporation of oxygen on As sites.     

Influence of deep states on CdTe and GaAs metal interface formation

Luminescence and soft x-ray photoemission measurements of clean metal interfaces with (110) surfaces of CdTe from several sources as well as (100) MBE vs (110) LEC GaAs reveal that the quality of the semiconductor can have a major effect on the interface Fermi level stabilization. Crystals with low optical emission from bulk deep levels show reduced state formation at their metal interfaces and improved adherence to the work function model of barrier height. Furthermore, atomic-scale interface chemistry can inhibit the formation of deep traps due to interdiffusion, thereby improving control over barrier formation.     

Electrical properties and deep levels in bulk solution grown GaAs crystal

Electrical and photoelectrical properties, deep levels spectra and microcathodoluminescence spectra were measured for bulk high-resistivity GaAs samples grown from Ga-rich solution by a synthesis solute diffusion technique. It is shown that the main portion of the grown crystal is high-resistivity p-type with electrical properties determined by deep hole traps with the level near 0.43 eV from the valence band edge. The density of these 0.43 eV hole traps was shown to decrease with increasing distance from the crystallization front and the traps were associated with the deep hole traps observed earlier in Ga-rich liquid-phase-epitaxy-grown films. The single crystalline end portion of the crystal was semi-insulating n-type with a very low (some 10¹⁴ cm⁻³) concentration of midgap EL2 donors. This end portion of the crystal was characterized by a very high photosensitivity. Possible advantages of the use of such material in radiation detectors are briefly discussed.     

Effects of GaAs buffer layer and lattice-matching on deep levels in Zn(S)Se/GaAs heterostructures

The effects of GaAs buffer layer and lattice-matching on the nature of deep levels involved in Zn(S)Se/GaAs heterostructures are investigated by means of deeplevel transient spectroscopy (DLTS). The heterojunction diodes (HDs) where nZn(S)Se is grown on p⁺-GaAs by metalorganic vapor phase epitaxy are used as a test structure. The DLTS measurement reveals that when ZnSe is directly grown on a GaAs substrate, there exist five electron traps A-E at activation energies of 0.20, 0.23, 0.25, 0.37, and 0.53 eV, respectively. Either GaAs buffer layer and lattice-matching may reduce the incorporation of traps C, D, and E, implying that these traps are ascribed to surface treatment of GaAs substrate and to lattice relaxation. Concentration of trap B, which is the most dominant level, is proportional to the donor concentration. However, in the ZnSSe/GaAs sub. HD, another trap level, instead of trap B, locates at the almost same position as that of trap B, and it shows anomalous behavior that the DLTS peak amplitude changes drastically as changing the rate windows. This is explained by the defect generation through the interaction between sulfide and a GaAs substrate surface. For the trap A, the concentration is a function of donor concentration and lattice mismatch, and the origin is attributed to a complex of donor induced defects and dislocations.     

Influence of MBE growth temperature on GaAs/AlAs resonant tunneling structures

Double barrier GaAs/AlAs tunneling structures with typical 2.5:1 room temperature peak-to-valley current ratios are examined using Deep Level Transient Spectroscopy. Deep level trap concentrations are found to be much higher in samples grown at 550° C compared to those grown at 650° C. For devices grown at 550° C, an impedance switch-ing effect due to a high concentration of deep levels is observed. The peak-to-valley ratio of the tunneling devices is largely unaffected by the growth temperatures in this range, indicating that higher growth temperatures can be employed to grow resonant tunnel-ing diodes than previously suggested in the literature.     

Influence of Ga vs As prelayers on GaAs/Ge growth morphology

The surface morphology of GaAs films grown on Ge substrates is studied by scanning force microscopy. We find a dramatic difference arising from Ga as opposed to As prelayers in the formation of anti-phase boundaries (APBs), surface features near threading dislocations, and surface roughness, for films as thick as 1 μm. Ga prelayer samples are smooth; thin films display some APBs with predominantly one growth domain while the 1 μm thick film displays the morphology of a homoepitaxial GaAs film. In contrast, As prelayer samples are rough with complicated APB structures, which can be attributed to the increase in single steps during As₂ deposition.     

Investigation of deep levels in semi-insulating GaAs by means of a thermally activated piezoelectric photoacoustic measurements

The temperature variation of the piezoelectric photoacoustic (PPA) signal intensity of semi-insulating (SI) GaAs from 20 to 150 K was measured. Four peaks at 50, 70, 110 and 125 K were observed in the PPA signal. From the theoretical analysis based on the rate equations of electrons in the conduction band and several deep levels, we concluded that the observed four peaks were due to the nonradiative electron recombinations via EL6, EL7, EL15 and an unknown deep level, respectively. Deep levels with extremely low concentrations (10¹¹–10¹⁵ cm⁻³) were clearly identified conveniently in SI–GaAs by using the PPA method for the first time.     

Influence of growth conditions on the V-defects in InGaN/GaN MQWs

The influence of the growth temperature,TMIn/TEGa andⅤ/Ⅲratio on the V-defects of InGaN/GaN multi-quantum wells（MQWs） has been investigated and discussed.When the TMIn flow increases from 180 to 200 sccm,the density of V-defects increases from 2.72×10¹⁸ to 5.24×10¹⁸ cm^-2,and the V-defect width and depth increase too.The density also increases with the growth temperature.The densities are 2.05×10⁸,2.72×10¹⁸ and 4.23×10⁸ cm^-2,corresponding to a growth temperature of 748,753 and 758℃respectively.When the NH₃ flows are 5000,6600 and 8000 sccm,the densities of the V-defects of these samples are 6.34×10¹⁸,2.72×10¹⁸ and 4.13×10¹⁸ cm^-2,respectively.A properⅤ/Ⅲratio is needed to achieve step flow growth mode.We get the best quality of InGaN/GaN MQWs at a growth temperature of 753℃TMIn flow at 180 sccm,NH₃ flow at 6600 sccm,a flatter surface and less V-defects density.The depths of these V-defects are from 10 to 30 nm,and the widths are from 100 to 200 nm.In order to suppress the influence of V-defects on reverse current and electro-static discharge of LEDs,it is essential to grow thicker p-GaN to fill the V-defects.     

生长条件对InGaN/GaN多量子阱表面v型缺陷的影响

我们研究了生长温度、TMIn/TEGa和Ⅴ/Ⅲ比对 InGaN/GaN多量子阱表面v型缺陷的影响。当TMIn的流量从180sccm增加到200sccm,v型缺陷的密度也从2.7210¹⁸/cm² 增加到了5.2410¹⁸ /cm², v型缺陷的深度和宽度也随着TMIn流量的增加而增加。当生长温度从748℃增加到758℃, v型缺陷的密度分别是2.0510⁸/cm², 2.7210⁸/cm² 和 4.2310⁸/cm²,V型缺陷的密度随着生长温度的增加而增加。当NH3的流量从5000sccm增加到8000sccm, v型缺陷的密度分别为 6.3410¹⁸/cm², 2.7210¹⁸/cm², 4.1310¹⁸/cm²。我们在753℃, TMIn 流量为180sccm, NH3 流量为6600sccm时,得到了晶体质量最好的InGaN/GaN 多量子阱,表面平整,v型缺陷的密度也比较少。V型缺陷的深度从10nm到30nm,宽度从100nm到200nm,为了抑制v型缺陷对GaN基LEDs反向电流(IR)和静电放电 (ESD) 的影响,我们需要生长更厚的p-GaN来填充这些v型缺陷。     

Sulfide passivating coatings on GaAs(100) surface under conditions of MBE growth of 〈II–VI〉/GaAs

Atomic-force microscopy was applied to compare the topographies of naturally oxidized surfaces of GaAs(100) substrates and those substrates treated with aqueous solutions of sodium sulfide in various stages of their preparation for growth of ZnSe-based heterostructures by molecular beam epitaxy (MBE). It was found that annealing of oxidized substrates strongly disrupts the surface planarity and leads to the appearance of pits with density of 10¹⁰ cm^?2. The pit density can be reduced by two orders of magnitude by treating the substrate surface with an aqueous solution of Na₂S. Transmission electron microscopy demonstrated that sulfidation of GaAs substrates makes it possible to reduce the number of stacking faults at the ZnSe/GaAs interface to ～3×10⁵ cm^?2 and, correspondingly, to improve the structural perfection of MBE-grown II–VI layers and heterostructures.     

The nature of the deep levels responsible for photoelectric memory in GaAs/AlGaAs multilayer quantum-well structures

The electron capture parameters and photoionization cross section of the unintentional deep levels, which are responsible for photoelectrical memory in GaAs/AlGaAs multilayer quantum-well structures, have been found from an analysis of the kinetics of the excess current during and after optical illumination of these structures. The dependence of the photoionization cross section on the photon energy, the capture cross section, and the energy barrier for capture of an electron from the bottom of the conduction band indicate that the unintentional deep levels are DX centers formed by the silicon impurity. These DX centers probably appear during growth of the structures as a result of silicon diffusion from the quantum wells along as-grown defects. Fiz. Tekh. Poluprovodn. 32, 1213–1218 (October 1998)