GPS接收机镜像信号抑制

分析了GPS接收机镜像信号抑制的要求,设计应用于低中频GPS接收机的镜像抑制复数滤波器.滤波器基于OTA-C双二次结构,通过线性变换实现频率搬移.采用了带源极负反馈的全差分跨导器以扩大输入线性范围.设计了基于环形振荡器的数字调谐锁相环以减小滤波器频率偏差.电路采用0.18μm CMOS工艺实现.测试结果表明,滤波器带宽为3.1MHz,偏移5MHz抑制为50dB,频率修调误差小于±1.5%.镜像抑制大于35dB.1.8V电源电压下滤波器和修正电路电流分别为0.82mA和0.23mA.     

基于OTA的有源Gm-C复数带通滤波器的设计

设计了一种基于OTA的有源Gm-C复数带通滤波器,用以实现射频前端芯片中的中频滤波和镜像抑制功能,该滤波器采用Gyrator结构,将低通原型滤波器中的集总电感用有源电感进行替换,并依据复数变换理论,对浮地电容和接地电容进行复数变换,实现带通滤波器.滤波器中心频率为4.1 MHz,1 dB带宽2 MHz,带内增益13.27 dB,1.5倍带宽处抑制在40 dB以上,镜像抑制度40 dB.Gm-C滤波器集成度高,功耗低,适合于高频应用,是当前集成中频滤波器的热点.     

双模式复数滤波器电路设计

采用0.18μm CMOS工艺,实现了一款中心频率和带宽可调节的OTA-C复数滤波器.通过设置控制字,可以控制复数滤波器的带宽和中心频率,形成窄带和宽带两种模式.滤波器的带宽设计为5 MHz和25 MHz,中心频率分别为4 MHz和15.4 MHz.窄带滤波器镜像抑制大于30dB(测试),宽带滤波器镜像抑制大于40 dB(仿真).设计中,采用了基于VCO锁相环结构的片上频率修正电路.滤波器消耗的总电流分别为1.7 mA和2.5 mA.仿真结果与测试结果非常吻合.     

CMOS低中频有源复数带通滤波器设计

设计并实现了基于0.18 μm CMOS工艺的2.4 GHz无线传感网(Wireless Sensor Network)射频接收机低中频有源复数带通滤波器.该滤波器采用基于积分器单元的复数带通滤波器结构,同时实现镜像抑制和信号滤波的功能.仿真结果表明,复数带通滤波器的中心频率为2 MHz,通带带宽为2.4 MHz,通带电压增益约为12.5 dB,镜像抑制大于30 dB,相邻信道阻带衰减大于40 dB,噪声系数小于15 dB,消耗电流为5 mA.通过系统验证,本设计各项性能均满足无线传感网射频接收机的设计要求.     

一种射频前端宽带复数滤波器电路的设计

采用0.18 μm CMOS工艺,设计实现了一款7阶OTA-C复数滤波器电路.该电路适合应用于低中频结构的卫星导航射频前端芯片.滤波器的带宽设计为25 MHz,中心频率为15.4 MHz,镜像抑制大于30 dB.设计中,采用基于VCO锁相环结构的片上频率修正电路.滤波器消耗的总电流为4 mA,工作电压1.8 V.     

片上锁相环调谐的低功耗中频复数滤波器设计

讨论了应用于IEEE802.15.4标准低中频接收机的3阶贝塞尔复数gm-C滤波器,其中跨导器采用Nauta结构.为了消除工艺偏差、温度变化、老化对截止频率的影响,滤波器电路使用了片上锁相环调谐电路.滤波器设计采用HJTC-0.18 μm 1P6M CMOS混合工艺,中心频率为 3 MHz,-3 dB带宽为2.6 MHz.仿真结果显示临道、间道抑制分别为26.4、44 dB,镜像抑制为31.4 dB,带内SFDR为54.8 dB.复数滤波器电源电压为2.5 V,整体消耗的电流约为1.61 mA.     

低功耗的巴特沃思复数滤波器设计

总结了复数域内的信号处理原理,并介绍了应用于GPS射频前端的低功耗巴特沃思复数滤波器设计实现.该滤波器工作电压为1.5 V,功耗小于1 mW.性能指标为:中心频率4 MHz,3 dB带宽为3 MHz,偏离中心频率1 MHz以内的通带纹波小于0.5 dB,镜像频率处的抑制比为70 dB以上.最后在0.18 μm工艺下实现版图面积为0.5×0.48 mm2.     

三阶级联复数有源RC带通滤波器

采用0.18μmCMOS工艺设计了一款应用在无线传网中的三阶级联有源RC复数带通滤波器,同时设计了自动频率调谐电路(AFT)。该滤波器采用的是切比雪夫逼近函数予以实现。在5比特数字控制码开关电容阵列的控制下,AFT电路即可完成对主体滤波器电路频率变化的校正。仿真结果显示,滤波器的中心频率稳定在2MHz,通带带宽为2MHz,镜像抑制比大于34dB,相邻信道阻带衰减大于34dB,通带纹波小于1dB,消耗电流为2.3mA,工作电源电压为1.8V。     

一种高线性Gm-C复数滤波器的设计

针对低电源电压Gm-C复数滤波器线性度不足的问题,提出了一种使用大信号线性化技术的一阶复数带通滤波器。所提出的复数滤波器使用了不平衡差分对和自适应偏置电路两种线性化技术,通过扩展跨导相对恒定的输入电压范围提高滤波器的线性度。滤波器采用UMC 110 nm CMOS工艺设计,中心频率和带宽分别为2 MHz和1 MHz。Cadence仿真结果显示,在1.2 V电源电压下,滤波器功耗为229μW,镜像抑制比(IIR)为18 dB,线性度(输入三阶交调点IIP3)为9.53 dBm,总谐波失真(THD)为-55.7 dB。该复数滤波器电路结构简单、功耗较低,以期能广泛应用于低电源电压的接收机设计。     

一种低通/复数双模式滤波器的设计

从系统优化以节省面积和减小功耗的目的出发,设计了一种适用于2.4 GHz Zigbee无线收发芯片的双模滤波器电路.该滤波器采用时分复用和电路复用的方法,可工作于低通滤波和复数滤波两种模式.电路采用OTA-C 7阶巴特沃思结构,利用0.18 μm CMOS工艺实现.设计中,采用基于CCO锁相环的频率修调电路,以减小滤波器频率偏差.测试结果表明,低通滤波模式时,带宽为1.45 MHz,偏移3 MHz抑制为55 dB;在复数滤波模式下,镜像抑制可达35 dB;在1.8 V电源电压下,滤波器和修正电路电流分别为0.86 mA和0.23 mA.     

具备谐波抑制的高阶有源N路径带通滤波器

采用三级2阶N路径滤波单元设计了一种带谐波抑制功能的高阶有源N路径带通滤波器。在第二、三级之间插入负电阻和回转器,可提高滤波器的Q值、带宽和线性度;在末级的串联型2阶N路径滤波单元中采用有相位差的时钟信号进行控制,可有效地抑制三次谐波。基于0.18μm CMOS工艺仿真。结果表明,该滤波器的最高增益为20.12 dB,中心频率调谐范围为0.1~1 GHz,带外抑制高达50.2 dB@700 MHz,三次谐波抑制大于40 dB,噪声系数为4.71~6.9 dB,带外输入3阶交调点(IIP3)为16.3 dBm@50 MHz。     

应用于多模卫星导航系统的Gm-C复数滤波器

提出了一种应用于多模卫星导航系统的5阶Gm-C复数滤波器,其带宽可设置为2 MHz 和4 MHz,带内增益为10 dB,对带外信号和镜像信号均有40 dB的衰减,可以满足GPS、北斗、Galileo和GLONASS四种不同导航系统的要求.同时,引入一种新的低功耗滤波器自动调谐电路,可以对温度、工艺变化等各种因素引起的滤波器中心频率和带宽的偏差进行精确校正,保证了滤波器的正常工作和射频前端的性能.     

Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems

A 0.13-mu m CMOS fourth-order notch filter for the rejection of the 5-6 GHz interference in UWB front-ends is reported. The filter is integrated into an analog front-end for Mode #1 UWB. A thorough analysis based on a simplified model of the filter is carried out. An algorithm for the automatic tuning and calibration of the filter is also discussed and demonstrated. Two versions of the circuit are designed and fabricated: the first comprises a low-noise amplifier and the filter, and the second expands it to a complete front-end. In the latter version the filter was also redesigned. The filter provides more than 35 dB of attenuation and has a tuning range of 900 MHz, adding less than 30% power consumption to the LNA. The out-of-band IIP3 (higher than -13.2 dBm with the filter off) takes a 9-dB advantage from the filter and the compression of the gain due to the out-of-band blocker is reduced by at least 6 dB in the complete front-end. The conversion gain of the front-end is 25 dB per channel, its average noise figure is lower than 6.2 dB, and its in-band 1-dB compression point is higher than - 30 dBm at a power consumption of 32 mW.     

A dual-mode complex filter for GNSS receivers with frequency tuning

A fifth/seventh order dual-mode OTA-C complex filter for global navigation satellite system receivers is implemented in a 0.18 fxm CMOS process. This filter can be configured as the narrow mode of a 4.4 MHz bandwidth center at 4.1 MHz or the wide mode of a 22 MHz bandwidth center at 15.42 MHz. A fully differential OTA with source degeneration is used to provide sufficient linearity. Furthermore, a ring CCO based frequency tuning scheme is proposed to reduce frequency variation. The measured results show that in narrow-band mode the image rejection ratio (IMRR) is 35 dB, the filter dissipates 0.8 mA from the 1.8 V power supply, and the out-of-band rejection is 50 dB at 6 MHz offset. In wide-band mode, IMRR is 28 dB and the filter dissipates 3.2 mA. The frequency tuning error is less than ±2%.     

An eighth order channel selection filter for low-IF and zero-IF DVB tuner applications

An eighth order active-RC filter for low-IF and zero-IF DVB tuner applications is presented, which is implemented in Butterworth biquad structure. An automatic frequency tuning circuit is introduced to compensate the cut-off frequency variation using a 6-bit switched-capacitor array. Switched-resistor arrays are adopted to cover different cut-off frequencies in low-IF and zero-IF modes. Measurement results show that precise cut-off frequencies at 2.5, 3, 3.5 and 4 MHz in zero-IF mode, 5, 6, 7 and 8 MHz in low-IF mode can be achieved, 60 dB frequency attenuation can be obtained at 20 MHz, and the in-band group delay agrees well with the simulation. Two-tone testing shows the in-band IM3 achieves -52 dB and the out-band IM3 achieves -55 dB with -11 dBm input power.This proposed filter circuit, fabricated in a SMIC 0.18 μm CMOS process, consumes 4 mA current with 1.8 V power supply.     

片上自动调谐的可编程有源RC滤波器

研制了一款可编程6阶巴特沃斯有源RC滤波器.为提高滤波器中运算放大器的增益带宽积,设计了一种新型的前馈补偿运算放大器.为消除工艺偏差和环境变化对截止频率的影响,设计了一种片上数字控制频率调谐电路,并采用TSMC 0.18 μm CMOS工艺进行了流片.滤波器采用低通滤波结构,测试结果表明,3 dB截止频率为1～32 MHz,步进1 MHz,带内增益0 dB,带内纹波0.8 dB,2倍带宽处带外抑制不小于24 dBc,5倍带宽处带外抑制不小于68 dBc,滤波器等效输入噪声为340 nV/√Hz@1MHz,调谐误差为±3％.滤波器裸芯片面积0.87 mm×1.05 mm.采用1.8V电源电压,滤波器整体功耗小于20 mW.     

A broad-band tunable CMOS channel-select filter for a low-IFwireless receiver

This paper presents a broad-band bandpass filter (BPF) designed as a channel-select filter for wireless applications. It is implemented as a low-pass filter (LPF) in series with a high-pass filter (HPF) for lower power consumption compared to true BPF. Semiscaling of the filter nodes is superior in the wireless receiver over traditional full scaling. The HPF is built with low-pass feedback of an amplifier. The bandwidth is selectable from 625 kHz, 2.5 MHz, or 10 MHz. The filter stopband loss is more than 50 dB extending beyond 100 MHz, and passband ripple less than 2.5 dB. Fabricated in a 0.6-μm CMOS process, it provides a minimum input noise of 16 nV/√Hz noise with 22.5-dBm out-of-band IIP3, while draining an average 14 mA from 3.3 V     

一种接收前端三级低噪声放大器的设计

针对单片雷达接收机中对低噪声放大器（LNA）的要求,采用CMOS0．18,um工艺设计了一个三级级联的镜像抑制低噪声放大器。通过在低噪声放大器中接入限波滤波器,实现对镜像信号的衰减,从而减小了后端混频器电路的设计难度。在ADS中对设计的放大器仿真,其结果为：最大供电电压为5V情况下,信号频段为3．0～3．2GHz,中频输出为225MHz,功率增益≥31dB,噪声系数（FN）≤O．5dB,1dB点的输入／输出功率分别为-19．5dBm和11．5dBm,对镜像信号的抑制度达22dB。     

L波段双层交指线性相位MEMS滤波器的设计

针对射频MEMS滤波器的带外抑制能力较差和带内群延时不平坦的问题,设计了一种窄带宽、低插损、高选择性的L波段射频MEMS线性相位滤波器.选取高介电常数的衬底材料实现窄带传输,采用双层交指结构的谐振器实现线性相位,减小了电路体积.利用HFSS软件对滤波器的性能进行优化.结果表明,该滤波器的中心频率为1.46 GHz,带内...