DNA computing from a signal processing viewpoint

In this article, an analysis of Adleman's experiment and a review of DNA computing applications from a signal-processing point of view are provided. In addition, certain key parts of DNA computing are emphasized, such as the code word design, to which the application of signal processing theory and techniques can offer significant advantages. The goal of this article is to introduce to the signal processing community a new unexplored area of research.     

Switched-capacitor circuit design

Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators. The applications of these circuits in telecommunications, speech processing, and other signal-processing systems are also briefly discussed.     

A High-Frequency Field-Programmable Analog Array (FPAA) Part 2: Applications

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented architecture accommodates a wide variety of linear and nonlinear circuits found in many signal processing systems. Thus it effectively proves that it is possible to improve the performance of an FPAA by means of constraining the interconnection pattern, without significantly limiting the class of circuits it can implement.     

数字信号处理及DSP芯片的发展前景

简要介绍了DSP的设计流程及其实现方法,着重介绍了DSPs芯片结构特点、运算速度、应用与市场,并展望了DSPs芯片的发展前景。     

The digital signal processor Derby

Applications that use digital signal processing chips are flourishing, buoyed by increasing performance and falling prices. Concurrently, the market has expanded enormously. Vendors abound. Many newcomers have entered the market, while established companies compete for market share by creating ever more novel, efficient, and higher-performing architectures. The range of digital signal-processing (DSP) architectures available is unprecedented. In addition to expanding competition among DSP processor vendors, a new threat is coming from general-purpose processors with DSP enhancements. So, DSP vendors have begun to adapt their architectures to stave off the outsiders. The author provides a framework for understanding the recent developments in DSP processor architectures, including the increasing interchange of architectural techniques between DSPs and general-purpose processors     

A Hierarchical Block-Floating-Point Arithmetic

In order to give an answer to a question of the arithmetic in future DSP architectures for mobile communication applications, the signal processing quality of different arithmetic representations has been studied. Based on the result, a new approach for implementing block-floating-point arithmetic is proposed. This approach intends to preserve the least-significant-bits (LSBs) to improve signal processing quality. The preservation of LSBs is automatically and perfectly done by hardware. Serveral simulation results show that the proposed block-floating-point implementation provides improved SNRs over conventional block-floating-point implementations. For the same number of bits in the memory for each representation, the SNRs better than floating-point are also observed. For multiple datapath DSPs, this implementation also requires significantly less hardware complexity than floating-point.     

Superconductive analog signal processing devices

Real-time signal processing is important in many emerging applications in areas such as pulse-compression radar, spread-spectrum communications, and electronic warfare. The required digitally equivalent computational rate for these applications is on the order of 10² arithmetic operations per second and the required instantaneous bandwidths could approach 10 GHz. These exceed by nearly three orders of magnitude the capabilities projected for digital systems in the near future, and even exceed that of recently developed analog technologies such as surface-acoustic-wave (SAW) signal-processing devices. To meet anticipated future system needs, superconductive analog signal-processing components with bandwidths of 2 GHz have recently been realized, and the technology is being developed for the realization of 10-GHz bandwidths. Issues of fabrication technology and subsystem integration are examined for superconductive analog signal-processing devices     

Charge-domain integrated circuits for signal processing

A new class of integrated circuits called charge-domain device has been developed for performing enhanced monolithic signal processing. All signal-processing operations are accomplished by splitting, routing and combining charge packets, thus overcoming many of the limitations of alternative devices such as charge-coupled device (CCD) split-electrode transversal filters and switched capacitor filters. Charge manipulation techniques are described which allow poles as well as zeros of a transfer function to be implemented efficiently, leading to infinite impulse response monolithic filters suitable for high-frequency applications. Several test filters, including a narrowband 8-pole bandpass filter, are demonstrated. These charge-domain devices are useful in applications ranging from radio IF to radar to video signal processing with a high level of integration achievable on a single charge-domain integrated circuit.     

DSP中基于指令并行和任务并行的DMA接口设计

在面向多媒体数据流的计算密集型的应用中，不仅要求DSP(数字信号处理器)有非常强大的数据处理能力，还要求其具有高速的数据输入、输出接口带宽。本文在传统DSP常用的增强型哈佛结构的基础上，提出一种DSP处理器DMA接口结构的设计方案．实现了基于指令并行和任务并行的DMA并行传输模式。通过6个常用的DSP算法程序实验验证．在片上存储器使用单口RAM的前提下，指令中带有片上Memory访存操作的指令占总指令的42．2％-94．3％时．这种方法设计的。DMA接口能够在DSP零开销的情况下，完成必要的数据传输。而且能够实现对Host处理器程序员透明的。DMA数据传输操作．有效地提高了DSP系统的性能。     

单片可编程DSP及其在高速控制中的应用

数字信号处理器是一种面向信号处理和计算密集型任务的单片微机。本文以ＴＭＳ３２０系列ＤＳＰ为例，对ＤＳＰ和一般微控制器的性能进行了比较，讨论了单片ＤＳＰ用于高速实时控制的结构特点，最后给出了ＤＳＰ在计算机控制中的应用实例。     

Virtual radios

Conventional software radios take advantage of vastly improved analog to digital converters (ADCs) and digital signal processing (DSP) hardware. Our approach, which we refer to as virtual radios, also depends upon high performance ADCs. However, rather than use DSPs, we have chosen to ride the curve of rapidly improving workstation hardware. We use wideband digitization and then perform all of the digital signal processing in user space on a general purpose workstation. This approach allows us to experiment with new approaches to signal processing that exploit the hardware and software resources of the workstation. Furthermore, it allows us to experiment with different ways of structuring systems in which the radio component of communication devices is integrated with higher-level applications. This paper describes the design and performance of an environment we have constructed that facilitates building virtual radios and of two applications built using that environment. The environment consists of an input/output (I/O) subsystem that provides high bandwidth low latency user-level access to digitized signals and a programming environment that provides an infrastructure for building applications. The applications, which exemplify some of the benefits of virtual radios, are a software cellular receiver and a novel wireless network interface     

Microprocessors and digital ICs for motion control

This paper reviews the developments in microprocessors and digital ICs with a special attention to applications to motion control. First, the use of microprocessors and digital ICs in the control of electric motor drives is considered. General-purpose microprocessors and microcontrollers are then presented with emphasis on features that are necessary for the implementation of real-time control systems. High-performance advanced processors such as digital signal processors (DSPs), reduced-instruction-set computing (RISC) processors, and parallel processors are studied. Development and debugging tools required for developing sophisticated microprocessor-based control systems are considered. The capabilities of application-specific integrated circuits (ASICs) in motion control and their design process are examined. Typical application examples illustrating research work in digital motion control using microprocessors and digital ICs are presented. The potentials of new devices are considered for application to high-performance drive systems. Trends for future development of the microprocessor technology for motion control applications are projected     

Recent advances in DSP systems

Some of the advances that have contributed to the realization of communication systems with programmable digital signal processors (DSPs) are described. DSP architectures are examined, covering the performance improvements resulting from advances in circuitry as well as in architecture. Architectural advances discussed are parallel processing, function generation, integrating analog circuits, and sigma-delta analog-to-digital conversion. DSP applications to high-speed modems, trellis-coded modulation, and echo cancellation are examined. The DSP implementation of a V.32 modem is described     

The Future Impact of GaAs Digital IC's

A review of digital GaAs IC technology and an assessment of its future impact on gigabit signal processing is presented. High-speed signal processing and computers will require MSI-complexity interface circuits capable of 1-10 GHz clock frequencies and LSI-complexity digital circuits operating in the 0.2-5 GHz range at tens of microwatts per gate. A wide range of applications exists for frequency counters, multiplexers, A/D converters, FFT's, microprocessors, and memories that operate at speeds significantly higher than on presently available circuits. Issues related to high-speed IC design such as power dissipation, packing density, capacitance effects, design rules, and intra- and interchip propagation delays are discussed.     

Algorithm-based low-power and high-performance multimedia signalprocessing

Low power and high performance are the two most important criteria for many signal-processing system designs, particularly in real-time multimedia applications. There have been many approaches to achieve these two design goals at many different implementation levels ranging from very-large-scale-integration fabrication technology to system design. We review the works that have been done at various levels and focus on the algorithm-based approaches for low-power and high-performance design of signal processing systems. We present the concept of multirate computing that originates from filterbank design, then show how to employ it along with the other algorithmic methods to develop low-power and high-performance signal processing systems. The proposed multirate design methodology is systematic and applicable to many problems. We demonstrate that multirate computing is a powerful tool at the algorithmic level that enables designers to achieve either significant power reduction or high throughput depending on their choice. Design examples on basic multimedia processing blocks such as filtering, source coding, and channel coding are given. A digital signal-processing engine that is an adaptive reconfigurable architecture is also derived from the common features of our approach. Such an architecture forms a new generation of high-performance embedded signal processor based on the adaptive computing model. The goal of this paper is to demonstrate the flexibility and effectiveness of algorithm-based approaches and to show that the multirate approach is an effective and systematic design methodology to achieve low-power and high throughput signal processing at the algorithmic and architectural level     

Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range

Internally compensated CMOS op amps have been widely used in sampled-analog signal processing applications over the past several years. However, the popular two-stage op amp suffers from poor AC power supply rejection to one of the power rails. Two circuits are presented that overcome the power-supply rejection ratio (PSRR) problems of the earlier amplifier: one for virtual ground applications such as switched-capacitor integrators, the other for buffer applications requiring wide common-mode input range. Small signal analysis is developed for the open-loop and PSRR responses of the two amplifiers. In addition, design guidelines are suggested and test results are presented.     

多DSP局部总线与VME总线的接口设计

在多DSP信号处理系统的设计过程中,开发基于标准总线的信号处理模板已经成主流设计方案。这种设计方案的难点就是局部总线到标准总线的时序转换比较复杂。在详细介绍VME总线功能特点的基础上,给出了一种在FPGA控制下实现的工业控制计算机通过VME总线与多DSP信号处理板局部总线进行通信的接口设计方案。FPGA的控制功能采用状态机工作方式实现。     

Mimicking the human ear

A prosthetic device, called a cochlear implant, can be implanted in the inner ear and can restore partial hearing to profoundly deaf people. Some individuals with implants can now communicate without lip-reading or signing, and some can communicate over the telephone. The success of cochlear implants can be attributed to the combined efforts of scientists from various disciplines including bioengineering, physiology, otolaryngology, speech science, and signal processing. Each of these disciplines contributed to various aspects of the design of cochlear prostheses. Signal processing, in particular, played an important role in the development of different techniques for deriving electrical stimuli from the speech signal. Designers of cochlear prosthesis were faced with the challenge of developing signal-processing techniques that would mimic the function of a normal cochlea. The purpose of this article is to present an overview of various signal-processing techniques that have been used for cochlear prosthesis over 25 years. The signal-processing strategies described are only a subset of the many that have been developed for cochlear prosthesis