125mm彩色AMOLED的多晶硅TFT基板

用化学法在非晶硅表面形成Ni源,经金属诱导晶化(MIC)得到了大晶粒碟型多晶硅.为改善以此材料作有源层的多晶硅TFT的漏电特性和均匀性,采用动态杂质吸除方法对MIC 过程所残留的Ni进行了吸除.通过流程简化,采用6块版工艺,研制出125mm QVGA有源选址有机发光显示的多晶硅TFT选址矩阵基板.     

MIC薄膜多晶硅材料的动态镍吸除技术基本机理及其应用

首先阐述了MIC薄膜多晶硅材料动态镍吸杂技术的基本机理和主要工艺过程,然后以多晶硅薄膜晶体管(poly-Si TFT)为例研究了动态吸杂技术的应用.在研究金属诱导晶化多晶硅材料(MIC poly-Si)和以之为有源层的poly-Si TFT的过程中,发现在MIC多晶硅薄膜中含有部分残余的镍成份.而大部分存在于对撞晶界的残余镍成份会造成大量的缺陷,这将导致TFT器件性能乃至整个系统的稳定性和可靠性的降低.为了改善MIC薄膜及器件质量,我们采用磷硅玻璃(PSG)动态镍吸杂技术,有效地吸除镍,降低多晶硅中镍的残留量,改善对撞晶界的缺陷密度,降低用之制备TFT的漏电流.该技术工艺过程简单,处理成本低,适合于大批量的工业化生产,有望成为制备高稳定性微电子器件与电路系统的必需工艺技术.     

MIC薄膜多晶硅材料的动态镍吸除技术基本机理及其应用

首先阐述了MIC薄膜多晶硅材料动态镍吸杂技术的基本机理和主要工艺过程,然后以多晶硅薄膜晶体管(poly-Si TFT)为例研究了动态吸杂技术的应用.在研究金属诱导晶化多晶硅材料(MIC poly-Si)和以之为有源层的poly-Si TFT的过程中,发现在MIC多晶硅薄膜中含有部分残余的镍成份.而大部分存在于对撞晶界的残余镍成份会造成大量的缺陷,这将导致TFT器件性能乃至整个系统的稳定性和可靠性的降低.为了改善MIC薄膜及器件质量,我们采用磷硅玻璃(PSG)动态镍吸杂技术,有效地吸除镍,降低多晶硅中镍的残留量,改善对撞晶界的缺陷密度,降低用之制备TFT的漏电流.该技术工艺过程简单,处理成本低,适合于大批量的工业化生产,有望成为制备高稳定性微电子器件与电路系统的必需工艺技术.     

多晶硅薄膜的激光晶化技术

1 引言 多晶硅薄膜晶体管(p-Si TFT)在有源LCD和有源OLED中都有重要应用.在有源LCD中,a-SiTFT LCD目前占据绝大部分市场,尤其在大尺寸液晶电视和液晶显示器等方面,p-Si TFT LCD只是在中小尺寸中要求高分辨率的应用领域占据了一部分市场.     

NTT公司开发液晶用TFT技术

日本电信电话公司开发有源矩阵液晶显示用大面积、高分辨率、低成本的TFT制造技术.该技术是在玻璃衬底上集成TFT,用作液晶器件的驱动电路.采用有利于提高性能的多晶硅材料,研究廉价玻璃衬底上的低温制造技术是开发重点,此外还采用了新的高速驱动     

用非晶硅薄膜晶体管寻址的有源矩阵液晶显示的视频特性

引言近来,平板显示有源矩阵液晶显示(LCD)得到广泛的开发。各种类型的有源矩阵液晶显示已有报导。我们已报导过可用激光再结晶的多晶硅来获得重复性和一致性好的薄膜晶体管(TFT)。然而,由于激光再结晶TFT是用某些高温过程的大规模集成工艺制作的,而且,在大规模集成工艺设备中存在某些尺寸限制,使得激光再结晶多晶硅TFT阵列不适用于大面积显示。另一方面,非晶硅TFT目前普遍用作有源矩阵LCD中的开关管。最近,我们已经制成由非晶硅TFT组成的,对角线尺寸为5英寸和10英寸的有源矩阵LCD。     

poly—Si TFT制作工艺探索

对poly-Si TFT的制作工艺进行了研究，采用准分子激光晶体法制备了多晶硅薄膜，并以Mo,Al两种金属直接与有源层接触形成源漏电极，对这两种不同金属源漏电极ploy-Si TFT的性能进行了比较。研究了退火其性能的影响，结果表明材料性能是符合要求的。     

基于 P-Type 多晶硅TFT技术的集成型有源 OLED 驱动电路

低温多晶硅(LTPS:Low-temperature poly-Si)技术已经成为薄膜晶体管(TFT:thin film transistor)制作中最具吸引力的技术,并应用在AMOLED显示器中.P-type 技术能够简化 TFT 的制作过程.本文提出了一种应用 p-type 多晶硅 TFT的 AMOLED 驱动电路结构,包括栅极驱动器、数据驱动器以及像素阵列.数据驱动器采用分块方法,使得显示屏的输出线数大大减少.作者采用一种改进的 p-type 移位寄存器实现逐行选通的功能,并采用由 4 个 p-type 反相器级联构成的缓冲器来提高电路的驱动能力.为了验证上述电路结构的正确性,作者采用 HSPICE 软件进行仿真分析.结果表明,电路工作正常.利用韩国汉城国立大学及 Neo Poly 公司在多晶硅制作方面的优势,我们已经合作完成了应用上述电路结构的分辨率为96×3×128的有源 OLED 的制作.     

基于AM-OLED基板的拓展多晶硅薄膜功能层的研究

在有源寻址有机发光二极管（active matrix organic light emitting diode, AM-OLED）显示基板中,将电学功能层--薄膜晶体管（thin film transistor, TFT) 有源层材料p型掺杂金属诱导晶化（metal induced crystallized, MIC）多晶硅（p+-MIC poly-Si）薄膜的版图适当延伸,来充当OLED的阳极,由于它具有低方块电阻、高功函数的电学特性和半反半透、低吸收率的光学特性,与OLED的金属铝阴极形成了微腔器件,成功地形成了显示基板上的多晶硅薄膜的光学功能层. 对这一功能层的厚度进行了优化,比较了不同厚度下TFT器件的电学特性和OLED的光学特性. 当其厚度为40nm时为最佳厚度,此时,TFT器件场迁移率、阈值电压、亚阈值幅摆、电流开关比和栅压诱导漏极漏电等性能为最佳,且红光微腔式OLED (microcavity-OLED, MOLED）的出光强度增大,光谱窄化,电流效率与功率效率均有所提高. 这不仅使器件的性能有所提高,而且大大地简化了AM-OLED基板的制备流程.     

玻璃衬底上MIUC Poly-Si TFT显示驱动电路

以高性能的金属诱导单一方向横向晶化多晶硅薄膜晶体管(MIUC poly-Si TFT)为基础,研制出性能能满足AM-LCD和AM-OLED要求、版图和象素尺寸适配、制备工艺和象素电路兼容的多晶硅TFT行扫描和列驱动电路.该行扫描电路工作电压为3.5-10V;当工作电压为5V、负载电容为22pf时,下降沿约为150ns,上升沿约为205ns,最高工作频率在1MHz以上;列驱动电路工作电压为3.5-8V;当工作电压为5V、负载电容为22pf时,上升沿约为200ns,信号衰减率为15%(64μs扫描周期),最高工作频率达到4MHz.将该MIUC poly-Si TFT多晶硅行扫描、列驱动电路和有源选址电路集成到同一基板上,制备出象素数为80×RGB×60、动态显示效果良好的全集成型LCD屏样品.     

Excimer-laser crystallized poly-Si TFT's with transparent gate

A new poly-crystal silicon thin-film transistor (poly-Si TFT) with a transparent bottom-gate electrode has been fabricated by XeF excimer-laser light irradiation from the glass substrate side. Compared with poly-Si TFTs made by XeF or ArF excimer-laser light irradiation to the top Si surface, the new TFT shows a higher electron mobility of about 100 cm²/Vs, independent of the Si film thickness. Therefore, poly-Si driver TFTs and amorphous-silicon (a-Si) TFTs for the matrix can be formed with the same channel-etch type bottom-gate structure simultaneously on the same glass substrate by using the same starting materials. This is expected to open the way for making driver monolithic and active matrix liquid crystal displays     

低温多晶硅TFT技术的发展

本文综述低温多晶硅（LTPS）TFT技术的最新进展情况。该技术目前的研究前沿是：（1）制作高性能的TFT；（2）在柔性衬底上制作LTPS TFT；（3）驱动有机发光器件的TFT；（4）LTPS TFT的新应用。同时还展望了LTPS TFT技术的未来发展趋势。     

A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors

A new pixel circuit design for active matrix organic light-emitting diode (AMOLED), based on the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) is proposed and verified by SPICE simulation. Threshold voltage compensation pixel circuit consisting of four n-type TFTs, one p-type TFT, one additional control signal, and one storage capacitor is used to enhance display image quality. The simulation results show that this pixel circuit has high immunity to the variation of poly-Si TFT characteristics.     

A New Poly-Si TFT Current-Mirror Pixel for Active Matrix Organic Light Emitting Diode

A new poly-Si thin-film-transistor (TFT) current-mirror-active-matrix-organic-light-emitting-diode (AMOLED) pixel, which successfully compensates for the variation of the threshold voltage as well as mobility in the excimer laser annealed poly-Si TFT pixel, is designed and fabricated. The OLED current$(I_ OLED)$of the proposed pixel does not depend on the operating temperature. When the temperature of pixel is increased from 27$^circhboxC$to 60$^circhboxC$, the$I_ OLED$of the new pixel circuit composed of four TFTs and one capacitor increases only about 1.5%, while that of a conventional pixel composed of two TFTs and one capacitor increases about 37%. At room temperature, nonuniformity of the$I_ OLED$in the proposed circuit was also considerably suppressed at around 9%. We have successfully fabricated a 1.2-in AMOLED panel$(hbox96 times hbox96 times hboxred green blue)$to evaluate the performance of the proposed pixel. A troublesome residual image caused by the hysteresis phenomenon of the poly-Si TFT was almost eliminated in the proposed AMOLED panel as a result of current programming.     

A Novel Blocking Technology for Improving the Short-Channel Effects in Polycrystalline Silicon TFT Devices

An original blocking technology is proposed for improving the short-channel characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs). In particular, two types of modified devices called poly-Si TFT with block oxide and poly-Si on partial insulator (POPI)-TFT are designed for the first time in this field to enhance device performance. The proposed TFT structures can significantly reduce short-channel effects when compared with a thick source/drain (S/D) poly-Si TFT (i.e., the fully depleted TFT). In addition, an ultrathin (UT) S/D structure (UT-TFT) is designed to verify that the block oxide TFT devices do achieve improved performance without needing the thin active layers and ultrashallow junction depth. Also, the POPI-TFT is found to reduce the thermal instability through its natural body-tied scheme.     

On the pseudo-subthreshold characteristics ofpolycrystalline-silicon thin-film transistors with large grain size

A two-dimensional nonplanar device simulator for polycrystalline-silicon thin-film transistors (poly-Si TFTs) was developed, in which the influence of trapped charges and carrier scattering within the grain boundary region are incorporated into Poisson's equations and drift-diffusion current formulations, respectively. With this simulator, the I-V characteristics of poly-Si TFT devices can be characterized. TFTs in polycrystalline silicon were fabricated to test the simulator. Special attention was paid to the conduction mechanism in poly-Si TFTs with large grain size. A concept called the pseudo-subthreshold region is presented to explain the observed behavior. The key factors affecting the pseudosubthreshold slope were investigated and elucidated using the simulator     

α-Si-H TFT及有源矩阵选址平板液晶显示

本文报道了用于平板液晶显示(LCD)的氢化非晶硅薄膜晶体管(α-Si:H TFT)的研制结果,此晶体管开态电流约10~(-6)A,关态电流<10~(-11)A,开启电压～15V.用此α-Si:H TFT矩阵已封装出具有20×20个有效象素单元的液晶显示平板,并成功地实现了有源选址与动态显示功能.同时,对如何进一步提高TFT性能作了一些分析与讨论.     

High-performance poly-Si TFTs fabricated by implant-to-silicide technique

High-performance poly-Si thin-film transistors (TFTs) with fully silicided source/drain (FSD) and ultrashort shallow extension (SDE) fabricated by implant-to-silicide (ITS) technique are proposed for the first time. Using the FSD structure, the S/D parasitic resistance can be suppressed effectively. Using the ITS technique, an ultrashort and defect-free SDE can also be formed quickly at about 600/spl deg/C. Therefore, the FSD poly-Si TFTs exhibits better current-voltage characteristics than those of conventional TFTs. It should be noted that the on/off current ratios of FSD poly-Si TFT (W/L=1/4/spl mu/m) is over 3.3/spl times/10/sup 7/, and the field-effective mobility of that device is about 141.6 (cm/sup 2//Vs). Moreover, the superior short-channel characteristics of FSD poly-Si TFTs are also observed. It is therefore believed that the proposed FSD poly-Si TFT is a very promising TFT device.     

Improved lifetime of poly-Si TFTs with a self-alignedgate-overlapped LDD structure

We investigated the lifetimes for various poly-Si thin film transistor (TFT) structures. A gate-overlapped lightly doped drain (GOLDD) structure was self-aligned by the side etching of Al-Nd in an Al-Nd/Mo gate electrode. The dopant activation process in the LDD regions of GOLDD TFTs was performed by using a H₂ ion-doping technique. We also observed the effect of lifetime on the source/drain activation process. The thermal annealing of the source/drain region was found to extend the lifetime. The predicted lifetime of our GOLDD poly-Si TFT is superior to those of non-lightly doped drain (non-LDD) and lightly-doped drain (LDD) poly-Si TFTs. The trapped-electron density at the drain junction after bias-stressing was also investigated using a two-dimensional (2-D) simulation