Oscillation-based test in oversampled ΣΔ modulators

This paper discusses a way of applying the oscillation-based test (OBT)/oscillation-based built-in-self test concept to oversampled ΣΔ modulators, exploiting previous experience coined through the implementation of OBT in SC integrated filters. Analytical and simulation results demonstrate that it is always feasible to find out an OBT configuration for a typical discrete-time second-order modulator structure without adding a substantial extra circuitry, but only resorting to local feedback loops. A feedback strategy can be chosen providing enough freedom to force oscillations, which can be worthwhile for testing purposes. The selected oscillation parameters allow us to establish criteria for a high fault coverage.     

New switched-capacitor ladder filters

A method is described and implemented for the derivation of switched-capacitor discrete-time filters from analogue passive filters of the ladder doubly terminated kind. The method is based on linear transformation active (LTA) synthesis, and yields some very interesting results.     

Oscillation-based test in bandpass oversampled A/D converters

This paper extends a study performed by the authors in previous papers dealing with the OBT approach applied to low-pass modulators ‘Microelectron. J. 33/10 (2002) 799’, showing herein the specific features associated to the bandpass case. A practical feedback strategy will be proposed in order to built an effective oscillator, which can be valuable for testing purposes. Critical points of the proposed OBT solution will be considered in order to establish useful guidelines to apply this test approach to generic bandpass ΣΔ modulators.     

Parasitics-insensitive switched-capacitor ladder filters

A simple method for designing parasitics-insensitive switched-capacitor (s.c.) ladder filters is described. The response of the s.c. filter is related to that of a continuous-time prototype circuit by the bilinear z-transform.     

Exact design of switched-capacitor bandpass ladder filters

An exact design of switched-capacitor bandpass filters is presented. This new technique is based on the distributed circuit theory with a suitable bandpass transformation. The theoretical aspects of this method are given as well as the simulated results using a switched-capacitor circuit-analysis program.     

Improved circuit elements for switched-capacitor ladder filters

A new switched-capacitor floating inductance simulation circuit which does not depend on matching of passive elements is presented. A switched-capacitor source termination circuit which functions as a sample-and-hold circuit for a filter is also described.     

Exact design of strays-insensitive switched-capacitor highpass ladder filters

A new technique for the exact design of fully straysinsensitive switched-capacitor (SC) highpass ladder filters is proposed. The design is applicable to filters with or without finite transmission zeros.     

Experimental validation of exact design of switched-capacitor ladder filters

Experimental results validating a recently introduced exact theory for switched-capacitor lowpass ladder filters are presented. The prototype filter is a third-order Butterworth design using a low sampling/filter-cutoff ratio of 8.28 and has been fabricated in monolithic form.     

Equivalence of two designs of bilinear switched-capacitor ladder filters

Two design methods of switched-capacitor filters are shown to be equivalent. They are due to Lee et al. and to Martin and Sedra. Both are based on an LC ladder filter by stimulating the node voltages.     

Exact design of stray-insensitive switched-capacitor lowpass ladder filters from unit-element prototypes

A new technique is described in which stray-insensitive SC lowpass ladder filters of the LDI type are designed without the need for network synthesis. These filters exactly simulate the response of a unit element cascade prototype filter and may be designed with a usable frequency range up to one half the sampling frequency. This design procedure requires no more than simple hand calculation.     

Embedded anti-aliasing in switched-capacitor ladder filters withvariable gain and offset compensation

A combination of continuous-time and switched capacitor integrators in a simulated LC lossless ladder yields a response with suppressed aliasing without the use of continuous-time prefiltering. Fabricated in a 0.35-μm CMOS process, a fifth-order Cauer low-pass filter for a W-CDMA cellular phone receiver has a cutoff frequency of 1.92 MHz and aliasing suppression of better than 40 dB for 30.72-MHz sampling. Without using any tuning mechanism, a 10% accuracy of the cutoff frequency is achieved. As additional features, the filter has variable gain from -13.3 to 16.4 dB and an offset compensation mechanism. With the latter, a 50-mV dc offset added to the input is suppressed to 11 mV or less at the filter output under the maximum gain setting. The filter consumes 2.81 mA at 1.8-V power supply in a die area of 0.62 mm²     

Testing analog circuits using spectral analysis

In this work a test strategy for analog circuits based on spectral analysis is proposed. The test strategy is blind, in the sense that only statistical information about the input signal is needed, but no sampling of the input signal is required. This feature allows the test of analog circuits with minimum analog hardware addition. In the context of Systems-on-Chip, this strategy needs only the inclusion of a small random signal generator, and transfers most of the signal processing to the digital domain, allowing the use of a purely digital tester or a digital BIST technique. This paper presents the underlying principle of the method and experimental test results for linear analog systems.     

Oscillation Test Scheme of SC Biquad Filters Based on Internal Reconfiguration

In this paper, we explore general conditions for the oscillation based test of switched-capacitor biquad filter stages. Expressions describing the characteristics of a filter stage put into oscillation are derived and conditions for achieving oscillation by internal transformation of the filter stage are explored. Reconfiguration scheme based on the transformation of the biquad filter stage to a quadratic oscillator is studied. Theoretically the circuit can be put into oscillation by de-activating a single capacitor. Simulations, however, show that in practice a carefully designed low feed-back loop is required to achieve acceptable oscillation test mode.

Improving the testability of switched-capacitor filters

A design-for-test methodology for SC filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off- and on-line tests. The approach uses a comparison (voting) mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of a few filter examples are included to assess the potential usefulness of this new approach.     

New realization of inductances for switched-capacitor filters using voltage inverter switches

This paper describes a new design method of inductance simulation for switched-capacitor (SC) filters based on the VIS-SC concept. The resulting circuits have not only the excellent sensitivity behavior of VIS-SC filters, but also the low sensitivity to the main parasitics occuring in the MOS integrated circuit, i.e., the parasitic capacitances between the bottom plates of the implemented capacitors and substrate. As examples, a sixth-order band-pass and a sixth-order band-stop elliptic filter transformed from a third-order low-pass are given. Experimental results agree very well with theory. A brief analysis is given of certain parasitic effects in band-stop filters at the Nyquist frequency.     

Improving the testability of switched-capacitor filters

A design-for-test methodology for SC filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off-and on-line tests. The approach uses a comparison (voting) mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of a few filter examples are included to assess the potential usefulness of this new approach.     

Synthesis of highpass switched-capacitor LDI filters

Exact techniques are given for the design of highpass LDI switched-capacitor ladder filters. The filters have no lumped counterparts and cannot be obtained from a lumped prototype by a transformation. Only stray-insensitive circuits are employed in the realisation, and the filters retain the lowsensitivity properties of a passive (distributed) prototype function.     

手机用TFT-LCD驱动控制芯片的测试电路结构设计

文章从分析手机用TFT-LCD驱动控制芯片的测试需求和芯片结构出发，提出了一种针对该芯片的测试电路结构设计方案。该方案采用多条扫描链对芯片内的多个异构的模块进行隔离，保证了各个模块有较高的测试独立性。考虑到内置SRAM的特殊性，采用边界扫描方式进行测试，提高了测试的灵活性，减少了测试电路的面积。电平敏化扫描链的引入．大大提高了Source Driver测试的可控制性。该方案支持手机用TFT-LCD驱动控制芯片的常规以及特殊项目的测试。     

Bilinear switched-capacitor ladder filter with reduced number of amplifiers

A novel technique is described for the design of bilinear switched-capacitor ladder filters with a reduced number of amplifiers.