用光线控制电扇的开／关

电路采用光敏电阻LDR作为感光元件，可以用普通手电简或其他光源直接对之照射来启闭电扇或类似的电器。电路采用5V供电。     

对Topswitch开／关控制添加接地开关特性的电路

Power Integrations Topswi-tch系列集成回扫式稳压器IC能以较少针脚的小型封装提供出色的性能.对于最少针脚数的封装,此多功能针脚有多种用途,包括开/关控制及电压不足与过电压输入检测.其它封装类型包括L形针脚,也可实现此功能.其应用说明和数据表介绍了如何在这些针脚上实施各种可用的特性.     

用于YAESU或ICOM电台的外置自动天线切换开关

这个天线切换控制系统被设计成可以放入室外的闲置天线盒。如果这样安排的话，你只需将一个单独的天线馈线引入室内即可。     

固态发射机中监控分机的设计

监控分机主要负责固态发射机的状态采集、双工切换及开关控制。为了实现通用化设计,监控分机分为电源、接口、信息处理、双工控制和开关机控制等模块。在实际应用中,可对上述模块进行灵活组合。文中介绍了监控分机的组成及工作原理,各模块的硬件设计,以及监控分机的软件设计。目前,该类型的监控分机已在多个产品中获得了成功应用。     

DX中波发射机风机变频器研究与自动切换电路的设计

风机变频器是DX发射机中十分重要的器件．本文对该变频器的基本性能、控制线路和控制原理等方面进行了分析,同时提供了针对该型变频器的自动切换电路设计方法。     

基于模拟开关技术的可切换实验平台设计

针对目前实验平台可扩展性弱,实验造价高等缺点,设计了一个基于模拟开关技术的可实现不同实验板间切换的实验平台。该平台在NI教学实验虚拟仪器套件(ELVIS)基础上,根据ELVIS技术手册将原型实验板上的数字信号、模拟信号、电源信号以一定的排列接入接口板,将接口板的信号接入切换电路,利用模拟开关技术,将原始信号分解出六路信号,在控制芯片FPGA接收上位机串口传递的控制地址后完成6路实验信号的切换。上位机界面预留视频窗口,可通过USB摄像头实时观看实验现象。该系统扩展了实验资源,实现了人机交互,便于实施监控,满足了实验教学需要。     

无需外接元件的精密1／2模拟衰减器

许多现代A/D转换器都只有一个5V输入范围，将这些转换器用来转换一个±5V或更高的输入信号，就会给设计师带来一个问题如何将一个良好的模拟信号抛弃一半，而又不会产生错误和失真。为解决这个问题，你可以使用一种由两个运放和两只电阻器组成的衰减器(图1)。但是，这种方法会因运放失调和漂移以及电阻器失配而引入增益误差，从而降低系统的性能。     

同时提供方波和平方根两种输入电压的电路

本例使用某个前例（参考文献1）中的电路作为输入。IC1和IC3为ADG5213四开关,有独立的逻辑电平控制输入端（图1与参考文献2）。在输入为高时,开关S2和S3打开,开关S1和S4闭合。当各个开关的控制输入端为低时,它们分别转换到相反的状态。     

4×4光开关矩阵的控制及驱动电路研制

详细阐述了 4× 4光开关矩阵的控制及驱动电路的设计。通过分析开关矩阵状态表、状态切换方法及磁保持驱动的特点 ,提出了几种控制驱动的设计方案 ,并讨论了各自的优缺点。最后给出利用打印机接口和通用阵列逻辑的具体实现方案。测试结果表明电路具有良好的性能。     

浅谈THJDQG-1型光机电气一体化人机界面制作

通过与同事探讨研究,使用EVS000软件制作THJDQG-1型光机电气一体化人机界面,进而掌握EV5000触摸屏软件。     

飞利浦半导体：架起高清“模／数”间的彩虹桥

高清概念的升温带来了电视市场的高速增长。电视机从模拟转向数字，功能不断完善，而且屏幕尺寸越来越大，厚度越来越薄。大尺寸平板电视将逐步取代传统的CRT显示技术，成为新一代的主流消费方向。根据iSuppli的调查，2004年，中国电视市场的需求为3180万台，到2008年预计将达到4420万台。     

A novel demodulator/detector for digital and analog signals on LMRchannels

The design, implementation, and performance of an all-digital demodulator/detector suitable for differential phase-shift keying (DPSK), continuous-phase frequency-shift keying (CPFSK), frequency-shift keying (FSK), and analog FM are discussed. In this modulator/detector, two detectors, one noncoherent and another differentially coherent, operate simultaneously to provide data detection and automatic frequency control (AFC). Test results indicate that the system provides improved performance over the conventional analog quadrature detector for two-period raised-cosine (2RC) CPFSK modulation in additive white Gaussian noise (AWGN) and Rayleigh fading channels. Being all-digital, the demodulator/detector is well suited for integrated circuit implementation. In addition, the system performs as well as the analog quadrature detector for analog FM voice transmissions, thereby maintaining full compatibility with analog land mobile radio (LMR) transmissions     

便携设计中模拟开关的变迁

引言 与电源设计应用中传统大功率MOSFET开关和存储应用中多位数据总线开关相比，模拟开关大大不同。一般来讲，模拟开关主要用于切换手机等便携式设计中的小功率模拟信号。但是．在最近的便携式设计中附加功能的推动下，模拟开关从传统的低带宽音频开关发展成为高速混合信号开关。由于模拟开关具有低功耗、低漏电流及小封装等特点，在某些设计中甚至可以将其用作低功耗DC信号开关。     

Combining digital and analog signals for US IBOC FM broadcasting

IBOC DAB (In-Band On-Channel Digital Audio Broadcasting) requires the simultaneous broadcast of an analog and a digital signal within one channel of the FM band. Because broadcasters are adding IBOC to their existing systems, it is vital that they achieve maximum power efficiency while working within their existing space and power limitations. There are currently three different strategies proposed for accomplishing this goal, each having its own advantages and disadvantages. One strategy is to establish a separate, second antenna for the digital service. The other two strategies involve combining the analog and digital signals, either in a single hybrid transmitter or at the output of separate analog and digital transmitters. This paper discusses the equipment required for accomplishing this last strategy.     

The monitoring of analog and digital program signals in DBS system

The purpose of monitoring the broadcast transmission system is to provide a means of determining how the transmission system is performing and where a fault or abnormal condition exists in the transmission chain. The discussion in this paper focuses on the monitoring requirements in relation to which signals need to be monitored, where to monitor in the transmission chain, and how often each signal needs to be monitored. This paper discusses the equipment required to observe the parameters of essential signals and their attributes such as the NTSC video signal, analogue audio signal, transmitted signal spectrum, power levels, frequency accuracy, received signal spectrum, and BER of a digital broadcasting system. This paper also emphasises the monitoring schemes relating to effective, fast, repeatable, and reliable monitoring of the DBS transmission system and describes implementation issues such as routing, switching, converting, and interfacing. Finally an evaluation and assessment relating to the trouble shooting and the monitoring results affecting the present transmitter station operation and picture quality are addressed     

VLSI for analog/digital communications

Present trends and future prospects are discussed, emphasizing the prospects for fuller VLSI integration of low-power digital radio, for applications such as in-building wireless radio receivers. The main concern is with the front end of the receiver, including continuous-time analog and sampled analog VLSI filtering, and technologies that can mix analog and digital on the same chip. Prospects for the use of bipolar complementary metal-oxide semiconductor (BiCMOS) technology in communications are examined. Continuous-time monolithic filtering is discussed. As an example of a central receiver/transmitter component that one would like to integrate monolithically, the frequency synthesizer is considered     

Speedup and buffer division in input/output queuing ATM switches

The capacity of a switch is built out of two factors: space parallelism and speedup. A switch has space parallelism if more than one input port can transmit simultaneously. Speedup is the ratio of the switch's internal link speed over the incoming link speed. An input-queuing switch uses only the first factor (space parallelism), and a share-medium or a share-memory output queuing switch uses only the second factor (speedup). However, to build a large switch, both factors are normally used. A large switch's capacity can be built with less space parallelism (the space factor), but more speedup (the time factor), or vise versa. Buffers are needed at both the input and the output ports. In this paper, we show how to divide the buffers between the input and the output queues and how the optimal division is affected by the (space, time) combinations.     

A statistical feedforward/fedback buffer control for thetransmission of digital video signals compressed by DCT-based intrafieldcoding

A new buffer-control policy for intrafield coding of video signals is presented. This method employs two statistical bit rate predictors-feedback and feedforward. It uses a feedback predictor in stationary portions of an image sequence and a feedforward predictor at scene changes. It is shown that this buffer-control policy is reasonably simple to implement and can effectively control output bit rate even at scene changes.     

High-speed buffer management for 40 gb/s-based photonic packet switches

We develop a method of high-speed buffer management for output-buffered photonic packet switches. The use of optical fiber delay lines is a promising solution to constructing optical buffers. The buffer manager determines packet delays in the fiber delay line buffer before the packets arrive at the buffer. We propose a buffer management method based on a parallel and pipeline processing architecture consisting of (log/sub 2/N+1) pipeline stages, where N is the number of ports of the packet switch. This is an expansion of a simple sequential scheduling used to determine the delays of arriving packets. Since the time complexity of each processor in the pipeline stages is O(1), the throughput of this buffer management is N times larger than that of the sequential scheduling method. This method can be used for buffer management of asynchronously arriving variable-length packets. We show the feasibility of a buffer manager supporting 128 /spl times/ 40 Gb/s photonic packet switches, which provide at least eight times as much throughput as the latest electronic IP routers. The proposed method for asynchronous packets overestimates the buffer occupancy to enable parallel processing. We show through simulation experiments that the degradation in the performance of the method resulting from this overestimation is quite acceptable.     

Charge injection in analog MOS switches

Charge injection in MOS analog switches, also called pass transistors or transmission gates, is approached by using the continuity equation. Experimental results show the negligible influence of substrate current which leads to a unidimensional model. An easy-to-handle simplified model is deduced and its predictions compared to the injection obtained by measurements. It is shown that this model, which can be used to implement various strategies to reduce charge injection, is valid in any realistic situation.