Comparison of the top-down and bottom-up approach to fabricate nanowire-based silicon/germanium heterostructures

Silicon nanowires (NWs) and vertical nanowire-based Si/Ge heterostructures are expected to be building blocks for future devices, e.g. field-effect transistors or thermoelectric elements. In principle two approaches can be applied to synthesise these NWs: the ‘bottom-up’ and the ‘top-down’ approach. The most common method for the former is the vapour-liquid-solid (VLS) mechanism which can also be applied to grow NWs by molecular beam epitaxy (MBE). Although MBE allows a precise growth control under highly reproducible conditions, the general nature of the growth process via a eutectic droplet prevents the synthesis of heterostructures with sharp interfaces and high Ge concentrations. We compare the VLS NW growth with two different top-down methods: The first is a combination of colloidal lithography and metal-assisted wet chemical etching, which is an inexpensive and fast method and results in large arrays of homogenous Si NWs with adjustable diameters down to 50 nm. The second top-down method combines the growth of Si/Ge superlattices by MBE with electron beam lithography and reactive ion etching. Again, large and homogeneous arrays of NWs were created, this time with a diameter of 40 nm and the Si/Ge superlattice inside.     

Growth, defect formation, and morphology control of germanium-silicon semiconductor nanowire heterostructures

By the virtue of the nature of the vapor-liquid-solid (VLS) growth process in semiconductor nanowires (NWs) and their small size, the nucleation, propagation, and termination of stacking defects in NWs are dramatically different from that in thin films. We demonstrate germanium-silicon axial NW heterostructure growth by the VLS method with 100% composition modulation and use these structures as a platform to understand how defects in stacking sequence force the ledge nucleation site to be moved along or pinned at a single point on the triple-phase circumference, which in turn determines the NW morphology. Combining structural analysis and atomistic simulation of the nucleation and propagation of stacking defects, we explain these observations based on preferred nucleation sites during NW growth. The stacking defects are found to provide a fingerprint of the layer-by-layer growth process and reveal how the 19.5° kinking in semiconductor NWs observed at high Si growth rates results from a stacking-induced twin boundary formation at the NW edge. This study provides basic foundations for an atomic level understanding of crystalline and defective ledge nucleation and propagation during [111] oriented NW growth and improves understanding for control of fault nucleation and kinking in NWs.     

Growth of high-density titanium silicide nanowires in a single direction on a silicon surface

Understanding the growth mechanisms of nanowires is essential for their successful implementation in advanced devices applications. In situ ultrahigh-vacuum transmission electron microscopy has been applied to elucidate the interaction mechanisms of titanium disilicide nanowires (TiSi2 NWs) on Si(111) substrate. Two phenomena were observed: merging of the two NWs in the same direction, and collapse of one NW on a competing NW in a different direction when they meet at the ends. On the other hand, as one NW encounters the midsection of the other NW in a different direction, it recedes in favor of bulging of the other NW at the midsection. Since crystallographically the nanowires are favored to grow on Si(110) only in the [1 -1 0] direction, this crucial information has been fruitfully exploited to focus on the growth of a high density of long and high-aspect-ratio Ti silicide NWs parallel to the surface on Si(110) in a single direction. The achievement in growth of high-density NWs in a single direction represents a significant advance in realizing the vast potential for applications of silicide NWs in nanoelectronics devices.     

Semi-transparent,flexible, and electrically conductive silicon mesh by capillarity-driven welding of vapor-liquid-solid-grown nanowires over large areas

Bottom-up synthesis of semiconductor nanowires (NWs) by the vapor-liquid-solid (VLS) mechanism has enabled diverse technological applications for these nanomaterials. Unlike metallic NWs, however, it has been challenging to form large-area interconnected NW networks. Here, we generate centimeter-scale meshes of mechanically and electrically interconnected Si NWs by sequentially growing, collapsing, and joining the NWs using a capillarity-driven welding mechanism. We fabricate meshes from VLS-grown NWs ranging in diameter from 20 to 100 nm and find that the meshes are three-dimensional with a thickness ranging from ~ 1 to ~ 10 microns depending on the NW diameter. Optical extinction measurements reveal that the networks are semi-transparent with a color that depends on the absorption and scattering characteristics of individual NWs. Moreover, active voltage contrast imaging of both centimeter- and micron-scale meshes reveals widespread electrical connectivity. Using a sacrificial layer, we demonstrate that the mesh can be liberated from the growth substrate, yielding a highly flexible and transparent film. Electrical transport measurements both on the growth substrate and on liberated, flexible films reveal electrical conduction across a centimeter scale with a sheet resistance of ~ 160–180 kΩ/square that does not change significantly upon bending. Given the ability to encode complex functionality in semiconductor NWs through the VLS process, we believe these meshes of networked NWs could find application as neuromorphic memory, electrode scaffolds, and bioelectronic interfaces.

     

Growth of SiO(x) nanowires by laser ablation

Amorphous SiO(x) nanowires (NWs) were synthesized using laser ablation of silicon-containing targets. The influence of various parameters such as target composition, substrate type, substrate temperature and carrier gas on the growth process was studied. The NWs were characterized using high resolution scanning and transmission electron microscopes (HRSEM and HRTEM) with their attachments: electron dispersive spectroscopy (EDS) and energy electron loss spectroscopy (EELS). A metal catalyst was found essential for the NW growth. A growth temperature higher than 1000?°C was necessary for the NW formation using an Ar-based carrier gas at 500?Torr. The use of Ar-5%H(2) instead of pure Ar resulted in a higher yield and longer NWs. Application of a diffusion barrier on top of the Si substrate guaranteed the availability of metal catalyst droplets on the surface, essential for the NW growth. Ni was found to be a better catalyst than Au in terms of the NW yield and length. Two alternative sequences for the evolution of the amorphous SiO(x) NWs were considered: (a)?the formation of Si NWs first and their complete oxidation afterwards, which seems to be doubtful, (b)?the direct formation of SiO(x) NWs, which is more likely to occur. The direct formation mechanism was proposed to advance in three stages: preferential adsorption of SiO(x) clusters on the catalyst surface first, a successive surface diffusion to the catalyst droplet lower hemisphere, and finally the formation and growth of the NW between the catalyst and the substrate.     

Metastable Ge1-xCx alloy nanowires

Carbon-containing alloy materials such as Ge(1-x)C(x) are attractive candidates for replacing silicon (Si) in the semiconductor industry. The addition of carbon to diamond lattice not only allows control over the lattice dimensions, but also enhances the electrical properties by enabling variations in strain and compositions. However, extremely low carbon solubility in bulk germanium (Ge) and thermodynamically unfavorable Ge-C bond have hampered the production of crystalline Ge(1-x)C(x) alloy materials in an equilibrium growth system. Here we successfully synthesized high-quality Ge(1-x)C(x) alloy nanowires (NWs) by a nonequilibrium vapor-liquid-solid (VLS) method. The carbon incorporation was controlled by NW growth conditions and the position of carbon atoms in the Ge matrix (at substitutional or interstitial sites) was determined by the carbon concentration. Furthermore, the shrinking of lattice spacing caused by substitutional carbon offered the promising possibility of band gap engineering for photovoltaic and optoelectronic applications.     

ZnO nanowire co-growth on SiO2 and C by carbothermal reduction and vapour advection

Vertically aligned ZnO nanowires (NWs) were grown on Au-nanocluster-seeded amorphous SiO(2) films by the advective transport and deposition of Zn vapours obtained from the carbothermal reaction of graphite and ZnO powders. Both the NW volume and visible-to-UV photoluminescence ratio were found to be strong functions of, and hence could be tailored by, the (ZnO+C) source-SiO(2) substrate distance. We observe C flakes on the ZnO NWs/SiO(2) substrates which exhibit short NWs that developed on both sides. The SiO(2) and C substrates/NW interfaces were studied in detail to determine growth mechanisms. NWs on Au-seeded SiO(2) were promoted by a rough ZnO seed layer whose formation was catalysed by the Au clusters. In contrast, NWs grew without any seed on C. A correlation comprising three orders of magnitude between the visible-to-UV photoluminescence intensity ratio and the NW volume is found, which results from a characteristic Zn partial pressure profile that fixes both O deficiency defect concentration and growth rate.     

Mass Transport Determined Silica Nanowires Growth on Spherical Photonic Crystals with Nanostructure‐Enabled Functionalities

A robust and facile method has been developed to obtain directional growth of silica nanowires (SiO₂NWs) by regulating mass transport of silicon monoxide (SiO) vapor. SiO₂NWs are grown by vapor–liquid–solid (VLS) process on a surface of gold‐covered spherical photonic crystals (SPCs) annealed at high temperature in an inert gas atmosphere in the vicinity of a SiO source. The SPCs are prepared from droplet confined colloidal self‐assembly. SiO₂NW morphology is governed by diffusion‐reaction process of SiO vapor, whereby directional growth of SiO₂NWs toward the low SiO concentration is obtained at locations with a high SiO concentration gradient, while random growth is observed at locations with a low SiO concentration gradient. Growth of NWs parallel to the supporting substrate surface is of great importance for various applications, and this is the first demonstration of surface‐parallel growth by controlling mass transport. This controllable NW morphology enables production of SPCs covered with a large number of NWs, showing multilevel micro‐nano feature and high specific surface area for potential applications in superwetting surfaces, oil/water separation, microreactors, and scaffolds. In addition, the controllable photonic stop band properties of this hybrid structure of SPCs enable the potential applications in photocatalysis, sensing, and light harvesting.     

Selective area growth of GaN nanowires using metalorganic chemical vapor deposition on nano-patterned Si(111) formed by the etching of nano-sized Au droplets

We report on the selective area growth of GaN nanowires (NWs) on nano-patterned Si(111) substrates by metalorganic chemical vapor deposition. The nano-patterns were fabricated by the oxidation of Si followed by the etching process of Au nano-droplets. The size of formed nano-pattern on Si(111) substrate was corresponding to the size of Au nano-droplet, and the diameter of GaN NWs grown was similar to the diameter of fabricated nano-pattern. The interesting phenomenon of using the nano-patterned Si(111) substrates is the formation of very clear substrate surface even after the growth of GaN NWs. However, in the case of GaN NWs grown using Au nano-droplets, there was several nanoparticles including GaN bulk grains on the Si(111) substrates. The smooth surface morphology of nano-patterned Si(111) substrates was attributed to the presence of SiO₂ layer which prevents the formation of unnecessary GaN particles during the GaN NW growth. Therefore, we believe that nano-patterning method of Si(111) which was obtained by the oxidation of Si(111) substrate and subsequent Au etching process can be utilized to grow high-quality GaN NWs and its related nano-device applications.     

Growth of Ge-Si nanowire heterostructures via chemical vapor deposition

The growth of Ge-Si and Ge-Si nanowire (NW) heterostructures was demonstrated via chemical vapor deposition. Due to the influence of interface energy, differing topographies of the heterostructures were observed. On initially grown Ge NWs, numerous Si NW branches were grown near the tip due to Au migration. However, on initially grown Si NWs, high-density Ge nanodots were observed.     

Faceting mechanisms of Si nanowires and gold spreading

We report detailed structural analysis of 〈111〉 oriented silicon nanowires (NWs) grown by UHV–CVD using the VLS process with a gold catalyst. STEM-HAADF observations have revealed an unexpected inhomogeneous distribution of gold nanoclusters on the NW surface. Gold is mainly distributed on three sides among the six {112}-sidewalls and is anchored on upward {111} facets. This original observation brought us a new comprehension of the faceting mechanisms. The stability of the 〈111〉 growth direction needs the formation of facets on {112}-sidewalls with energetically favorable planes. We demonstrate that the initial formation of covered facets with a three-fold symmetry is driven by the formation of {111} Au/Si interfaces between the nucleated Si NW and the Au droplet.     

The growth mechanism for silicon oxide nanowires synthesized from an Au nanoparticle/polyimide/Si thin film stack

During pyrolysis of polyimide (PI) thin film, amorphous silicon oxide nanowires (SiO(x)NWs) were produced on a large scale through heat treatment of an Au nanoparticle/PI/Si thin film stack at 1000?°C. It was shown that carbonization of the PI film preceded the nucleation of the SiO(x)NWs. The formation of the SiO(x)NWs was sustained by the oxygen derived from carbonization of the polyimide thin film while Si was provided from the substrate. Au nanoparticles promoted the SiO(x)NW growth by inducing localized melting of the Si substrate and by catalyzing the nanowire growth.     

Physical consequences of the equivalence of conditions for the steady-state growth of nanowires and the nucleation on triple phase line

A new theoretical model describing the steady-state growth and crystalline structure of semiconductor nanowires (NWs) is proposed and its physical consequences are considered. It is demonstrated that the Nebol’sin-Shchetinin condition (nonwetting of the NW side surface by the liquid drop) necessary for the steady-state growth of NWs according to the vapor-liquid-solid (VLS) mechanism is equivalent to the Glas condition of nucleation on the triple phase line for the monocentric NW growth. An energy criterion for the steady-state growth of NWs is formulated in the general case of faceted NW side surface. Effective surface energies are found that determine the activation barrier for nucleation at the NW top. Based on the proposed model, the issue of determining the III–V semiconductor NW crystal structure (cubic zinc blende type versus hexagonal wurtzite type) is considered. In particular, it is shown that a decrease in the surface energy of a catalyst must lead to the predominant formation of a cubic phase, which is confirmed by experimental data on the growth of GaAs nanowires according to the VLS mechanism with Au and Ga catalysts.     

Electrical transport of bottom-up grown single-crystal Si(1-x)Ge(x) nanowire

In this work, we fabricated an Si(1-x)Ge(x) nanowire (NW) metal-oxide-semiconductor field-effect transistor (MOSFET) by using bottom-up grown single-crystal Si(1-x)Ge(x) NWs integrated with HfO(2) gate dielectric, TaN/Ta gate electrode and Pd Schottky source/drain electrodes, and investigated the electrical transport properties of Si(1-x)Ge(x) NWs. It is found that both undoped and phosphorus-doped Si(1-x)Ge(x) NW MOSFETs exhibit p-MOS operation while enhanced performance of higher I(on)～100?nA and I(on)/I(off)～10(5) are achieved from phosphorus-doped Si(1-x)Ge(x) NWs, which can be attributed to the reduction of the effective Schottky barrier height (SBH). Further improvement in gate control with a subthreshold slope of 142?mV?dec(-1) was obtained by reducing HfO(2) gate dielectric thickness. A comprehensive study on SBH between the Si(1-x)Ge(x) NW channel and Pd source/drain shows that a doped Si(1-x)Ge(x) NW has a lower effective SBH due to a thinner depletion width at the junction and the gate oxide thickness has negligible effect on effective SBH.     

Composition and local strain mapping in Au-catalyzed axial Si/Ge nanowires

For most applications, heterostructures in nanowires (NWs) with lattice mismatched materials are required and promise certain advantages thanks to lateral strain relaxation. The formation of Si/Ge axial heterojunctions is a challenging task to obtain straight, defect free and extended NWs. And the control of the interface will determine the future device properties. This paper reports the growth and analysis of NWs consisting of an axial Si/Ge heterostructure grown by a vapor-liquid-solid process. The composition gradient and the strain distribution at the heterointerface were measured by advanced quantitative electron microscopy methods with a resolution at the nanometer scale. The transition from pure Ge to pure Si shows an exponential slope with a transition width of 21?nm for a NW diameter of 31?nm. Although diffuse, the heterointerface makes possible strain engineering along the axis of the NW. The interface is dislocation-free and a tensile out-of-plane strain is noticeable in the Ge section of the NW, indicating a lattice accommodation. Experimental results were compared to finite element calculations.     

Germanium nanowires with 3-nm-diameter prepared by low temperature vapour-liquid-solid chemical vapour deposition

We report the growth of germanium nanowires (Ge NWs) with single-step temperature method via vapour-liquid-solid (VLS) mechanism in the low pressure chemical vapour deposition (CVD) reactor at 300 degrees C, 280 degrees C, and 260 degrees C. The catalyst used in our experiment was Au nanoparticles with equivalent thicknesses of 0.1 nm (average diameter approximately 3 nm), 0.3 nm (average diameter approximately 4 nm), 1 nm (average diameter approximately 6 nm), and 3 nm (average diameter approximately 14 nm). The Gibbs-Thomson effect was used to explain our experimental results. The Ge NWs grown at 300 degrees C tend to have tapered structure while the Ge NWs grown at 280 degrees C and 260 degrees C tend to have straight structure. Tapering was caused by the uncatalysed deposition of Ge atoms via CVD mechanism on the sidewalls of nanowire and significantly minimised at lower temperature. We observed that the growth at lower temperature yielded Ge NWs with smaller diameter and also observed that the diameter and length of Ge NWs increases with the size of Au nanoparticles for all growth temperatures. For the same size of Au nanoparticles, Ge NWs tend to be longer with a decrease in temperature. The Ge NWs grown at 260 degrees C from 0.1-nm-thick Au had diameter as small as approximately 3 nm, offering an opportunity to fabricate high-performance p-type ballistic Ge NW transistor, to realise nanowire solar cell with higher efficiency, and also to observe the quantum confinement effect.     

Growth time-dependent density and surface evolution of silicon nanowires in a vapor-liquid-solid process

Single crystalline silicon nanowires (SiNWs) were grown on Si(100) substrate using a gold (Au)-catalyzed vapor-liquid-solid (VLS) approach. The dependence of the growth time (i.e., the time of exposure to the Si source) on the density and surface evolution of the grown SiNWs is considered. It was observed that the density of grown SiNWs on Si substrate increased with increasing growth time. The highest density (approximately 1.1 x 10(6) mm(-2)) was reached at 4 hr. Upon further exposure to the Si source, we observed that the density was maintained for up to 9 hr. We suggest that the increased Si chemical potential in Au-Si droplets with increased growth time enhanced the SiNW growth rate at the interfaces between Au-Si droplets and SiNWs, and enhanced the transition of the NWs from the existing Au-Si droplets onto Si substrate. This allows the SiNW density to increase with increased growth time of up to 4 hr. Moreover, we examined the influence of the growth time on surface evolution including Au diffusion, facet and taper formation, and vapor-solid (VS) growth of the SiNWs. To explain the behavior of the grown SiNWs in the VLS process, we propose a combined model using the VLS and VS growth mechanisms.     

Observation of hole accumulation in Ge/Si core/shell nanowires using off-axis electron holography

Hole accumulation in Ge/Si core/shell nanowires (NWs) has been observed and quantified using off-axis electron holography and other electron microscopy techniques. The epitaxial [110]-oriented Ge/Si core/shell NWs were grown on Si (111) substrates by chemical vapor deposition through the vapor-liquid-solid growth mechanism. High-angle annular-dark-field scanning transmission electron microscopy images and off-axis electron holograms were obtained from specific NWs. The excess phase shifts measured by electron holography across the NWs indicated the presence of holes inside the Ge cores. Calculations based on a simplified coaxial cylindrical model gave hole densities of (0.4 ± 0.2) /nm(3) in the core regions.     

Lateral self-aligned p-type In2O3 nanowire arrays epitaxially grown on Si substrates

Lateral orientated growth of In2O3 nanowire (NW) and nanorod (NR) arrays has been achieved by a vapor transport and condensation method on (001) and (111) surfaces of Si substrates. The single crystalline In2O3 NWs and NRs were grown along [211] in parallel to the Si +/-[110] and lying in the substrate plane. The electrical measurements show that the In2O3 NWs are p-type semiconductor. By N+ doping, the resistivity of the In2O3 NWs has been tuned. The lateral self-aligned In2O3 NW and NR arrays on Si can offer some unique advantages for fabricating parallel nanodevices that can be integrated directly with silicon technology.     

Influence of O contamination and Au cluster properties on the structural features of Si nanowires

Silicon nanowires (Si NWs) are the emerging nanostructures for future nanodevices. In this work we have prepared them by electron beam evaporation (EBE) through the vapor-liquid-solid (VLS) mechanism. We discuss the growth of epitaxial NWs by EBE and the possibility to control their orientation and length by changing the experimental conditions. Moreover, the effects of the surface contamination and of the Au cluster preparation on the NWs structural properties and density will be discussed. We demonstrate that any O contamination has to be avoided since just a very thin native SiO₂ layer stops ad-atom diffusion on the surface and inhibits the NWs growth. Au cluster preparation has a determinant role too: by varying the procedure for their formation, it is possible to change NWs density and length. In particular, we observed that by evaporating Au on the heated substrate, the droplets active to promote NW growth are immediately formed and a faster growth process starts. The growth rate is about a factor of 4 times higher than in the sample where the Au is evaporated at room temperature and the cluster formed after a subsequent thermal annealing. On the contrary, the slower process allows the atom arrangement and ordering in an epitaxial manner, and a precise control of NW orientation can be achieved.