A 1-17-GHz InGaP-GaAs HBT MMIC analog multiplier and mixer with broad-band input-matching networks

An InGaP-GaAs heterojunction bipolar transistor (HBT) analog multiplier/mixer monolithic microwave integrated circuit (MMIC) is developed that adopts a Gilbert-cell multiplier with broad-band input-matching networks to widen the bandwidth up to 17 GHz. This MMIC was fabricated using a commercially available 6-in InGaP-GaAs HBT MMIC process. It achieved a measured sensitivity of above 1100 V/W for an analog multiplier and a conversion gain of better than 9 dB for a mixer. It also demonstrated a lower corner frequency and noise than that of an InP HBT analog multiplier. The measured low-frequency noise was 10 nV/sqrt(Hz), which is about half of that of an InP HBT analog multiplier with a similar architecture. The corner frequency of the low-frequency noise was roughly estimated to be 15 kHz. The measured performance of this MMIC chip with gain-bandwidth-product (GBP) of 47 GHz rivals that of the reported GaAs-based analog multipliers and mixers. The high GBP result achieved by this chip is attributed to the HBT device performance and the broad-band input-matching network.     

20-GHz 5-dB-gain analog multipliers with AlGaAs/GaAs HBTs

From-DC-to-above-20-GHz monolithic Gilbert cell analog multipliers have been developed using AlGaAs/GaAs HBT technology. As a double balanced active mixer, it exhibits very high conversion gain of above +5 dB with extremely high LO-IF isolation of 33 dB for RF/LO inputs up to 20 GHz. It exhibits conversion gain of +9 dB for 5 GHz RF/LO inputs. As a double balanced upconverter, it exhibits positive conversion gain with high LO-RF isolation of 23 dB for RF output up to 8.5 GHz. As a detection mixer in coherent optical heterodyne receivers, it can operate for RF/LO inputs up to 15 GHz under a less than -7.5 dBm LO input condition     

Broad-band MMICs based on modified loss-compensation method using 0.35-/spl mu/m SiGe BiCMOS technology

Using the concept of loss compensation, novel broad-band monolithic microwave integrated circuits (MMICs), including an amplifier and an analog multiplier/mixer, with LC ladder matching networks in a commercial 0.35-mum SiGe BiCMOS technology are demonstrated for the first time. An HBT two-stage cascade single-stage distributed amplifier (2-CSSDA) using the modified loss-compensation technique is presented. It demonstrates a small-signal gain of better than 15 dB from dc to 28 GHz (gain-bandwidth product=157 GHz) with a low power consumption of 48 mW and a miniature chip size of 0.63 mm² including testing pads. The gain-bandwidth product of the modified loss-compensated CSSDA is improved approximately 68% compared with the conventional attenuation-compensation technique. The wide-band amplifier achieves a high gain-bandwidth product with the lowest power consumption and smallest chip size. The broad-band mixer designed using a Gilbert cell with the modified loss-compensation technique achieves a measured power conversion gain of 19 dB with a 3-dB bandwidth from 0.1 to 23 GHz, which is the highest gain-bandwidth product of operation among previously reported MMIC mixers. As an analog multiplier, the measured sensitivity is better than 3000 V/W from 0.1 to 25 GHz, and the measured low-frequency noise floor and corner frequency can be estimated to be 20 nV/sqrt(Hz) and 1.2 kHz, respectively. The mixer performance represents state-of-the-art result of the MMIC broad-band mixers using commercial silicon-based technologies     

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

This paper presents the design and performance characteristics of a 20-40 GHz monolithic double-balanced direct conversion mixer implemented using InGaP/GaAs HBT process. The compact MMIC mixer makes use of a Gilbert-cell multiplier and utilizes a broadband monolithic passive balun that has been developed for MMIC applications. The new balun makes use of multidielectric layer structure to achieve a broadband performance in a simple coplanar configuration. A measured return loss better than 15 dB, with a maximum insertion loss of 4.5 dB including the 3-dB power splitting loss has been achieved over the band from 15 to 45 GHz. Operated as a downconverter mixer, the newly developed direct conversion mixer achieves a measured conversion gain of 16 dB given an RF signal at 30 GHz, LO drive of 5 dBm and a downconverted baseband signal at 10 MHz. The mixer IP3 occurs at an output power of 4 dBm while the IP2 occurs at an output power of 11 dBm.     

A 5.2-GHz GaInP/GaAs HBT double-quadrature downconverter with polyphase filters for 40-dB image rejection

A 5.2-GHz 11-dB gain, IP/sub 1 dB/=-17 dBm and IIP/sub 3/=-10 dBm double-quadrature Gilbert downconversion mixer with polyphase filters is demonstrated by using GaInP/GaAs heterojunction bipolar transistor (HBT) technology. The image rejection ratio is better than 40 dB when LO=5.17 GHz and intermediate frequency (IF) is in the range of 15 MHz to 40 MHz. The Gilbert downconverter has four-stage RC-CR IF polyphase filters for image rejection. Polyphase filters are also used to generate local (LO) and radio frequency (RF) quadrature signals around 5 GHz in the double-quadrature downconverter because GaAs has accurate thin film resistors and the low parasitic semi-insulating substrate.     

Compact 28-GHz subharmonically pumped resistive mixer MMIC using a lumped-element high-pass/band-pass balun

This work reports a novel lump-element balun for use in a miniature monolithic subharmonically pumped resistive mixer (SPRM) microwave monolithic integrated circuit. The proposed balun is simply analogous to the traditional Marchand balun. The coupled transmission lines are replaced by lump elements, significantly reducing the size of the balun. This balun requires no complicated three-dimensional electromagnetic simulations, multilayers or suspended substrate techniques; therefore, the design parameters are easily calculated. A 2.4-GHz balun is demonstrated using printed circuit board technology. The measurements show that the outputs of balun with high-pass and band-pass responses, a 1-dB gain balance, and a 5/spl deg/ phase balance from 1.7 to 2.45 GHz. The balun was then applied in the design of a 28-GHz monolithic SPRM. The measured conversion loss of the mixer was less than 11dB at a radio frequency (RF) bandwidth of 27.5-28.5 GHz at a fixed 1 GHz IF, a local oscillator (LO)-RF isolation of over 35 dB, and a 1-dB compression point higher than 9 dBm. The chip area of the mixer is less than 2.0 mm/sup 2/.     

InAlAs/InGaAs HBT X-band double-balanced upconverter

We report on an InAlAs/InGaAs HBT Gilbert cell double-balanced mixer which upconverts a 3 GHz IF signal to an RF frequency of 5-12 GHz. The mixer cell achieves a conversion loss of between 0.8 dB and 2.6 dB from 5 to 12 GHz. The LO-RF and IF-RF isolations are better than 30 dB at an LO drive of +5 dBm across the RF band. A pre-distortion circuit is used to increase the linear input power range of the LO port to above +5 dBm. Discrete amplifiers designed for the IF and RF frequency ports make up the complete upconverter architecture which achieves a conversion gain of 40 dB for an RF output bandwidth of 10 GHz. The upconverter chip set fabricated with InAlAs/InGaAs HBT's demonstrates the widest gain-bandwidth performance of a Gilbert cell based upconverter compared to previous GaAs and InP HBT or Si-bipolar IC's     

GaAs heterojunction bipolar transistor device and IC technology forhigh-performance analog and microwave applications

GaAs-AlGaAs n-p-n heterojunction bipolar transistor (GaAs HBT) technology and its application to analog and microwave functions for high-performance military and commercial systems are discussed. In many applications the GaAs HBT offers key advantages over the alternative advanced silicon bipolar and III-V compound field-effect-transistor (FET) approaches. TRW's GaAs HBT device and IC fabrication process, basic HBT DC and RF performance, examples of applications, and technology qualification work are presented and serve as a basis for addressing general capability issues. A related 3-μm emitter-up, self-aligned HBT IC process provides excellent DC and RF performance, with simultaneous gain-bandwidth product, f_T, and maximum frequency of oscillation, f_max, of approximately 20-40 GHz and DC current gain β≈50-100 at useful collector current densities ≈3-10 kA/cm², early voltage ≈500-1000 V, and MSI-LSI integration levels. These capabilities facilitate versatile DC-20-GHz analog/microwave as well as 3-6 Gb/s digital applications, 2-3 G sample/s A/D conversion, and single-chip multifunctions with producibility     

A 17.1-17.3-GHz image-reject downconverter with phase-tunable LO using 3/spl times/ subharmonic injection locking

A 17-GHz RF receiver, consisting of a low-noise amplifier (LNA) and doubly balanced mixers coupled by a monolithic 3.7:1 step-down transformer, realizes over 75 dB of image rejection in a production 100-GHz f/sub T/ SiGe BiCMOS technology. A new coupling transformer winding improves the magnetic coupling coefficient by more than 20% compared to conventional designs, which reduces parasitic effects and increases the overall efficiency of the LNA/mixer combination. Quadrature LO signals with electronically tunable phase are generated by a subharmonically injection-locked oscillator. The measured receiver IIP3 is -5.1 dBm with 17.3-dB conversion gain and 6.5-dB noise figure (SSB 50 /spl Omega/) at 17.2 GHz. The 1.9/spl times/1.0 mm/sup 2/ IC consumes 62.5 mW from a 2.2-V supply.     

Size Reduction of a MMIC Direct Up-Converter at 44 GHz in Multilayer CPW Technology Using Thin-Film Microstrip Stubs Loading

This paper proposes a novel compact multilayer 44.5-GHz coplanar waveguide (CPW) single-sideband (SSB) subharmonically pumped (SHP) mixer for direct up-conversion GaAs monolithic microwave integrated circuit. It uses previously developed thin-film microstrip (TFMS) and CPW structures for capacitive and inductive loading techniques to drastically reduce its size. The SSB SHP mixer uses 50-MHz in-phase and quadrature signals to directly modulate the second harmonic of a 22.25-GHz carrier to produce the required 44.55-GHz RF output. Two pairs of antiparallel diodes reduce feedthrough of the fundamental 22.25-GHz signal to the RF output while novel CPW/TFMS-based structures provide matching. This 1.2$,times,$1.5$hbox mm^2$chip uses a lumped Wilkinson divider as a local-oscillator divider and a previously developed reduced size 90$^circ$coupler. The SSB SHP mixer acts as an up-converter with a measured conversion gain of$-hbox 10pm hbox 1 ~hbox dB$and the lower sideband suppression is greater than 23 dB across the RF bandwidth of 43.5–45.5 GHz. Additionally, it is shown that the RF port return loss is better than 20 dB, and 2$,times f _ LO$was suppressed by 21 dB over the same band. The circuit also does not require any dc bias. Compared to the conventional SSB SHP mixer, a 70% reduction in circuit area was achieved with better performances.     

A Novel 94-GHz MHMET-Based Diode Mixer Using a 3–dB Tandem Coupler

We report a high-performance 94-GHz monolithic millimeter-wave integrated-circuit diode mixer using metamorphic high-electron mobility transistor (MHEMT) diodes and a coplanar waveguide tandem coupler. A novel single-balanced structure of diode mixer is proposed in this paper, where a 3-dB tandem coupler with two sections of parallel-coupled line and air-bridge crossover structures are used for wide frequency operation. The fabricated mixer exhibits excellent local oscillator–radio-frequency (LO–RF) isolation, greater than 30 dB, in the 5-GHz bandwidth of 91–96 GHz. A good conversion loss of 7.4 dB is measured at 94 GHz. The proposed MHEMT-based diode mixer shows superior LO–RF isolation and conversion loss to those of the W-band mixers reported to date.      

35-nm InP HEMT SMMIC Amplifier With 4.4-dB Gain at 308 GHz

rdquoWe report the first submillimeter-wave monolithic microwave integrated circuit (MMIC) amplifier with 4.4-dB measured gain at 308-GHz frequency, making it the highest frequency MMIC amplifier reported to date. In this letter, a 35-nm InP high-electron mobility transistor process has been successfully developed with a projected maximum available gain of greater than 7 dB at 300 GHz. The excellent dc and RF performance makes it suitable for applications at frequencies well into the millimeter-wave band and, for the first time, in the submillimeter- wave band as well.     

5-GHz CMOS radio transceiver front-end chipset

Incorporating the direct-conversion architecture, a 5-GHz band radio transceiver front end chipset for wireless LAN applications is implemented in a 0.25-μm CMOS technology. The 4-mm² 5.25-GHz receiver IC contains a low noise amplifier with 2.5-dB noise figure (NF) and 16-dB power gain, a receive mixer with 12.0 dB single sideband NF, 13.7-dB voltage gain, and -5 dBm input 1-dB compression point. The 2.7-mm² transmitter IC achieves an output 1-dB compression of -2.5 dBm at 5.7 GHz with 33.4-dB (image) sideband rejection by using an integrated quadrature voltage-controlled oscillator. Operating from a 3-V supply, the power consumptions for the receiver and transmitter are 114 and 120 mW, respectively     

A 2.7-V 900-MHz/1.9-GHz dual-band transceiver IC for digitalwireless communication

A 2.7-V 900-MHz/1.9-GHz dual-band transceiver IC consisting of receive, transmit, and local oscillator (LO) sections is presented. The transmit section achieves an unwanted sideband suppression of -43 dBc, LO leakage of -59 dBc, and third-order spurious rejection of -70 dBc. The transmit output noise level is -165 dBc/Hz at a 20-MHz offset from the carrier. The on-chip very high-frequency oscillator has a phase-noise level of -106 dBc/Hz at 100-kHz offset when operating at 800 MHz. The receive section has 36 dB of gain with 36 dB of gain range in 12-dB steps. The transceiver IC has been fabricated using a 25-GHz f_t silicon bipolar process and is designed to operate over a supply-voltage range of 2.7-5.0 V     

A 1.9-GHz silicon receiver with monolithic image filtering

A 1.9-GHz fully monolithic silicon superheterodyne receiver front-end is presented; it consists of a low noise amplifier (LNA), a tunable image reject filter, and a Gilbert cell mixer integrated in one die. The receiver was designed to operate with a 1.9-GHz RF and a 2.2-GHz local oscillator (LO) for a 300-MHz IF. Two chip versions were fabricated on two different fabrication runs using a 0.5-μm bipolar technology with 25 GHz transit frequency (f_T). Measured performance for the receiver front-end version 1, packaged and without input matching, was: conversion gain 33.5 dB, noise figure 4.9 dB, input IP3 -28 dBm, image rejection 53 dB (tuned to reject a 2.5-GHz image frequency), and 15.9 mA current consumption at +3 V. The image rejection was tunable from 2.4-2.63 GHz by means of an on-chip varactor. Version 2 had increased mixer degeneration for improved linearity. Its measured performance for the packaged receiver with its input matched to 50 Ω was: conversion gain 24 dB, noise figure 4.8 dB, input IP3 -19 dBm, and 65 dB image rejection for a 2.5-GHz image with an image tuning range from 2.34-2.55 GHz     

5~6GHz自适应线性化偏置的InGaP/GaAs HBT功率放大器

针对高质量无线局域网的传输需求,设计了一款工作在5~6 GHz的宽带磷化镓铟/砷化镓异质结双极型晶体管(InGaP/GaAs HBT)功率放大器芯片。针对HBT晶体管自热效应产生的非线性和电流不稳定现象,采用自适应线性化偏置技术,有效地解决了上述问题。针对射频系统的功耗问题,设计了改进的射频功率检测电路,以实现射频系统的自动增益控制,降低功耗。通过InGaP/GaAs HBT单片微波集成电路(MMIC)技术实现该功率放大器芯片。仿真结果表明,功放芯片的小信号增益达到32 dB;1 dB压缩点功率为28.5 dBm@5.5 GHz,功率附加效率PAE超过32%@5.5 GHz;输出功率为20 dBm时,IMD3低于-32 dBc。     

Design and Performance of W-Band Broad-Band Integrated Circuit Mixers

Broad-band integrated circuit mixers rising a crossbar suspended stripline configuration and a finline configuration were developed with GaAs beamlead diodes. For the crossbar suspended stripline balanced mixer, less than 7.5-dB conversion loss for 15-GHz instantaneous, IF bandwidth was achieved with the LO at 75 GHz and the RF swept from 76 to 91 GHz. With the LO at 90 GHz, a conversion loss of less than 7.8 dB was achieved over a 14-GHz instantaneous bandwidth as the RF is swept from 92 to 105 GHz. For the finline balanced mixer, a conversion loss of 8 to 12 dB over a 32-GHz instantaneous IF bandwidth was achieved as the RF is swept from 76 to 108 GHz. Integrated circuit building blocks, such as filters, broadside couplers, matching circuits, and varions transitions, were also developed.     

A single-chip GaAs MMIC image-rejection front-end for digitalEuropean cordless telecommunications

An active image-rejection filter is presented in this paper, which applies actively coupled passive resonators. The filter has very low noise and high insertion gain, which may eliminate the use of a low-noise amplifier (LNA) in front-end applications. The GaAs monolithic-microwave integrated-circuit (MMIC) chip area is 3.3 mm² . The filter has 12-dB insertion gain, 45-dB image rejection, 6.2-dB noise figure, and dissipates 4.3 mA from a 3-V supply. An MMIC mixer is also presented. The mixer applies two single-gate MESFETs on a 2.2-mm² GaAs substrate. The mixer has 2.5-dB conversion gain and better than 8-dB single-sideband (SSB) noise figure with a current dissipation of 3.5 mA applying a single 5-V supply. The mixer exhibits very good local oscillator (LO)/RF and LO/IF isolation of better than 30 and 17 dB, respectively, Finally, the entire front-end, including the LNA, image rejection filter, and mixer functions is realized on a 5.7-mm ² GaAs substrate. The front-end has a conversion gain of 15 dB and an image rejection of more than 53 dB with 0-dBm LO power. The SSB noise figure is better than 6.4 dB, The total power dissipation of the front-end is 33 mW. The MMIC's are applicable as a single-block LNA and image-rejection filter, mixer, and single-block front-end in digital European cordless telecommunications. With minor modifications, the MMIC's can be applied in other wireless communication systems working around 2 GHz, e.g., GSM-1800 and GSM-1900     

A parallel structure for CMOS four-quadrant analog multipliers andits application to a 2-GHz RF downconversion mixer

A parallel structure for a CMOS four-quadrant analog multiplier is proposed and analyzed. By applying differential input signals to a set of combiners, the multiplication function can be implemented. Based on the proposed structure, a low-voltage high-performance CMOS four-quadrant analog multiplier is designed and fabricated by 0.8 μm N-well double-poly-double-metal CMOS technology. Experimental results have shown that, under a single 1.2 V supply voltage, the circuit has 0.89% linearity error and 1.1% total harmonic distortion under the maximum-scale input 500 mV_p-p at both multiplier inputs. The -3 dB bandwidth is 2.2 MHz and the DC current is 2.3 mA. By using the proposed multiplier as a mixer-core and connecting a newly designed output buffer, a CMOS RF downconversion mixer is designed and implemented by 0.5 μm single-poly-double-metal N-well CMOS technology. The experimental results have shown that, under 3 V supply voltage and 2 dBm LO power, the mixer has -1 dB conversion gain, 2.2 GHz input bandwidth, 180 MHz output bandwidth, and 22 dB noise figure. Under the LO frequency 1.9 GHz and the total DC current 21 mA, the third-order input intercept point is +7.5 dBm and the input 1 dB compression point is -9 dBm     

Very-high-speed InP/InGaAs HBT ICs for optical transmission systems

High-speed ICs for 20-40-Gbit/s time-division multiplexing (TDM) optical transmission systems have been designed and fabricated by using InP/InGaAs heterojunction-bipolar-transistor (HBT) technology. This paper describes four analog ICs and four digital ICs: a five-section cascode distributed amplifier with a gain of 9.5 dB and a bandwidth of 50 GHz, a three-section single-end-to-differential converter with a bandwidth of 40 GHz, a cascode differential amplifier with a gain of 10.5 dB and a bandwidth of 64 GHz, a preamplifier with a gain of 41.9 dBΩ and a bandwidth of 39 GHz, a modulator driver with an output voltage swing of 3.2 V peak-to-peak and rise and fall times of 16 and 15 ps, a 40-Gbit/s selector, a 20-Gbit/s D-type flip-flop, and a static frequency divider with an operating range of 2.0-44.0 GHz. All the ICs were measured with on-wafer RF probes