Low temperature fabrication of a ZnO nanoparticle thin-film transistor suitable for flexible electronics

A bottom-gate/top-drain/source contact ZnO nanoparticle thin-film transistor was fabricated using a low temperature annealing process (150 °C) suitable for flexible electronics. Additionally, a high-k resin filled with TiO₂ nanoparticles was used as gate dielectric. After fabrication, the transistors presented almost no hysteresis in the I–V curve, a threshold voltage (V_T) of 2.2 V, a field-effect mobility on the order of 0.1 cm²/V s and an I_ON/I_OFF ratio of about 10⁴. However, the transistor is sensitive to aging effects due to interactions with the ambient air, resulting in current level reduction caused by trapped oxygen at the nanoparticle surface, and an anti-clockwise hysteresis in the transfer curve. It was demonstrated, conjointly, the possible desorption of oxygen by voltage stress and UV light exposure.     

Source/drain metallization effects on the specific contact resistance of indium tin zinc oxide thin film transistors

We report on the specific contact resistance of interfaces between thin amorphous semiconductor Indium Tin Zinc Oxide (ITZO) channel layers and different source/drain (S/D) electrodes (Al, ITO, and Ni) in amorphous oxide thin film transistors (TFTs) at different channel lengths using a transmission line model. All the contacts showed linear current–voltage characteristics. The effects of different channel lengths (200–800 μm, step 200 μm) and the contact resistance on the performance of TFT devices are discussed in this work. The Al/ITZO TFT samples with the channel length of 200 μm showed metallic behavior with a linear drain current-gate voltage (I_D–V_G) curve due to the formation of a conducting channel layer. The specific contact resistance (ρ_C) at the source or drain contact decreases as the gate voltage is increased from 0 to 10 V. The devices fabricated with Ni S/D electrodes show the best TFT characteristics such as highest field effect mobility (16.09 cm²/V·s), ON/OFF current ratio (3.27×10⁶), lowest sub-threshold slope (0.10 V/dec) and specific contact resistance (8.62 Ω·cm² at V_G=0 V). This is found that the interfacial reaction between Al and a-ITZO semiconducting layer lead to the negative shift of threshold voltage. There is a trend that the specific contact resistance decreases with increasing the work function of S/D electrode. This result can be partially ascribed to better band alignment in the Ni/ITZO interface due to the work function of Ni (5.04–5.35 eV) and ITZO (5.00–6.10 eV) being somewhat similar.     

Enhancing charge transport in copper phthalocyanine thin film by elevating pressure of deposition chamber

Copper phthalocyanine (CuPc)-based thin film transistors were fabricated using CuPc films grown under different deposition pressure (P_dep) (ranging from 1.8 × 10⁻⁴ Pa to 1.0 × 10⁻¹ Pa). The transistor performance highly depended on P_dep. A field-effect mobility of 2.1 × 10⁻² cm²/(V s) was achieved under 1.0 × 10⁻¹ Pa. Detailed investigations revealed that P_dep modulates the molecular packing and orientation of the organic films grown on a SiO₂/Si substrate and influences the charge transport. Furthermore, from a device physics point of view, contact resistance of the fabricated transistors decreased when P_dep increased, which was beneficial in reducing energy consumption.     

ZrO2 insulator modified by a thin Al2O3 film to enhance the performance of InGaZnO thin-film transistor

A high-performance InGaZnO (IGZO) thin-film transistor (TFT) with ZrO₂–Al₂O₃ bilayer gate insulator is fabricated. Compared to IGZO-TFT with ZrO₂ single gate insulator, its electrical characteristics are significantly improved, specifically, enhancement of I_on/I_off ratios by one order of magnitude, increase of the field-effect mobility (from 9.8 to 14 cm²/Vs), reduction of the subthreshold swing from 0.46 to 0.33 V/dec, the maximum density of surface states at the channel-insulator interface decreased from 4.3 × 10¹² to 2.5 × 10¹² cm⁻². The performance enhancements are attributed to the suppression of leakage current, smoother surface morphology, and suppression of charge trapping by using Al₂O₃ films to modify the high-k ZrO₂ dielectric.     

Study on mobility enhancement in MOVPE-grown AlGaN/AlN/GaN HEMT structures using a thin AlN interfacial layer

Al_0.26Ga_0.74N/AlN/GaN high-electron-mobility transistor (HEMT) structures with AlN interfacial layers of various thicknesses were grown on 100-mm-diameter sapphire substrates by metalorganic vapor phase epitaxy, and their structural and electrical properties were characterized. A sample with an optimum AlN layer thickness of 1.0 nm showed a highly enhanced Hall mobility (μ_Hall) of 1770 cm²/Vs with a low sheet resistance (ρ_s) of 365 Ω/sq. (2DEG density n_s = 1.0 × 10¹³/cm²) at room temperature compared with those of a sample without the AlN interfacial layer (μ_Hall = 1287 cm²/Vs, ρ_s = 539 Ω/sq., and n_s = 0.9 × 10¹³/cm²). Electron transport properties in AlGaN/AlN/GaN structures were theoretically studied, and the calculated results indicated that the insertion of an AlN layer into the AlGaN/GaN heterointerface can significantly enhance the 2DEG mobility due to the reduction of alloy disorder scattering. HEMTs were successfully fabricated and characterized. It was confirmed that AlGaN/AlN/GaN HEMTs with the optimum AlN layer thickness show superior DC properties compared with conventional AlGaN/GaN HEMTs.     

Benzopyrazine-fused tetracene derivatives: Thin-film formation at the crystalline mesophase for solution-processed hole transporting devices

Benzopyrazine-fused tetracene (TBPy) and its disulfide (TBPyS) bearing alkoxy groups (OCH₃, OC₈H₁₇) were designed and synthesized to obtain π-expanded tetracene derivatives. These derivatives are featured with long-wavelength light absorption property (λ_onset: up to 820 nm), photooxidative stability (half-lives (τ_1/2): 11 times longer than tetracene), and solubility for solution process. The methoxy compounds (TBPy-C1 and TBPyS-C1) were used for single-crystal X-ray crystallographic analysis and single-crystal organic field-effect transistor (OFET) devices showing relationship between packing structures and hole mobilities. The octyloxy compounds (TBPy-C8 and TBPyS-C8) were investigated on solution-processed thin-film formation and hole transport property in thin-film OFET devices. Crystalline mesophase of TBPy-C8 and TBPyS-C8 was characterized by differential scanning calorimetry analysis showing endothermic peaks at 98 and 198 °C on its second heating process and exothermic peaks at 177 and 76 °C on its second cooling process for TBPyS-C8, and played crucial roles in thin-films formation. Hole mobility of 1.7 × 10^?2 cm²/V s (with V_th = ?30 V and I_ON/I_OFF = 10⁴) was obtained for the thin-film OFET device of TBPyS-C8.     

Biaxially aligned YBCO film tapes fabricated by all pulsed laser deposition

Biaxially aligned yttria-stabilized zirconia (YSZ) films on Ni-based alloy substrates were realized with high deposition rate of 0.5 μm min⁻¹ by the inclined substrate deposition (ISD) technique without ion beam assistance. The microstructure of YSZ was examined to study the growth mechanism of biaxial alignment by ISD. Columnar structures toward the plasma plume suggested a self-shadowing effect in the ISD process. To raise I_c values, YBCO thickness was increased up to 5 μm. Thick YBCO films with high J_c values were realized on the ISD-grown YSZ. Long YBCO tapes with biaxial alignment were successfully fabricated using continuous pulsed laser deposition and a high I_c value of 37.0 A (77.3 K, 0 T) at a 75 cm voltage tap spacing was achieved.     

Investigation of deep level defects in copper irradiated bipolar junction transistor

Commercial bipolar junction transistor (2N 2219A, npn) irradiated with 150 MeV Cu¹¹⁺-ions with fluence of the order 10¹² ions cm^?2, is studied for radiation induced gain degradation and deep level defects. I–V measurements are made to study the gain degradation as a function of ion fluence. The properties such as activation energy, trap concentration and capture cross-section of deep levels are studied by deep level transient spectroscopy (DLTS). Minority carrier trap levels with energies ranging from E_C ? 0.164 eV to E_C ? 0.695 eV are observed in the base–collector junction of the transistor. Majority carrier trap levels are also observed with energies ranging from E_V + 0.203 eV to E_V + 0.526 eV. The irradiated transistor is subjected to isothermal and isochronal annealing. The defects are seen to anneal above 350 °C. The defects generated in the base region of the transistor by displacement damage appear to be responsible for transistor gain degradation.     

Channel width effect for organic thin film transistors using TIPS-pentacene employed as a dopant of poly-triarylamine

The effects of the physical channel width on the characteristics of organic thin film transistors (OTFTs), made with 6,13-bis(triisopropyl-silylethynyl)-pentacene (TIPS-pentacene) embedded into poly-triarylamine (PTAA, hole conductor within an active channel), have been examined in this paper. The devices are estimated by measuring the drain-source current (I_DS) for different contact metals such as Au and Ag, at fixed gate and drain voltages. The results show that the threshold voltage (V_T) and I_DS increase with increasing channel width. Furthermore, it has been observed that the field effect mobility is dependent on V_T, which is influenced by the channel width. The OTFTs, produced using Au and Ag contacts, exhibited the highest values of mobility in the saturation regime, namely 5.44 × 10^?2 and 1.33 × 10^?2 cm²/Vs, respectively.     

Preparation of vertically aligned bundles of Mo6S9−xIx (4.5

M. Rangus  M. Remškar  A. Mrzel 《Microelectronics Journal》2008,39(3-4):475-477

High-performance n-type organic field-effect transistors fabricated by ink-jet printing using a C60 derivative

We report on the performance of ink-jet-printed n-type organic thin-film transistors (OTFTs) based on a C₆₀ derivative, namely, C₆₀-fused N-methyl-2-(3-hexylthiophen-2-yl)pyrrolidine (C₆₀TH-Hx). The new devices exhibit excellent n-channel performance, with a highest mobility of 2.8 × 10^?2 cm² V^?1 s^?1, an I_On/I_Off ratio of about 1 × 10⁶, and a threshold voltage of 7 V. The C₆₀TH-Hx films show large crystalline domains that result from the influence of an evaporation-induced flow, thus leading to high electron mobility in the ink-jet-printed devices.     

Performance assessment of (1 1 0) p-FET high-κ/MG: is it mobility or series resistance limited?

In this article the impact of Si-substrate orientation on mobility performance is studied for p-MOSFET’s with both HfSiON and SiON based dielectrics. Consistent with previous studies, the I_on at fixed I_off is 100% larger for Si(1 1 0) larger than for standard Si(1 0 0). A thorough analysis of the factors influencing I_on (EOT, mobility and R_series) for short channel devices (until L_met = 80 nm) indicates that a 200% increase of the mobility at high V_g is the source of this performance enhancement. The lower I_on increase (only 100%) compared to what is expected from the mobility is only explained by a larger impact of the R_series (70% of the total resistance) for short channel devices. As a result additional room for I_on improvement can be reached by device and R_series optimization.     

Bottom gate organic thin-film transistors fabricated by ultraviolet transfer embossing with improved device performance

Ultraviolet transfer embossing is optimized to fabricate bottom gate organic thin-film transistors (OTFTs) on flexible plastic substrates, achieving significant improved device performance (μ = 0.01–0.02cm²/Vs; on/off ratio = 10⁴) compared with the top gate OTFTs made previously by the same method (μ = 0.001–0.002 cm²/Vs; on/off ratio = 10²). The performance improvement can be ascribed to the reduced roughness of the dielectric-semiconductor interface (R_rms = 0.852 nm) and thermally cross-linked PVP dielectric which leads to reduced gate leakage current and transistor off current in the bottom-gated configuration. This technique brings an alternative great opportunity to the high-volume production of economic printable large-area OTFT-based flexible electronics and sensors.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Solution-processed single-crystal perylene diimide transistors with high electron mobility

We have successfully demonstrated a single-crystal field-effect transistors (FETs) based on an asymmetric perylenetetracarboxylic diimide (a-PDI) compound with polystyrene (PS)/SiO₂ bilayer as gate dielectric. The single crystals are in-situ grown on substrate from simple solution evaporation method, thus may be suitable for large area electronics applications. The PS modified gate dielectric could minimize charge trapping by the hydroxyl groups of the SiO₂ surface. The resulting solution processed single crystals transistors are characterized in ambient air, and exhibited maximum electron mobility of ca. 1.2 cm² V⁻¹ s⁻¹ and high I_on:I_off > 10⁵.     

Electrical parameters of a DC sputtered Mo/n-type 6H-SiC Schottky barrier diode

A Mo/n-type 6H-SiC/Ni Schottky barrier diode (SBD) was fabricated by sputtering Mo metal on n-type 6H-SiC semiconductor. Before the formation of Mo/n-type 6H-SiC SBD, an ohmic contact was formed by thermal evaporation of Ni on n-type 6H-SiC and annealing at 950 °C for 10 min. It was seen that the structure had excellent rectification. The electrical parameters were extracted using its current–voltage (I–V) and capacitance–voltage (C–V) measurements carried out at room temperature. Very high (1.10 eV) barrier height and 1.635 ideality factor values were reported for Mo/n-type 6H-SiC using ln I–V plot. The barrier height and series resistance values of the diode were also calculated as 1.413 eV and 69 Ω from Norde׳s functions, respectively. Furthermore, 1.938 eV barrier height value of Mo/n-type 6H-SiC SBD calculated from C–V measurements was larger than the one obtained from I–V data.     

N-doped ZnO based fast response ultraviolet photoconductive detector

We report a study on the fabrication and characterization of ultraviolet photodetectors based on N-doped ZnO films. Highly oriented N-doped ZnO films with 10 at.% N doping are deposited using spray pyrolysis technique onto glass substrates. The photoconductive UV detector based on N-doped ZnO thin films, having a metal–semiconductor–metal (MSM) configuration are fabricated by using Al as a contact metal. I–V characteristic under dark and UV illumination, spectral and transient response of ZnO and N-doped ZnO photodetector are studied. The photocurrent increases linearly with incident power density by more than two orders of magnitude. The photoresponsivity (580 A/W at 365 nm with 5 V bias, light power density 2 μW/cm²) is much higher in the ultraviolet region than in the visible.     

Carrier transport mechanisms and photovoltaic properties of Au/p-ZnPc/Al device

The dark current density–voltage characteristic of Au/ZnPc/Al device at room temperature has been investigated. Results showed a rectification behavior. At low forward bias, the current density was found to be ohmic, while at high voltages, space charge limited the current mechanism dominated by exponential trapping levels. Junction parameters such as rectification ratio (RR), series resistance (R_s), and shunt resistance (R_sh) were found to be 9.42, 9.72 MΩ, and 0.88 × 10³ MΩ, respectively. The current density–voltage characteristics under white light illumination (100 W/m²) gives values of 0.55 V, 3 × 10⁻³ A/m², 0.18 and 5.8 × 10⁻⁴% for the open circuit voltage, V_oc, the short circuit current density (J_sc), the fill factor (FF), and conversion efficiency (η), respectively.     

Microwave performance of field-plate 0.13-μm MOS transistors with varying field-plate extension

Si-based field-plate 0.13 μm gate length metal-oxide-semiconductor field effect transistor (Si MOSFET) with field-plate (FP) lengths of 0.1 μm, 0.2 μm, and 0.3 μm have been fabricated and investigated. The field-plate metals were connected to gate electrode in this study to improve device gate resistance (R_g) resulting in the better microwave performance. By increasing the length of field-plate metal extension (L_FPE), the off-state drain-to-source surface leakage current can be suppressed. Besides, low surface traps in FP NMOS also leads to a higher drain-to-source current (I_ds) especially at high current regime compared to standard device. The power added efficiency (PAE) was 56.3% for L_FPE of 0.3 μm device, and these values where 54.7% and 53.8% for L_FPE of 0.2 μm and 0.1 μm devices, respectively. Wider field-plate metal extension exhibits highly potential for low noise amplifier and high efficiency power amplifier applications.     

Fabrication of high-speed InP/InGaAs/InP DHBT with a new self-aligned metallization technique for reduced base resistance

A new self-aligned emitter–base metallization (SAEBM) technique with wet etch is developed for high-speed heterojunction bipolar transistors (HBTs) by reducing extrinsic base resistance. After mesa etch of the base layer using a photo-resist mask, the base and emitter metals are evaporated simultaneously to reduce the emitter–base gap (S_EB) and base gap resistance (R_GAP). The InP/InGaAs/InP double heterojunction bipolar transistor (DHBT) fabricated using the technique has a reduced R_GAP, from 16.48 Ω to 4.62 Ω comparing with the DHBT fabricated by conventional self-aligned base metallization (SABM) process. Furthermore, we adopt a novel collector undercut technique using selective etching nature of InP and InGaAs to reduce collector–base capacitance (C_CB). Due to the reduced R_GAP, the maximum oscillation frequency (f_max) for a 0.5 μm-emitter HBT is improved from 205 GHz to 295 GHz, while the cutoff frequency (f_T) is maintained at around 300 GHz.