Modeling Aspects of Sub-100-nm MOSFETs for ULSI-Device Applications

Ultrathin oxides (1-3 nm) are foreseen to be used as gate dielectric in complementary-MOS technology during the next ten years. Nevertheless, they require new approaches in modeling and characterization due to the onset of quantum effects. Predicting device characteristics including quantum effects requires solving of Schroumldinger's equation together with Poisson's equation. In this paper, Poisson's equation is solved in two dimensions (2-D) over the entire device using Green's function approach, while Schroumldinger's equation is decoupled using triangular-potential-well approximation. The carrier density thus obtained is included in the space-charge density of Poisson's equation to obtain quantum-carrier confinement effects in the modeling of sub-100-nm MOSFETs. The framework also consists of the effects of source/drain-junction curvature and depth, short-channel effects, and drain-induced barrier-lowering effect. The 2-D potential profiles thus obtained with above said effects form the basis for an estimation of threshold voltage. Using this potential distribution, the transfer characteristics of the device are also evaluated. The method presented is comprehensive in the treatment, as it neither requires self-consistent numerical modeling nor it contain any empirical or fitting expression/parameter to provide formulation for quantized-carrier effect in the inversion layer of MOSFETs. The results obtained show good agreement with available results in the literature and with simulated results, thus proving the validity of our model     

A time-dependent, surface potential based compact model for MOScapacitors

This paper presents a compact model for metal oxide semiconductor (MOS) capacitors, based on a time-dependent solution for the surface potential. This enables modeling of the frequency dependence of MOS capacitors, which is not possible with existing compact models. The model is implemented in Verilog-A, and is verified against two-dimensional (2-D) numerical device simulations with DESSIS     

Modeling and simulation of a nanoscale three-region tri-material gate stack (TRIMGAS) MOSFET for improved carrier transport efficiency and reduced hot-electron effects

Two-dimensional (2-D) analytical modeling for a novel multiple region MOSFET device architecture-Tri-Material Gate Stack MOSFET-is presented, which shows reduced short-channel effects at short gate lengths. Using a three-region analysis in the horizontal direction and a universal depletion width boundary condition, the 2-D potential and electric field distribution in the channel region along with the threshold voltage of the device are obtained. The proposed model is capable of modeling electrical characteristics like surface potential, electric field, and threshold voltage of various other existent MOSFET structures like dual-material-gate, electrically induced shallow junction/straddle-gate (side-gate), and single-material-gate MOSFETs, with and without the gate stack architecture. The 2-D device simulator ATLAS is used over a wide range of parameters and bias conditions to validate the analytical results.     

Simulation and optimization of metal-insulator-semiconductorinversion-layer silicon solar cells

Metal-insulator-semiconductor inversion-layer (MIS-IL) silicon solar cells are promising devices for photovoltaic energy conversion due to the ease of junction fabrication. In order to improve the fundamental understanding of these devices, this paper presents a detailed three-dimensional analysis of existing MIS-IL cells by means of two-dimensional (2-D) numerical modeling and circuit simulation. We implement a physical model suggested in the literature for the tunneling current through the MIS tunnel contact into a device simulator and solve the complete set of drift-diffusion equations for electrons and holes within the silicon in two dimensions. Based on experimentally determined device parameters, a good agreement between simulated and experimental current-voltage (I-V) characteristics is obtained, enabling the spatially resolved determination of resistive and recombinative losses. Furthermore, an optimization study is performed to reveal the efficiency limit of MIS-IL silicon solar cells     

Simulation and Design of AlGaAs/InGaAs CCDs Based on pHEMT Technology

This paper describes the modeling, design, and fabrication of quarter-micrometer double delta-doped AlGaAs/InGaAs charge-coupled devices (CCDs) whose epitaxial layers and geometry were based around the device structure of commercial pHEMTs. A quasi-2-D physical model has been developed to investigate the properties of this novel 2-D electron gas CCD. This physical model allows the characteristics of the InGaAs transport channel as well as the dc characteristics of the device to be predicted within a reasonable amount of time. This model also shows how "individual" charge packets can be controllably transferred through the device when appropriate clocking voltages are applied to the gates of the CCD. This capacitive gate structure device is then shown to be successfully fabricated using established GaAs heterostructure fabrication techniques to ensure good repeatability. The dc characteristics of the fabricated CCD delay line are included.     

Highly efficient full-vectorial 3-D BPM modeling of fiber to planarwaveguide couplers

The behavior of a fiber-slab coupler used as a polarization and wavelength tunable filter is studied both experimentally and theoretically. The theoretical model is based on a three-dimensional (3-D) fully vectorial beam propagation method (BPM), whose main features concern its high efficiency from the point of view of memory and central processing unit (CPU) requirements. The device characteristics have been measured and the results of the comparisons among experimental and theoretical two-dimensional (2-D) and 3-D numerical modeling are reported and discussed. They show a very good agreement In the 3-D case where field polarization, coupling terms and z-variant structures are taken into account     

Two-dimensional quantum effects in nanoscale MOSFETs

In this paper, a full two-dimensional (2-D) quantum mechanical (QM) device simulator for deep submicron MOSFETs is presented. The model couples a 2-D Schrodinger-Poisson solver with a semiclassical transport model. The validity of the proposed model is first tested against a QM model for transport, developed as a benchmark. Then, QM effects on nanoscale MOSFETs performance are quantitatively addressed and discussed. It is shown that QM effects strongly influence the device performance, namely subthreshold slope drain-induced barrier lowering and short-channel effects. These results show that full QM simulations will become a mandatory issue for nanoscale MOSFETs modeling and design     

Modeling statistical dopant fluctuations in MOS transistors

The impact of statistical dopant fluctuations on the threshold voltage V_T and device performance of silicon MOSFET's is investigated by means of analytical and numerical modeling. A new analytical model describing dopant fluctuations in the active device area enables the derivation of the standard deviation, σV_T , of the threshold voltage distribution for arbitrary channel doping profiles. Using the MINIMOS device simulator to extend the analytical approach, it is found that σV_T, can be properly derived from two-dimensional (2-D) or three-dimensional (3-D) simulations using a relatively coarse simulation grid. Evaluating the threshold voltage shift arising from dopant fluctuations, on the other hand, calls for full 3-D simulations with a numerical grid that is sufficiently refined to represent the discrete nature of the dopant distribution. The average V_T-shift is found to be positive for long, narrow devices, and negative for short, wide devices. The fast 2-D MINIMOS modeling of dopant fluctuations enables an extensive statistical analysis of the intrinsic spreading in a large set of compact model parameters for state-of-the-art CMOS technology. It is predicted that V_T-variations due to dopant fluctuations become unacceptably large in CMOS generations of 0.18 μm and beyond when the present scaling scenarios are pursued. Parameter variations can be drastically reduced by using alternative device designs with ground-plane channel profiles     

A multicomb variance reduction scheme for Monte Carlo semiconductorsimulators

We adapt a multicomb variance reduction technique used in neutral particle transport to Monte Carlo micro-electronic device modeling. We implement the method in a two-dimensional (2-D) MOSFET device simulator and demonstrate its effectiveness in the study of hot electron effects. Our simulations show that the statistical variance of hot electrons is significantly reduced with minimal computational cost. The method is efficient, versatile, and easy to implement in existing device simulators     

A new 2-D model for the potential distribution and threshold voltage of fully depleted short-channel Si-SOI MESFETs

A new two-dimensional (2-D) analytical model for the threshold voltage of a fully depleted short-channel Si-MESFETs fabricated on the silicon-on-insulator (SOI) has been presented in this paper. The 2-D potential distribution functions in the active layer of the device is approximated as a parabolic function and the 2-D Poisson's equation has been solved with suitable boundary conditions to obtain the bottom potential at the Si/oxide layer interface. The calculations have been carried out for both uniform and nonuniform doping profiles in two dimensions. The minimum bottom potential is used to monitor the drain-induced barrier lowering effect and consequently an analytical expression for the threshold voltage of the device has been derived. The numerical results for the bottom potential and threshold voltage considering a wide range of device parameters have also been presented. The model has been compared with the simulated results obtained by using the ATLAS Device Simulation Software to show the validity of the proposed model. For uniform doping profile, the numerical results have also been compared with the reported data in the literature and a good agreement is observed among the three. The proposed model is simple and easy to understand the behavior of the fully depleted short-channel SOI-MESFETs as compared to the other models reported in the literature.     

An Impedance Method to Calculate Currents Induced in Biological Bodies Exposed to Quasi-Static Electromagnetic Fields

We have developed a method of modeling biological bodies with an impedance network which is useful in finding induced currents and heating patterns resulting from exposure to VLF, LF, and MF electromagnetic radiation. The method is extremely fast as compared with the method of moments, and this allows the solution of problems involving 104-105 cells inside the body. The approach does not require individual cells in the body to be regularly shaped, and thus allows accurate modeling of very thin layers, such as the skin, as well as very irregular geometries. Solutions are presented for a parallelepiped model of approximate man dimensions and for a two-dimensional (2-D) cross section of the human torso.     

RECIPE—A two-dimensional VLSI process modeling program

REnsselaer Computer integrated Circuits Process Engineering (RECIPE) is a two-dimensional (2-D) integrated circuit process modeling program developed for use in VLSI applications. The program incorporates a 2-D diffusion model which includes the concentration dependence of the diffusion coefficients. An incremental solution method is used to compute the appropriate diffusion coefficients as a function of impurity concentration throughout space. RECIPE also incorporates a 2-D ion-implantation model. While intended as a general-purpose modeling program, RECIPE has been used to study channel-length decrease of short-channel MOSFET's during high-temperature processing. A typical phosphorus-implanted (150 keV, 10¹⁶/cm²) 1-µm gate transistor had no channel after processing for 60 min at 1000°C, while an arsenic-implanted device had an effective channel length of ∼ 0.1 µm after similar processing.     

Source and drain resistance determination for MOSFET's

A new method has been developed for determining the source and drain resistances of MOSFET's from 2-D process and device modeling. The method connects the current predicted from a standard drain current formula to an approximate current computed from the output of a 2-D device simulator. This approximate current is compared with the exact current calculated from the 2-D device simulator to locate the effective edges of the inversion channel. The source/drain resistance for use in the standard formula is then computed from the quasi-Fermi levels at these effective channel edges. Good agreement is obtained with source/drain resistances extracted from experimental ID-VG data.     

A computationally efficient approach to the estimation of two- and three-dimensional hidden Markov models.

Statistical modeling methods are becoming indispensable in today's large-scale image analysis. In this paper, we explore a computationally efficient parameter estimation algorithm for two-dimensional (2-D) and three-dimensional (3-D) hidden Markov models (HMMs) and show applications to satellite image segmentation. The proposed parameter estimation algorithm is compared with the first proposed algorithm for 2-D HMMs based on variable state Viterbi. We also propose a 3-D HMM for volume image modeling and apply it to volume image segmentation using a large number of synthetic images with ground truth. Experiments have demonstrated the computational efficiency of the proposed parameter estimation technique for 2-D HMMs and a potential of 3-D HMM as a stochastic modeling tool for volume images.     

Robust, stable, and accurate boundary movement for physical etchingand deposition simulation

The increasing complexity of VLSI device interconnect features and fabrication technologies encountered by semiconductor etching and deposition simulation necessitates improvements in the robustness, numerical stability, and physical accuracy of the boundary movement method. The volume-mesh-based level set method, integrated with the physical models in SPEEDIE, demonstrates accuracy and robustness for simulations on a wide range of etching/deposition processes. The surface profile is reconstructed from the well-behaved level set function without rule-based algorithms. Adaptive gridding is used to accelerate the computation. The algorithm can be easily extended from two-dimensional (2-D) to three-dimensional (3-D), and applied to model microstructures consisting of multiple materials. Efficiency benchmarks show that this boundary movement method is practical in 2-D, and competitive for larger scale or 3-D modeling applications     

Modeling and Analysis of Parasitic Resistance in Double-Gate FinFETs

A comprehensive model is presented to analyze the three-dimensional (3-D) source-drain (S/D) resistance of undoped double-gated FinFETs of wide and narrow S/D width. The model incorporates the contribution of spreading, sheet, and contact resistances. The spreading resistance is modeled using a standard two-dimensional (2-D) model generalized to 3-D. The contact resistance is modeled by generalizing the one-dimensional (1-D) transmission line model to 2-D and 3-D with appropriate boundary conditions. The model is compared with the S/D resistance determined from 3-D device simulations and experimental data. We show excellent agreement between our model, the simulations, and experimental data.     

A better understanding of CMOS latch-up

Both lumped-element two-transistor circuit model and two-dimensional finite-element analyses are used to study the latch-up phenomena in CMOS structures. The equivalent circuit model offers a simple view on latch-up, while 2-D modeling provides more physics and quantitative understanding of latch-up. A generalized criterion for p-n-p-n latch-up is derived based on the equivalent circuit. 2-D modeling confirms the latch-up triggering condition described by the criterion. Furthermore, 2-D simulation models the entire latch-up process, including the dynamic triggering stage, and determines the intrinsic steady-state I - V characteristics of p-n-p-n devices.     

Wavefield modeling and array processing .II. Algorithms

For pt.I see ibid. vol.42, no.10, p.2549, 1994. We present several novel algorithms for array processing, as well as extensions of existing methods based on this approach. We first consider the problem of localization of wideband sources via coherent processing, and show how wavefield modeling enables us to derive expressions for the frequency transformation (focusing) matrices. This method is extended to three dimensions and to sector processing. We then develop computationally efficient implementations of MUSIC and Root-MUSIC for the narrowband and the coherent and incoherent wideband cases, as well as a natural extension of Root-MUSIC to any 2-D array. In addition, wavefield modeling allows us for the first time to extend Root-MUSIC to 3-D arrays and wavefields. We also present a low complexity variant of Root-MUSIC for direction finding within a limited angular sector. Finally, we derive a low-dimensional sufficient statistic and reduced rank processing schemes for the case of oversampled arrays and/or limited angular sector scenarios