Comparison of 3C–SiC, 6H–SiC and 4H–SiC MESFETs performances

A comparative analysis of the main DC and microwave performances of MESFETs made of the commercially available silicon carbide polytypes 3C–SiC, 6H–SiC and 4H–SiC is presented. In this purpose, we have developed an analytical model that takes into account the basic material properties such as field dependent mobility, critical electric field, ionization grade of impurities, and saturation of the charge carrier velocity. For a better precision in appreciating device characteristics in the case of a short gate device, the influences of the gate length and parasitic elements of the structure, e.g. source and drain resistances, are considered too. Cut-off frequency f_T, the corresponding output power P_m and the thermal stability are also evaluated and compared with the available experimental data, revealing the specific electrical performances of MESFETs, when any of the three polytypes is used in device fabrication.     

Improved multi-recessed 4H–SiC MESFETs with double-recessed p-buffer layer

An improved multi-recessed 4H–SiC metal semiconductor field effect transistor (MRD-MESFET) with double-recessed p-buffer layer (DRB-MESFET) is proposed in this paper. By introducing a double-recessed p-buffer layer, the gate depletion layer is further modulated, and higher drain saturation current and DC transconductance are obtained compared with the MRD-MESFET. The simulations show that the drain saturation current of the DRB-MESFET is about 42.4% larger than that of the MRD-MESFET. The DC transconductance of the DRB-MESFET is almost 15% higher than that of the MRD-MESFET and very close to that of double-recessed structure (DR-MESFET) at the bias conditions of V_gs=0 V and V_ds=40 V. The proposed structure has an improvement of 26.1% and 74.2% in the output maximum power density compared with that of the MRD-MESFET and DR-MESFET, respectively. In the meanwhile, the proposed structure possesses smaller gate-source capacitance, which results in better RF characteristics.     

Phosphorous passivation of the SiO2/4H–SiC interface

We describe experimental and theoretical studies to determine the effects of phosphorous as a passivating agent for the SiO₂/4H–SiC interface. Annealing in a P₂O₅ ambient converts the SiO₂ layer to PSG (phosphosilicate glass) which is known to be a polar material. Higher mobility (approximately twice the value of 30–40 cm²/V s obtained using nitrogen introduced with an anneal in nitric oxide) and lower threshold voltage are compatible with a lower interface defect density. Trap density, current–voltage and bias-temperature stress (BTS) measurements for MOS capacitors are also discussed. The BTS measurements point to the possibility of an unstable MOSFET threshold voltage caused by PSG polarization charge at the O–S interface. Theoretical considerations suggest that threefold carbon atoms at the interface can be passivated by phosphorous which leads to a lower interface trap density and a higher effective mobility for electrons in the channel. The roles of phosphorous in the passivation of correlated carbon dangling bonds, for SiC counter-doping, for interface band-tail state suppression, for Na-like impurity band formation and for substrate trap passivation are also discussed briefly.     

High temperature Hall effect measurements of semi-insulating 4H–SiC substrates

High temperature Hall effect and resistivity measurements have been made on semi-insulating 4H–SiC samples. Both vanadium doped and undoped materials have been studied. Resistivity measurements before and after annealing up to 1800 °C are also reported. The thermal activation energy of the resistivity in vanadium doped samples has one of two values, 1.5 and 1.1 eV, due, respectively, to the vanadium donor level and an as yet unidentified defect. The activation energies for high purity semi-insulating material (HPSI) varied from 0.9 to 1.5 eV. Hall effect measurements were made on several HPSI and 1.1 eV V-doped samples. In all cases the material was found to be n-type. Mixed conduction analysis of the data suggests that the hole concentration is negligible in all samples studied. This suggests that the defects responsible for the semi-insulating properties have deep levels located in the upper half of the bandgap. The resistivity of V-doped samples were unaffected by anneals up to 1800 °C. The annealing results for HPSI samples were mixed.     

Integrated ZVS DC–DC converter with continuous input current and high voltage gain

An integrated zero-voltage-switching (ZVS) DC–DC converter with continuous input current and high voltage gain is proposed. The proposed converter can operate with soft switching, a continuous inductor current and fixed switching frequency. The voltage stress of the power switches is relatively low compared to the output voltage. Moreover, soft-switching characteristic of the proposed converter reduces switching loss of active power switches and raise the conversion efficiency. The reverse-recovery problem of output rectifiers is also alleviated by controlling the current changing rates of diodes with the use of the leakage inductance of a coupled inductor. The operation and performance of the proposed DC–DC converter were verified on an 115?W experimental prototype operating at 100?kHz.     

Gain improvement and microwave operation of 4H–SiC MESFET with a new recessed metal ring structure

A new multi-recessed 4H-SiC MESFET with recessed metal ring for RF embedded circuits is proposed (MR2-MESFET). The key idea in the proposed structure is based on the elimination of the spaces adjacent to gate and stopped the depletion region extending towards drain and source and the reduction of the channel thickness between gate and drain to increase breakdown voltage (V_BR); meanwhile the elimination of the gate depletion layer extension to source/drain to decrease gate-source capacitance (C_gs). The influence of multi-recessed drift region and recessed metal ring structures on the characteristics of the MR2-MESFET is studied by numerical simulation. The optimized results show that the V_BR of the MR2-MESFET is 119% larger than that of the conventional 4H–SiC MESFET (C-MESFET); meanwhile maintain 85% higher saturation drain current. Therefore, the maximum output power density of the MR2-MESFET is 23.1 W/mm compared to 5.5 W/mm of the C-MESFET. Also, the cut-off frequency (f_T) and the maximum oscillation frequency (f_max) of 24.9 and 91.7 GHz are obtained for the MR2-MESFET compared to 11 and 40 GHz of the C-MESFET structure, respectively. The proposed MR2-MESFET shows a maximum stable gain (MSG) exceeding 23.6 dB at 3.1 GHz which is the highest gain yet reported for SiC MESFETs, showing the potential of this device for high power RF applications.     

Influence of inhomogeneous contact in electrical properties of 4H–SiC based Schottky diode

Schottky diodes realized on 4H–SiC n-type wafers with an epitaxial layer and a metal-oxide overlap for electric field termination were studied. The oxide was grown by plasma enhanced chemical vapor deposition (PECVD) and the Schottky barriers were formed by thermal evaporation of titanium or nickel. Diodes, with voltage breakdown as high as 700 V and ideality factor as low as 1.05, were obtained and characterized after packaging in standard commercial package (TO220).The electrical properties such as ideality factor, hight barrier, the series resistance R_s were deduced by current/voltage (I–V) analysis using the least mean square (LMS) method. The temperature effect on break voltage, R_s and saturation current was studied. A model based on two parallel Schottky diodes with two barrier heights is presented for some devices having an inhomogeneous contact. It is shown that the excess current at low voltage can be explained by a lowering of the Schottky barrier in localized regions. We use the two series RC components electrical model in order to study the dynamic behaviour of the Schottky diode in low frequency and to improve the effect of barrier inhomogeneities in electrical properties.     

Effect of Electron Irradiation with an Energy of 0.9 MeV on the I–V Characteristics and Low-Frequency Noise in 4H–SiC pin Diodes

Semiconductors - It is established experimentally that noticeable changes in the I–V characteristics and low-frequency noise in 4H-SiC pin diodes irradiated by electrons with an energy of 0.9...     

Structural,Electrical, and Optical Properties of 4H–SiC for Ultraviolet Photodetectors

Semiconductors - The results of investigations of initial n-4H–SiC structures by various methods are presented. The structures represent a highly doped n+ substrate with epitaxial layers 5...     

GaAs–AlGaAs heterostructure thyristors with completely optical transfer of emitter current

Several variants of thyristors based on GaAs-AlGaAs heterostructures with optical transfer of the emitter current are considered. The possibility that thyristors with fully optical transfer of the emitter current can be, in principle, created is demonstrated by means of the results of a study of n-p-n and p-n-p optoelectronic transistors in which the emitter current is converted into light, this light, in turn, being converted into a collector current. Structures of optoelectronic switches of this kind are presented. A switch comprising three constituent transistors has been suggested and fabricated taking into account specific features of the technique for growth of undoped GaAs layers and fabrication of high-voltage p ⁰-n ⁰ junctions with back-ground impurities from these layers, which makes the turn-on delay cardinally shorter and raises the working frequency.     

Influences of magnetic fields on current–voltage characteristics of gold-DNA-gold structure with variable gaps

Achieving highly sensitive magnetic sensors by means of Metal-DNA-Metal (MDM) structure is a key issue. DNA, being a genetic information carrier in living cells reveals tunable semiconducting response in the presence of external electric and magnetic fields, which is promising for molecular electronics. The influence of magnetic fields up to 1200 mT on the current–voltage (I–V) behavior of Gold-DNA-Gold (GDG) structure having variable gap sizes from 20–50 μm are reported in this work. These structures were fabricated using UV lithography, DC magnetron sputtering and thermal evaporation techniques. DNA strands were extracted from Boesenbergia rotunda plant via standard protocol. The acquired I–V characteristics display the semiconducting diode nature of DNA in GDG structures. The potential barrier for all the structures exhibit an increasing trend with the increase of externally imposed magnetic field irrespective of variable gap sizes. Furthermore, the potential barrier in GDG junction at higher magnetic field strengths (>1000 mT) is found to be considerably enhanced. This enhancement in the junction barrier height at elevated magnetic fields is attributed to the reduction of carrier mobility and augmentation of resistance. The achieved admirable features of magnetic sensitivity suggest the viability of using these GDG sandwiches as a prospective magnetic sensor.     

High-accuracy current sensing circuit with current compensation technique for buck–boost converter

A novel on-chip current sensing circuit with current compensation technique suitable for buck–boost converter is presented in this article. The proposed technique can sense the full-range inductor current with high accuracy and high speed. It is mainly based on matched current mirror and does not require a large proportion of aspect ratio between the powerFET and the senseFET, thus it reduces the complexity of circuit design and the layout mismatch issue without decreasing the power efficiency. The circuit is fabricated with TSMC 0.25 µm 2P5M mixed-signal process. Simulation results show that the buck-boost converter can be operated at 200 kHz to 4 MHz switching frequency with an input voltage from 2.8 to 4.7 V. The output voltage is 3.6 V, and the maximum accuracy for both high and low side sensing current reaches 99% within the load current ranging from 200 to 600 mA.     

Band structure anisotropy effects on the hole transport transient in 4H–SiC

We study the role of band structure anisotropy on the hole transport in 4H–SiC during the transient regime. For the same strength of the applied electric field, the drift velocity overshoot of the hole is stronger and reaches steady state later when the field is applied perpendicular to the c-axis, than when the field is in the c-axis direction. In both cases, the time for the hole drift velocity and mean energy to reach steady state is under 50 fs, depending on the electric field strength, and are one order of magnitude shorter than the time for the electron drift velocity and mean energy to attain the steady state.     

Defects annealing in 4H–SiC epitaxial layer probed by low temperature photoluminescence

The thermal evolution of defects induced in 4H–SiC by multiple implantation of C ions was investigated by Low Temperature Photoluminescence in the temperature range 450–1000 K. The photoluminescence spectra show sharp luminescent lines (alphabet lines) in the wavelength range 426–440 nm upon irradiation and thermal treatment at 450 K induces the appearance of a new line at 427 nm (D_I centre). The trend shown by the luminescence lines as a function of the temperature is quite complex. The alphabet lines intensity increases up to 850 K, whereas at higher temperature decreases with an activation energy of 2.0 eV, suggesting that the defect, responsible for these lines, is the Si-vacancy. The luminescence yield of D_I centre is always increasing as a function of the temperature, with a higher slope from 750 K, suggesting a correlation to the reconfiguration and to the annealing of point defects.     

Carrier lifetime investigation in 4H–SiC grown by CVD and sublimation epitaxy

Depth-resolved carrier lifetime measurements were performed in low-doped epitaxial layers of 4H silicon carbide samples. The technique used was a pump-and-probe technique where carriers are excited by an above-bandgap laser pulse and probed by free carrier absorption. Results from chemical vapour deposition samples show that lifetimes as high as 2 μs may be observed in the mid-region of 40 μm thick epilayers. For epilayers grown by the sublimation method decay transients were characterised by a fast (few nanoseconds) initial recombination, tentatively assigned to the ‘true’ lifetime, whereas a slow tail of several hundred microsecond decay time was assigned to trapping centres. From the saturation of this level at increased pumping we could derive the trapping concentration and their depth distribution peaking at the epilayer/substrate interface.     

Specific features of the current–voltage characteristics of SiO2/4H-SiC MIS structures with phosphorus implanted into silicon carbide

The effect of phosphorus implantation into a 4H-SiC epitaxial layer immediately before the thermal growth of a gate insulator in an atmosphere of dry oxygen on the reliability of the gate insulator is studied. It is found that, together with passivating surface states, the introduction of phosphorus ions leads to insignificant weakening of the dielectric breakdown field and to a decrease in the height of the energy barrier between silicon carbide and the insulator, which is due to the presence of phosphorus atoms at the 4H-SiC/SiO₂ interface and in the bulk of silicon dioxide.     

Numerical simulation study of current–voltage characteristics of a Schottky diode with inverse doped surface layer

The Poisson’s equation and drift–diffusion equations are used to simulate the current–voltage characteristics of Schottky diode with an inverse doped surface layer. The potential inside the bulk semiconductor near the metal–semiconductor contact is estimated by simultaneously solving these equations, and current as a function of bias through the Schottky diode is calculated for various inverse layer thicknesses and doping concentrations. The Schottky diode parameters are then extracted by fitting of simulated current–voltage data into thermionic emission diffusion equation. The obtained diode parameters are analyzed to study the effect of inverse layer thickness and doping concentration on the Schottky diode parameters and its behavior at low temperatures. It is shown that increase in inverse layer thickness and its doping concentration give rise to Schottky barrier height enhancement and a change in the ideality factor. The temperature dependences of Schottky barrier height and ideality factor are studied. The effect of temperature dependence of carrier mobility on the Schottky diode characteristics is also discussed.     

Analog sigma–delta modulation with Op-Amp gain compensation for nanometer technologies

A new method that compensates for low DC gain in operational amplifiers (Op-Amps) used in discrete time $\Sigma\Delta$ Σ Δ modulators is described. Measuring and buffering the error at the Op-Amps inverting terminals enables a complete cancellation of the phase error. Nanometer Op-Amps that achieve low gain but very high bandwidth become usable at oversampling rates that still present DC gain limitation. Simulations at behavioral and 65 nm CMOS transistor level implementation verify the effectiveness of the proposed technique.     

Amplifying of surface plasmon-polariton in a metal–gain medium–vacuum structure

Propagation of a surface plasmon-polariton in a three-layer system consisting of the half-space filled with a metal, a layer of the gain medium of a finite thickness, and a half-space filled with vacuum is considered. The existence of the optimum thickness of the amplifying layer at which the plasmon is amplified several times stronger than in the case of infinite thickness is demonstrated. In particular, the plasmon loss can be compensated at a lower pumping intensity than in the case of infinite thickness of the gain layer.     

Impact of defect on I(V) instabilities observed on Ti/4H–SiC high voltage Schottky diodes

Anomaly in current at low forward bias is observed for large-area Ti Schottky diodes on n type 4H–SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. Thermal activation of RTS signal gives two related trap signature (activation energy and cross section). Frequency analysis, using power spectral densities (PSDs) numerically calculated, confirms the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). PSDs show two cut-off frequencies proving the individual response of two traps. Simulations of the I–V characteristics using two barrier heights modulated by a Gaussian function which represents the defect distribution show a good agreement with the experimental results. Finally we note that there's a strong correlation between traps observed by telegraph noise techniques and excess current.