Analytical Charge and Capacitance Models of Undoped Cylindrical Surrounding-Gate MOSFETs

We present an analytical and continuous charge model for cylindrical undoped surrounding-gate MOSFETs, from which analytical expressions of all total capacitances are obtained. The model is based on a unified charge control model derived from Poisson equation. The drain current, charge, and capacitances are written as continuous explicit functions of the applied voltages. The calculated capacitance characteristics show excellent agreement with three-dimensional numerical device simulations     

Explicit Analytical Charge and Capacitance Models of Undoped Double-Gate MOSFETs

An analytical, explicit, and continuous-charge model for undoped symmetrical double-gate (DG) MOSFETs is presented. This charge model allows obtaining analytical expressions of all total capacitances. The model is based on a unified-charge-control model derived from Poisson's equation and is valid from below to well above threshold, showing a smooth transition between the different regimes. The drain current, charge, and capacitances are written as continuous explicit functions of the applied bias. We obtained very good agreement between the calculated capacitance characteristics and 2-D numerical device simulations, for different silicon film thicknesses.     

An Improved C∞-Continuous Small-Geometry MOSFET Modeling for Analog Applications

The purpose of this work is to present a new MOSFET model suitable for circuit simulation and valid from the deep-submicron range to long-channel devices. This model is derived from the physics of the device, but explicit expressions are finally obtained by making some reasonable approximations, and they are valid and continuous through all operating regimes. The suitability of the new model for analog applications is due to the use of explicit expressions with an infinite order of continuity. This implies the use of smoothening functions requiring a larger computation time than simpler functions used by the piecewise models currently available in circuit simulators. Nevertheless, this increase in complexity is compensated with an improvement in the convergence when employed in circuit simulation and with a better accuracy of the transistor currents and charges (especially of their derivatives, the conductances and the capacitances, respectively). Furthermore, the use of physically- based expressions makes the model more suitable to be extended in the deep-submicron range and eases parameter extraction.     

Numerical analysis of capacitance compact models for organic thin-film transistors

Analytical expressions for the gate-voltage dependence of the channel capacitance and the gate-to-contacts overlap capacitances in top-contact organic thin-film transistors (OTFTs) are derived and implemented in an organic compact capacitance model. The resulting modified model is verified by experimental data of transistors with constant mobility. The same model is analyzed by numerical simulations for OTFTs with a voltage-dependent mobility. The simulation results indicate that the quasistatic model describes well the simulated capacitances. In accumulation, the modeled values are slightly overestimated because of the generally accepted assumption of the charge-sheet model. It is also demonstrated that the quasistatic regime occurs at lower frequencies because of the reduced mobility at lower charge carrier concentrations.     

Improved Approximations for the Fringing and Shielded Slab-Line Capacitances

Given the dimensions w/(b - t) and t/b for the slab-line geometry or the dimensions s/b and t/b for the fringing capacitance geometry, it is shown how the capacitances associated with each geometry can be determined accurately from new explicit expressions rather than by a computerized search. The two expansions for the nome q', in terms of the dimensions, which are essential for the calculations, are identical except for signs. Finally, comparisons are made with values of the capacitances obtained by a computerized search.     

A new empirical nonlinear model for sub-250 nm channel MOSFET

An empirical nonlinear model for sub-250 nm channel length MOSFET is presented which is useful for large signal RF circuit simulation. Our model is made of both analytical drain current and gate charge formulations. The drain current expression is continuous and infinitely derivable, and charge conservation is taken into account, as the capacitances derive from a single charge expression. The model's parameters are first extracted, prior the model's implementation into a circuit simulator. It is validated through dc, ac, and RF large signal measurements compared to the simulation.     

Transient performance of four-terminal field-effect transistors

This paper extends previous work on the low-frequency operation of four-terminal field-effect transistors (FTFET's) by developing a model for the transient as well as the low-frequency performance of a symmetrical device, operating in the region beyond pinch-off. The model, which represents the FTFET in any of its possible modes of operation, is derived systematically from consideration of the physical makeup of the device. As a consequence, the element values are determined as explicit functions of the physical makeup and the bias voltages at the two gates; alternatively, they can be determined from a set of terminal measurements. In addition, in conjunction with the development of the model, expressions are derived for the functional dependence on gate biases of the gate-source capacitances present in any of the various modes of operation. Experimental results for the step-function response of the device are in good agreement with theory for broad ranges of source and load terminations. Good correlation has also been obtained for the functional dependence of the gate-source capacitances.     

The lumped-charge power MOSFET model, including parameterextraction

A fundamentally new, physically-based power MOSFET model features continuous and accurate curves for all three interelectrode capacitances. The model equations are derived from the charge stored on two internal nodes and the three external terminals. A straightforward parameter extraction technique uses the standard gate-charge plot or process data and is matched with interelectrode capacitance measurements. Simulations are in excellent agreement with measurements. The model is used to design a snubber for a flyback converter     

Rise time of emitter-coupled logic circuits including the effects of collector-to-base capacitances

Rise times of emitter-coupled logic circuits are computed, taking into account collector-to-base capacitances as well as gain-bandwidth products, ohmic base resistances, external stray capacitances, and the finite rise time of the input signal. Basic considerations are discussed, and explicit expressions and graphs are given for a wide range of circuit parameters.     

The Computation of Coaxial Line Step Capacitances

Accurate values of coaxial line step capacitances have been computed by the method of 'mode matching' at the plane of the discontinuity in a coaxial line, as described by Whinnery, Jamieson, and Robbins in 1944. The capacitances are given in tables, graphs, and as empirical explicit expressions, suitable for programming in digital computers.     

Computation of excess capacitances of various strip discontinuitiesusing closed-form Green's functions

An efficient quasi-static method to compute excess (equivalent) capacitances of various strip discontinuities in a multilayered dielectric medium is presented. The excess charge distribution on the surface of a conductor is obtained by solving an integral equation in conjunction with closed-form Green's functions. A complete list of expressions of the closed-form Green's functions for a point charge, a line charge, and a semi-infinite line charge is presented. An open end, a bend, a step junction, and a T junction are considered as numerical examples     

Modeling of cylindrical surrounding gate MOSFETs including the fringing field effects

A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate(CSG) MOSFETs has been developed.Based on this a subthreshold drain current model has also been derived.This model first computes the charge induced in the drain/source region due to the fringing capacitances and considers an effective charge distribution in the cylindrically extended source/drain region for the development of a simple and compact model.The fringing gate capacitances taken into account are outer fringe capacitance,inner fringe capacitance,overlap capacitance,and sidewall capacitance.The model has been verified with the data extracted from 3D TCAD simulations of CSG MOSFETs and was found to be working satisfactorily.     

New numerical data on open-end and gap stripline discontinuities

The excess charge technique in the spectral domain is applied to determining the quasistatic capacitances of the lumped equivalent circuits of open-end and gap stripline discontinuities. The numerical results obtained are used to check the validity of available closed-form expressions. These expressions are found to be inaccurate for stripline gaps when the strip width-ground plane spacing ratio is small.<>     

Quasistatic compact modelling of organic thin-film transistors

A compact model for the quasistatic charge and capacitances in organic thin-film transistor (OTFT) is derived and implemented for the simulation of organic circuits. A model for organic ring oscillator circuits is also developed. Comparing the models to experimental data, the simulation qualitatively reproduces the experimental data for frequency, amplitudes and waveforms. The simulation results indicate that the quasistatic model underestimates the capacitances in organic circuits, and it is shown that the geometrical capacitances originating from layout and gate overlap dominate in organic ring oscillators.     

A capacitance model for GaAs MESFETs

A capacitance model for a GaAs MESFET suitable for implementation in the circuit analysis program SPICE is presented. The model consists of nonlinear capacitances that are a function of two voltages. Such a model gives rise to ordinary nonlinear capacitances and transcapacitances. The placement of these elements in the Y matrix is shown. The empirical equations for the gate charge of a GaAs MESFET given provide an accurate SPICE model for the gate charge and capacitances of a MESFET. A comparison of measured capacitance values with the modeled values gives close enough agreement for circuit simulation purposes     

SiGe HBT大信号扩散电容模型研究

基于SiGe HBT（异质结双极晶体管）大信号等效电路模型,建立了SiGe HBT大信号发射结扩散电容模型和集电结扩散电容模型．该模型从SiGe HBT正反向传输电流出发,研究晶体管内可动载流子所引起的存储电荷（包括正向存储电荷和反向存储电荷）的基础上,同时考虑了厄利效应对载流子输运的影响,其物理意义清晰,拓扑结构简单。将基于大信号扩散电容模型的SiGe HBT模型嵌入PSPICE软件中,实现对SiGe HBT器件与电路的模拟分析。对该模型进行了直流特性模拟分析,直流模拟分析结果与文献报道的结果符合得较好,瞬态特性分析结果表明响应度好。     

A charge sheet model for MOSFETs with an abrupt retrograde channel: Part II. Charges and intrinsic capacitances

The 16 intrinsic capacitance components related to the gate, source, drain and depletion charges are examined for MOSFETs with an ideally abrupt retrograde doping profile in the channel, based on the analytical solutions for the drain current and body charge in the preceding paper. Though lengthy and complex in their final mathematical expressions, analytical solutions for the capacitances can be obtained. The validity of the analytical solutions is confirmed by comparing the modeling results with simulation data obtained using numerical calculations. The inclusion of an intrinsic surface layer in the channel merely causes a simple voltage shift for the capacitances that are not associated with the depletion charge or body bias, similarly to the variation of the drain current shown in the preceding paper. For the capacitances that are related to the depletion charge or body bias, there is not only a parallel voltage shift with an amount commensurate to the shift in drain current as well as in the other capacitances, but also a decrease in their values. This decrease depends on the thickness of the intrinsic surface layer and it amounts to 25% for a surface layer of 30 nm thickness.     

An analytic potential model for symmetric and asymmetric DG MOSFETs

This paper presents an analytic potential model for long-channel symmetric and asymmetric double-gate (DG) MOSFETs. The model is derived rigorously from the exact solution to Poisson's and current continuity equation without the charge-sheet approximation. By preserving the proper physics, volume inversion in the subthreshold region is well accounted for in the model. The resulting analytic expressions of the drain-current, terminal charges, and capacitances for long-channel DG MOSFETs are continuous in all operation regions, i.e., linear, saturation, and subthreshold, making it suitable for compact modeling. As no fitting parameters are invoked throughout the derivation, the model is physical and predictive. All parameter formulas are validated by two-dimensional numerical simulations with excellent agreement. The model has been implemented in Simulation Program with Integrated Circuit Emphasis version 3 (SPICE3), and the feasibility is demonstrated by the transient analysis of sample CMOS circuits.     

An explicit analytical charge-based model of undoped independent double gate MOSFET

This paper describes an explicit analytical charge-based model of an undoped independent double gate (DG) MOSFET. This model is based on Poisson equation resolution and field continuity equations. Without any fitting parameter or charge sheet approximation, it provides explicit analytical expressions of both inversion charge and drain current considering long undoped transistor. Consequently, this is a fully analytical and predictive model allowing describing planar DG MOSFET as well as FinFET structures. The validity of this model is demonstrated by comparison with Atlas simulations.