Observation of Negative Differential Conductance in a Reverse-Biased Ni/Ge Schottky Diode

In this letter, we report the experimental observation of negative differential conductance (NDC) in a Ni/Ge Schottky diode. With the aid of theoretical models and numerical simulation, we show that, at reverse bias, electrons tunnel into the high electric field of the depletion region. This scatters the electrons into the upper valley of the Ge conduction band, which has a lower mobility. The observed NDC is hence attributed to the transferred-electron effect. This shows that Schottky contacts can be used to create hot electrons for transferred-electron devices.      

Simulation of the electrical properties of polycrystalline ceramic semiconductors with submicrometer grain sizes

A numerical model for the calculation of the electrical characteristics of polycrystalline ceramic semiconductors is suggested. The model is applicable in a situation where the average grain size is comparable with the depletion region width near a grain boundary and the double Schottky barriers of neighboring boundaries overlap. The two-dimensional calculation is carried out in the diffusion-drift approximation using the Voronoi grid method. The effect of crystalline grain size on the current-voltage characteristic and specific capacitance of the material is analyzed usingp-SrTiO₃ as an example.     

超导场效应器件的统一小信号传输线模型

本文提出了超导场效应器件的统一小信号模模型。建立这个模型的出发点是其于用有源分布的超导传输线对超导场效应器件的超导沟道区动态导纳进行模拟，经逐次沟道拟似，得到了既适用于超导表面场效器件又适用于超导ＰＮ结型或肖特基结型场效应器件（ＪＳｕＦＥＴｓ）或（ＭＥＳｕＦＥＴｓ）的统一小信号模型。     

考虑量子效应的超薄体双栅肖特基源漏MOSFET电流解析模型

推导了超薄体双栅肖特基势垒MOSFET器件的漏电流模型,模型中考虑了势垒高度变化和载流子束缚效应.利用三角势垒近似求解薛定谔方程,得到的载流子密度和空间电荷密度一起用来得到量子束缚效应.由于量子束缚效应的存在,第一个子带高于导带底,这等效于禁带变宽.因此源漏端的势垒高度提高,载流子密度降低,漏电流降低.以前的模型仅考虑由于镜像力导致的肖特基势垒降低,因而不能准确表示漏电流.包含量子束缚效应的漏电流模型克服了这些缺陷.结果表明,较小的非负肖特基势垒,甚至零势垒高度,也存在隧穿电流.二维器件模拟器Silvaco得到的结果和模型结果吻合得很好.     

Modelling and characterization of the reverse recovery of ahigh-power GaAs Schottky diode

The reverse recovery characteristics of high-power GaAs Schottky rectifiers are reported at various temperatures; mixed device and circuit simulations were used to study the internal plasma dynamics during the reverse recovery process. In this approach, semiconductor transport and heat generation and diffusion equations were solved self-consistently using a two-dimensional (2-D) finite element grid structure under boundary conditions imposed by the measurement circuit. The simulation results are shown to be in good agreement with the measured data at temperatures in the range of 25°C to 125°C. These results are compared with the reverse recovery characteristics of a commercial silicon PIN power rectifier under identical conditions and it is shown that carrier depletion is the dominant mechanism causing the reverse recovery in a GaAs Schottky diode. The reverse recovery power loss is negligible in a GaAs Schottky rectifier and is shown to decrease as the case temperature is increased, contrary to the silicon PIN rectifier behaviour     

Berechnung des unbeweglichen Anteiles der Raumladung im Halbleiter einer MOS-Struktur

Under the assumption of Boltzmann statistics the immobile part of the semiconductor space charge in a MOS structure is calculated. The result of this calculation is compared with the value, which is obtained from a theory of Schottky. This theory yields a square root relation between the immobile space charge and the external device voltage. It is shown that Schottky's theory represents a good approximation to the exact relation. Values are given for the diffusion voltage belonging to the depletion region dependent on substrate doping, external voltage and inversion edge concentration.

Résumé

En assumant les statistiques Boltzmann, on calcule la partie immobile de la charge d'espace du semiconducteur dans une structure MOS. Le résultat de ce calcul est comparé avec la valeur obtenue de la théorie de Schottky. Cette théorie fournit une relation à racine carrée entre la charge d'espace immobile et la tension extérieure du dispositif. On démontre que la théorie de Schottky représente une bonne approximation de la relation exacte. Des valeurs sont données pour la tension de diffusion appartenant à la région d'épuisement dépendant de la dope de la couche inférieure, de la tension extérieure et de la concentration de la borne d'inversion.     

Characteristics of MBE-Grown GaN Detectors on Double Buffer Layers Under High-Power Ultraviolet Optical Irradiation

In this paper, present experimental investigations on the radiation hardness of GaN-based Schottky diode photodetectors. High-power ultraviolet (UV) radiation obtained from a Xenon lamp is used as the light source for the optical-stressing experiment. Two types of devices are being investigated. One has a double-buffer-layer structure that consists of a conventional high-temperature AlN buffer layer and an intermediate temperature buffer layer (type I), and the control device was fabricated with only a conventional AlN buffer layer (type II). Detailed current-voltage, capacitance-voltage, flicker noise, and responsivity measurements performed on the detectors show that the degradations of the devices arose from the defects present at the Schottky junctions due to the exposure of the devices to the high-power UV radiation. Both types of devices exhibit degradation in their optoelectronic properties. However, type-I devices, in general, exhibit gradual and slow degradation, whereas type-II devices exhibit catastrophic breakdowns in the device characteristics. The experimental data indicate significant improvement in the radiation hardness for type-I devices     

考虑量子效应的超薄体双栅肖特基源漏MOSFET电流解析模型

推导了超薄体双栅肖特基势垒MOSFET器件的漏电流模型,模型中考虑了势垒高度变化和载流子束缚效应.利用三角势垒近似求解薛定谔方程,得到的载流子密度和空间电荷密度一起用来得到量子束缚效应.由于量子束缚效应的存在,第一个子带高于导带底,这等效于禁带变宽.因此源漏端的势垒高度提高,载流子密度降低,漏电流降低.以前的模型仅考虑由于镜像力导致的肖特基势垒降低,因而不能准确表示漏电流.包含量子束缚效应的漏电流模型克服了这些缺陷.结果表明,较小的非负肖特基势垒,甚至零势垒高度,也存在隧穿电流.二维器件模拟器Silvaco得到的结果和模型结果吻合得很好.     

A simple analytical model for the electrical characteristics of depletion-mode MOSFET's with application to low-temperature operation

A simple analytical model for depletion-mode MOSFET's is developed based on the gradual channel approximation and taking into account carrier freeze-out onto impurity sites implanted for threshold voltage modification. Theory is found to be in reasonable agreement with experimental results for n-channel depletion-mode MOSFET's at room temperature and at 77 K. It is shown that the common methods used for enhancement-mode devices to determine carrier channel mobility and threshold voltage, respectively, from the slope and voltage intercept of the current-gate voltage characteristics are invalid for depletion-mode devices. By comparison of enhancement and depletion devices on the same chip, it is shown that the processes associated with ion implantation had no effect on electron channel mobility at room temperature and caused at most a 25-percent reduction at 77 K. The model also is applicable to buried p-channel devices as used in CMOS technologies.     

A revised boundary condition for the numerical analysis of Schottky barrier diodes

A new boundary condition for the computer simulation of Schottky barrier diodes is proposed. In this model the electron transport analysis can be extended to higher bias voltages by utilizing a current-dependent surface recombination velocity which is based on a drifted Maxwellian distribution of carrier velocities. Calculations based on this revised boundary condition predict a depletion of electrons at the Schottky boundary compared with an accumulation predicted in previously published calculations.     

4H-silicon carbide Schottky barrier diodes for microwave applications

In this paper, physical models for vertical 4H-silicon carbide (4H-SiC) Schottky diodes are used to develop a design method, where a maximum cutoff frequency for a given punch-through is achieved. The models presented are also used to extract microwave simulator computer-aided design (CAD) models for the devices. A device process was developed and Schottky diodes were fabricated in-house. Characterization of the devices was performed and compared to the theoretical models with good agreement. A demonstrator singly balanced diode mixer was simulated using the developed models. The mixer was fabricated using the in-house developed diodes, and measurements on the mixer show good agreement with the CAD simulations. A conversion loss of 5.2 dB was achieved at 850 MHz, and an excellent IIP/sub 3/ of 31 dBm at 850-MHz RF was measured, at 30-dBm P/sub LO/. These results verify the enhanced properties of the SiC Schottky diode compared to other nonwide bandgap diodes.     

Aluminum schottky contacts to n-type 4H-SiC

Aluminum Schottky contacts to n-type 4H-SiC were fabricated, and the results of electrical measurements on the devices are presented along with the Schottky barrier height and ideality factor. Furthermore, two different samples having different surface treatments were investigated. The barrier heights obtained from current-voltage (I-V) measurements on both samples are essentially identical, with an average value of 0.64 eV. The ideality factor of Sample 2, which had an HF-dip surface treatment, had an average value of 1.66. The ideality factor of Sample 1, which had a surface treatment similar to the other sample but with the addition of an RCA-like clean, had an average value of 2.60. Measurements on some control devices with Au contacts showed that no significant Fermi-level pinning occurred, and the barrier-height results for all devices approached the Schottky-Mott limit. Capacitance-voltage (C-V) measurements on the Al devices from Sample 1 yielded barrier heights that were much smaller than those obtained from the I-V curves; however, for Sample 2, the barrier heights obtained from both C-V and I-V methods were comparable. Based on these results, we propose a model that accounts for the measured results in terms of a thin interfacial layer produced in Sample 1, which screens the depletion region from the applied electric field. This model yields a possible explanation of how the two surface treatments results in devices with the same barrier height but different ideality factors. The results in this paper represent some of the first experimental data on Al/4H-SiC Schottky contacts.     

低压TiO_2系压敏陶瓷的伏安特性实验分析

采用耗尽层近似理论,分析了低压TiO2系压敏陶瓷在直流偏压下的伏安特性,并对ZnO、TiO2和SrTiO3系三种压敏陶瓷的伏安特性进行了测试、分析和比较。结果表明,在晶界势垒不太高(一般为零点几电子伏)及晶界电场强度不太大(约106V/m量级)的情况下,TiO2系压敏陶瓷晶界的电子传输机制不同于ZnO系压敏陶瓷,而与SrTiO3系压敏陶瓷的导电机制相似,属于肖特基热电子发射机制。     

Generalized theory of conduction in schottky barriers

An approximate analytical expression is obtained for the non-equilibrium carrier density throughout the depletion region of a Schottky diode. This expression is used to obtain a generalized expression for the J-V characteristics of the diode. It is shown that for the case of the mean free path less than a fraction of the Debye length the current approaches the Schottky diffusion-limited result. On the other hand for the mean free path greater than this amount the current approaches Bethe's thermionic result. Furthermore, knowing the non-equilibrium carrier density permits the calculation of the transit time of the carriers through the depletion region.     

Power gain and noise of InP and GaAs insulated gate microwave FETs

LPE GaAs and InP n-channel depletion mode insulated gate field effect transistors (MISFETs) having 4 μm gate lengths have been fabricated employing pyrolytic Si_xO_yN_z, pyrolytic SiO₂ and an anodic dielectric for gate insulation.The microwave power gain, noise figure, maximum output power and power-added efficiency were measured and compared to those parameters measured on GaAs Schottky barrier gate devices of identical geometry. The results show that, at least at the microwave frequencies measured, power gain and noise are essentially the same in the GaAs Schottky gate FET and anodic MISFET devices while the maximum output power of a typical InP MISFET was greater than that of a representative GaAs Schottky device.     

Time‐of‐Flight Studies of Electron‐Collection Kinetics in Polymer:Fullerene Bulk‐Heterojunction Solar Cells

The charge‐collection dynamics in poly(3‐hexylthiophene:[6,6]‐phenyl‐C₆₁‐butyric acid methyl ester (P3HT:PCBM) bulk heterojunctions are studied in thick (>1 μm) devices using time‐of‐flight measurements and external quantum‐efficiency measurements. The devices show Schottky‐diode behavior with a large field‐free region in the device. Consequently, electron transport occurs by diffusion in the bulk of the active layer. At high applied biases where the depletion region spans the entire active layer, normal time‐of‐flight transients are observed from which the electron mobility can be determined. Here, the electron mobility follows Poole–Frenkel behavior as a function of field. At lower applied biases, where the depletion region only spans a small portion of the active layer, due to a high density of dark holes, the recombination kinetics follow a first‐order rate law with a rate constant about two orders of magnitude lower than that predicted by Langevin recombination.     

Semiconductor photoelectric converters for the ultraviolet region of the spectrum

Recently, ultraviolet photoelectronics emerged in response to the needs of medicine, biology, military equipment, and the problem of the hole in the ozone layer. A specific feature of this field of photoelectronics is the need to detect weak (albeit appreciably affecting vital human functions) signals against a background of intense radiation in the visible and infrared regions of the spectrum. Ultraviolet electronics relies on Si-based p-n structures and GaP-based Schottky barriers, p-n structures and Schottky barriers based on GaN and AlGaN (“solar-blind,” i.e., solar-radiation-insensitive devices), SiC structures with potential barriers (high-temperature devices), and ZnO-and ZnS-based photoresistors and Schottky diodes. In this review, the parameters of starting wide-gap semiconductors are given, physical foundations for photoelectric conversion and the principles of formation of ohmic contacts are described, characteristics of corresponding devices are given, and the envisaged lines of further studies are outlined.     

Incorporation of SiO2 dielectric nanoparticles for performance enhancement in P3HT:PCBM inverted organic solar cells

It is well known that organic solar cells (OSCs) with inverted geometry have not only demonstrated a better stability and longer device life time but also have shown improved power conversion efficiency (PCE). Recent studies exhibit that incorporation of metal and/or semiconducting nanoparticles (NPs) can further increase the PCE for OSCs. In this present work, we have synthesized SiO₂ NPs of various sizes (25, 50, 75 and 100 nm) using the modified Stober method and incorporated them into P3HT:PCBM photoactive layer and ZnO based electron transport layer (ETL) in order to investigate the light trapping effects in an OSC. Absorption studies have shown a considerable increase in photo absorption in both cases. The fabricated devices demonstrated 13% increase in the PCE when SiO₂ NPs are incorporated in P3HT:PCBM photoactive layer, whereas PCE was increased by 20% when SiO₂ NPs are incorporated in ZnO based ETL. Mott–Schottky analysis and impedance spectroscopy measurements have been carried out to determine the depletion width and global mobility for both the devices. The possible reason for PCE enhancement and the role of SiO₂ NPs in active layer and ZnO ETL are explained on the basis of the results obtained from Mott–Schottky analysis and impedance spectroscopy measurements.     

Reverse current instabilities in amorphous silicon Schottky diodes:modeling and experiments

A new model for high bias transport is reported which describes the time-dependent reverse current variations in amorphous silicon Schottky diodes. This phenomenon is of practical importance in the design and optimization of pixels for large-area optical and X-ray imaging. In the model, the main components of the reverse current, namely thermionic emission and tunneling, are both affected by the electric field at the metal/amorphous silicon interface. Time-dependent variations in this electric field arise due to the release of charges trapped in defect states in the depletion region and to charge trapping at the interface. This effect is analyzed using the approximation that the tunneling component of the current is equivalent to a lowering of the potential barrier at the interface. The calculated time-dependent reverse current is compared with the measured data     

Tunneling through ultrathin GaAs n++-p++-n++ barrier grown by molecular layer epitaxy

The I-V characteristics of ultrathin GaAs n⁺⁺-p⁺⁺ -n⁺⁺ barrier structures with a 45 Å thick p⁺⁺ layer grown by molecular layer epitaxy (MLE) have been measured at room temperature and 77 K. The tunneling probability for this structure has been calculated as a function of effective tunneling width. It was found that good agreement between experiment and calculation is obtained when the effective tunneling width is assumed to be 75 Å, which is much smaller than the depletion width about 190 Å measured by C-V method. This fact indicates that the depletion width approximation cannot be used to measure the exact tunneling width for ultrathin barrier devices