Lossless InAsP-InGaP modulator at 1.3 /spl mu/m for optical conversion of radio signals up to 40 GHz

We report on an InAsP-InGaP electroabsorption modulator at 1.3 /spl mu/m integrated with a semiconductor amplifier. The fiber-to-fiber insertion gain reaches +10 dB. The 50-/spl mu/m-long modulator section exhibits a bandwidth of 36 GHz and a -17-dB extinction ratio with 3-V drive voltage. The integrated amplifier produced an RF-link efficiency of -26 dB at 20 GHz without any external amplification.     

220-GHz metamorphic HEMT amplifier MMICs for high-resolution imaging applications

In this paper, the development of 220-GHz low-noise amplifier (LNA) MMICs for use in high-resolution active and passive millimeter-wave imaging systems is presented. The amplifier circuits have been realized using a well-proven 0.1-/spl mu/m gate length and an advanced 0.05-/spl mu/m gate length InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor technology. Furthermore, coplanar circuit topology in combination with cascode transistors was applied, leading to a compact chip size and an excellent gain performance at high millimeter-wave frequencies. A realized single-stage 0.05-/spl mu/m cascode LNA exhibited a small-signal gain of 10 dB at 222 GHz, while a 0.1-/spl mu/m four-stage amplifier circuit achieved a linear gain of 20 dB at the frequency of operation and more than 10 dB over the bandwidth from 180 to 225 GHz.     

40-Gbit/s OEIC on GaAs substrate through metamorphic buffer technology

An optoelectronic integrated circuit operating in the 1.55-/spl mu/m wavelength range was realized on GaAs substrate through metamorphic technology. High indium content layers, metamorphically grown on a GaAs substrate, were used to fabricate the optoelectronic integrated circuits (OEICs) with -3 dB bandwidth of 40 GHz and 210 V/W of calculated responsivity. The analog OEIC photoreceiver consists of a 12-/spl mu/m, top-illuminated p-i-n photodiode, and a traveling wave amplifier (TWA). This receiver shows 6 GHz wider bandwidth than a hybrid photoreceiver, which was built using comparable, but stand-alone metamorphic p-i-n diode and TWA. With the addition of a buffer amplifier, the OEIC shows 7 dB more gain than the hybrid counterpart. To our knowledge, this is the first 40 Gbit/s OEIC achieved on a GaAs substrate operating at 1.55 /spl mu/m.     

30-GHz-band over 5-W power performance of short-channel AlGaN/GaN heterojunction FETs

This paper describes the small-signal characterization through delay-time analysis and high-power operation of the Ka-band of AlGaN/GaN heterojunction field-effect transistors (FETs). An FET with a gatewidth of 100 /spl mu/m and a gate length of 0.09 /spl mu/m has exhibited a current gain cutoff frequency (f/sub T/) of 81 GHz, a maximum frequency of oscillation (fmax) of 187 GHz, and a maximum stable gain of 10.5 dB at 30 GHz (8.3 dB at 60 GHz). Delay-time analysis has demonstrated channel electron velocities of 1.50/spl times/10/sup 7/ to 1.75/spl times/10/sup 7/ cm/s in a gate-length range of 0.09-0.25 /spl mu/m. State-of-the-art performance-saturated power of 5.8 W with a linear gain of 9.2 dB and a power-added efficiency of 43.2%-has been achieved at 30 GHz using a single chip having a gatewidth of 1.0 mm and a gate length of 0.25 /spl mu/m.     

A fully monolithic 260-/spl mu/W, 1-GHz subthreshold low noise amplifier

A micro-power complementary metal oxide semiconductor (CMOS) low-noise amplifier (LNA) is presented based on subthreshold MOS operation in the GHz range. The LNA is fabricated in an 0.18-/spl mu/m CMOS process and has a gain of 13.6 dB at 1 GHz while drawing 260 /spl mu/A from a 1-V supply. An unrestrained bias technique, that automatically increases bias currents at high input power levels, is used to raise the input P1dB to -0.2 dBm. The LNA has a measured noise figure of 4.6 dB and an IIP3 of 7.2 dBm.     

24 GHz low-noise amplifier in 0.18 /spl mu/m CMOS technology

A 24 GHz monolithic low-noise amplifier (LNA) is implemented in a standard 0.18 /spl mu/m CMOS technology. Measurements show a gain of 12.86 dB and a noise figure of 5.6 dB at 23.5 GHz. The input and output return losses are better than 11 dB and 22 dB across the 22-29 GHz span, respectively. The operation frequency of 24 GHz is believed to be the highest reported for LNA in a standard CMOS technology.     

Low-power W-band CPWG InAs/AlSb HEMT low-noise amplifier

We present the development of a low-power W-band low-noise amplifier (LNA) designed in a 200-nm InAs/AlSb high electron mobility transistor (HEMT) technology fabricated on a 50-/spl mu/m GaAs substrate. A single-stage coplanar waveguide with ground (CPWG) LNA is described. The LNA exhibits a noise figure of 2.5 dB and an associated gain of 5.6 dB at 90 GHz while consuming 2.0 mW of total dc power. This is, to the best of our knowledge, the lowest reported noise figure for an InAs/AlSb HEMT LNA at 90 GHz. Biased for maximum gain, the single-stage amplifier presents 6.7-dB gain and an output 1-dB gain compression point (P1dB) of -6.7dBm at 90 GHz. The amplifier provides broad-band gain, greater than 5dB over the entire W-band.     

An ultra-low power InAs/AlSb HEMT Ka-band low-noise amplifier

The first antimonide-based compound semiconductor (ABCS) MMIC, a Ka-Band low-noise amplifier using 0.25-/spl mu/m gate length InAs/AlSb metamorphic HEMTs, has been fabricated and characterized on a 75 /spl mu/m GaAs substrate. The compact 1.1 mm/sup 2/ three-stage Ka-band LNA demonstrated an average of 2.1 dB noise-figure between 34-36 GHz with an associated gain of 22 dB. The measured dc power dissipation of the ABCS LNA was an ultra-low 1.5 mW per stage, or 4.5 mW total. This is less than one-tenth the dc power dissipation of a typical equivalent InGaAs/AlGaAs/GaAs HEMT LNA. Operation with degraded gain and noise figure at 1.1 mW total dc power dissipation is also verified. These results demonstrate the outstanding potential of ABCS HEMT technology for mobile and space-based millimeter-wave applications.     

A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end

A fully integrated 10-Gb/s optical receiver analog front-end (AFE) design that includes a transimpedance amplifier (TIA) and a limiting amplifier (LA) is demonstrated to require less chip area and is suitable for both low-cost and low-voltage applications. The AFE is fabricated using a 0.18-/spl mu/m CMOS technology. The tiny photo current received by the receiver AFE is amplified to a differential voltage swing of 400 mV/sub (pp)/. In order to avoid off-chip noise interference, the TIA and LA are dc-coupled on the chip instead of ac-coupled though a large external capacitor. The receiver front-end provides a conversion gain of up to 87 dB/spl Omega/ and -3dB bandwidth of 7.6 GHz. The measured sensitivity of the optical receiver is -12dBm at a bit-error rate of 10/sup -12/ with a 2/sup 31/-1 pseudorandom test pattern. Three-dimensional symmetric transformers are utilized in the AFE design for bandwidth enhancement. Operating under a 1.8-V supply, the power dissipation is 210 mW, and the chip size is 1028 /spl mu/m/spl times/1796 /spl mu/m.     

A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-/spl mu/m CMOS

A 24-GHz +14.5-dBm fully integrated power amplifier with on-chip 50-/spl Omega/ input and output matching is demonstrated in 0.18-/spl mu/m CMOS. The use of substrate-shielded coplanar waveguide structures for matching networks results in low passive loss and small die size. Simple circuit techniques based on stability criteria derived result in an unconditionally stable amplifier. The power amplifier achieves a power gain of 7 dB and a maximum single-ended output power of +14.5-dBm with a 3-dB bandwidth of 3.1 GHz, while drawing 100 mA from a 2.8-V supply. The chip area is 1.26 mm/sup 2/.     

Two-stage broadband high-gain W-band amplifier using 0.1-/spl mu/m metamorphic HEMT technology

We report broadband high-gain W-band monolithic microwave integrated circuit amplifiers based on 0.1-/spl mu/m InGaAs-InAlAs-GaAs metamorphic high electron mobility transistor (MHEMT) technology. The amplifiers show excellent S/sub 21/ gains greater than 10 dB in a very broad W-band frequency range of 75-100 GHz, thereby exhibiting a S/sub 21/ gain of 10.1 dB, a S/sub 11/ of -5.1 dB and a S/sub 22/ of -5.2 dB at 100 GHz, respectively. The high gain of the amplifier is mainly attributed to the performance of the MHEMTs exhibiting a maximum transconductance of 691 mS/mm, a current gain cutoff frequency of 189 GHz, and a maximum oscillation frequency of 334 GHz.     

A 50-MHz dB-linear programmable-gain amplifier with 98-dB dynamic range and 2-dB gain steps for 3 V power supply

A programmable-gain amplifier (PGA) circuit introduced in this paper has a dynamic gain range of 98 dB with 2 dB gain steps and is controlled by 6-bit gain control bits for a 3 V power supply. It has been fabricated in a 0.5 /spl mu/m 15 GHz f/sub T/ Si BiCMOS process and draws 13 mA. The active die area taken up by the circuit is 400 /spl mu/m /spl times/ 1170 /spl mu/m. A noise figure (NF) of 4.9 dB was measured at the maximum gain setting. In addition, an analysis of the bias current generation to provide dB-linear gain control is presented.     

A miniature Q-band low noise amplifier using 0.13-/spl mu/m CMOS technology

A miniature Q-band low noise amplifier (LNA) using 0.13-/spl mu/m standard mixed signal/radio frequency complementary metal-oxide-semiconductor (CMOS) technology is presented in this letter. This three-stage common source thin-film microstrip LNA achieves a peak gain of 20dB at 43GHz with a compact chip size of 0.525mm/sup 2/. The 3-dB frequency bandwidth ranges from 34 to 44GHz and the minimum noise figure is 6.3dB at 41GHz. The LNA outperforms all the reported commercial standard CMOS Q-band LNAs, with the highest gain, highest output IP3, and smallest chip size.     

A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 /spl mu/m CMOS technology

A 24-GHz low-noise amplifier (LNA) was designed and fabricated in a standard 0.18-/spl mu/m CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum noise figure of 3.9 dB at 24.3 GHz. The supply voltage and supply current are 1 V and 14 mA, respectively. To the author's knowledge, this LNA demonstrates the lowest noise figure among the reported LNAs in standard CMOS processes above 20 GHz.     

35-dB gain Tm-doped ZBLYAN fiber amplifier operating at 1.65 /spl mu/m

We demonstrate the first high gain rare-earth-doped fiber amplifier operating at 1.65 /spl mu/m. It consists of ZBLYAN fiber with a Tm/sup 3+/-doped core and Tb/sup 3+/-doped cladding, pumped by 1.22 /spl mu/m laser diodes. It is possible to achieve efficient amplification with Tm/sup 3+/ ions if their amplified spontaneous emission (ASE) in the 1.75 to 2.0 /spl mu/m wavelength region is suppressed by doping Tb/sup 3+/ ions in the cladding. A two-stage-type fiber amplifier is constructed and a signal gain of 35 dB is achieved for a pump power of 140 mW. A gain over 25 dB is realized in the 1.65 /spl mu/m to 1.67 /spl mu/m wavelength region.     

Low-noise metamorphic HEMTs with reflowed 0.1-/spl mu/m T-gate

A 0.1-/spl mu/m T-gate fabricated using e-beam lithography and thermally reflow process was developed and applied to the manufacture of the low-noise metamorphic high electron-mobility transistors (MHEMTs). The T-gate developed using the thermally reflowed e-beam resist technique had a gate length of 0.1 /spl mu/m and compatible with the MHEMT fabrication process. The MHEMT manufactured demonstrates a cutoff frequency f/sub T/ of 154 GHz and a maximum frequency f/sub max/ of 300 GHz. The noise figure for the 160 /spl mu/m gate-width device is less than 1 dB and the associated gain is up to 14 dB at 18 GHz. This is the first report of a 0.1 /spl mu/m MHEMT device manufactured using the reflowed e-beam resist process for T-gate formation.     

Gain-flattened Er/sup 3+/-doped fiber amplifier for a WDM signal in the 1.57-1.60-/spl mu/m wavelength region

A gain-flattened Er/sup 3+/-doped silica-based fiber amplifier (EDFA) has been constructed for a 1.58-/spl mu/m band WDM signal. This EDFA exhibits uniform amplification characteristics with a gain excursion of 0.9 dB for a four-channel WDM signal in the 1.57-1.60 /spl mu/m wavelength region. The average signal gain and the noise figure for the WDM signal are 29.5 dB and less than 6.3 dB, respectively. The use of this EDFA in parallel with a 1.55-/spl mu/m band EDFA will expand the WDM transmission wavelength region.     

0.18 /spl mu/m 3-6 GHz CMOS broadband LNA for UWB radio

A 3-6 GHz CMOS broadband low noise amplifier (LNA) for ultra-wideband (UWB) radio is presented. The LNA is fabricated with the 0.18 /spl mu/m 1P6M standard CMOS process. Measurement of the CMOS LNA is performed using an FR-4 PCB test fixture. From 3 to 6 GHz, the broadband LNA exhibits a noise figure of 4.7-6.7 dB, a gain of 13-16 dB, and an input/output return loss higher than 12/10 dB, respectively. The input P/sub 1 dB/ and input IP3 (IIP3) at 4.5 GHz are about -14 and -5 dBm, respectively. The DC supply is 1.8 V.     

High-power 1.3-/spl mu/m InGaAsP-InP amplifiers with tapered gain regions

Tapered structures fabricated in InGaAsP-InP 1.3-/spl mu/m quantum-well material have been evaluated as high-gain high-saturation-power amplifiers. The devices, which had a 1-mm-long ridge-waveguide input gain section followed by a 2-mm-long tapered section, demonstrated an unsaturated gain of 26 dB at 2.0 A and about 30 dB at 2.8 A. Saturated output power at 2.8 A was >750 mW. At 2.0-A drive current and /spl ap/10-mW input power, the relative intensity noise of the amplified signal was /spl les/-160 dB/Hz at frequencies /spl ges/2 GHz.     

Development of multiband phase shifters in 180-nm RF CMOS technology with active loss compensation

We present the design and development of a novel integrated multiband phase shifter that has an embedded distributed amplifier for loss compensation in 0.18-/spl mu/m RF CMOS technology. The phase shifter achieves a measured 180/spl deg/ phase tuning range in a 2.4-GHz band and a measured 360/spl deg/ phase tuning range in both 3.5- and 5.8-GHz bands. The gain in the 2.4-GHz band varies from 0.14 to 6.6 dB during phase tuning. The insertion loss varies from -3.7 dB to 5.4-dB gain and -4.5 dB to 2.1-dB gain in the 3.5- and 5.8-GHz bands, respectively. The gain variation can be calibrated by adaptively tuning the bias condition of the embedded amplifier to yield a flat gain during phase tuning. The return loss is less than -10 dB at all conditions. The chip size is 1200 /spl mu/m/spl times/2300 /spl mu/m including pads.