A 40-Gb/s preamplifier using AlGaAs/InGaAs HBTs with regrown basecontacts

A preamplifier for 40-Gb/s optical transmission systems incorporating AlGaAs/InGaAs heterojunction bipolar transistors (HBTs) with p⁺ regrown extrinsic base layers is described. The HBTs have a heavily doped regrown p⁺-GaAs layer in the extrinsic base regions and a thin graded InGaAs strained layer for the intrinsic base. Their measured peak f_max is above 200 GHz. The developed preamplifier provides a bandwidth of 38.4 GHz and a transimpedance gain of 41.1 dB Ω. Moreover, the frequency response as an optical receiver has a bandwidth of 32 GHz. These characteristics make the preamplifier suitable for use in a 40-Gb/s optical receiver. These results show that AlGaAs/InGaAs HBTs with p⁺ regrown extrinsic base layers are very promising for use in 40-Gb/s optical transmission systems     

A monolithic GaAs receiver for optical interconnect systems

A monolithic GaAs optical receiver which includes a photodetector and preamplifier was designed and fabricated using a common 1.0-μm GaAs MESFET technology. The optical receiver operates at the data rate of 1 Gb/s. The transimpedance value can be continuously tuned from 1 to 10 kΩ. The metal-semiconductor-metal photodiode shows a 35% efficiency. Several design factors are considered to achieve high-bandwidth and low-noise operation. An array of the integrated receivers can be compactly implemented in a single chip for high-speed interconnection networks and photonic signal processing     

Si bipolar chip set for 10-Gb/s optical receiver

Three Si bipolar ICs, a preamplifier, a gain-controllable amplifier, and a decision circuit, have been developed for 10-Gb/s optical receivers. A dual-feedback configuration with a phase adjustment capacitor makes it possible to increase the preamplifier bandwidth up to 11.2 GHz, while still retaining flat frequency response. The gain-controllable amplifier, which utilizes a current-dividing amplifier stage, has an 11.4-GHz bandwidth with 20-dB gain variation. A master-slave D-type flip-flop is also operated as the decision circuit at 10 Gb/s. On-chip coplanar lines were applied to minimize the electrical reflection between the ICs     

High-gain transimpedance amplifier in InP-based HBT technology forthe receiver in 40-Gb/s optical-fiber TDM links

A monolithic integrated transimpedance amplifier for the receiver in a 40-Gb/s optical-fiber TDM system has been fabricated in an InP-based HBT technology. Despite its high gain (transimpedance of 2 kΩ in the limiting mode, 10 kΩ in the linear mode) the complete amplifier was realized on a single chip. Clear output eye diagrams were measured up to 43 Gb/s under realistic driving conditions. The voltage swing of 0.6 V_pp at the differential 50 Ω output does not change within the demanded input dynamic range of 6 dB. At the upper input current level even 48 Gb/s were achieved. The power consumption is approximately 600 mW at a single supply voltage of -5.5 V     

A Si BiCMOS transimpedance amplifier for 10-Gb/s SONET receiver

A transimpedance amplifier packaged with an InP p-i-n photodiode has been demonstrated for 10-Gb/s SONET receiver. The shunt feedback transimpedance amplifier is fabricated in 0.25-μm modular Si BiCMOS technology. The transimpedance of 55 dBΩ is achieved at a bandwidth of 9 GHz by applying shunt peaking and filter termination at the input. The optical sensitivity of -17 dBm was measured at 10 Gb/s for a bit-error rate of 10^-12     

An auto-gain control transimpedance amplifier with low noise andwide input dynamic range for 10-Gb/s optical communication systems

This paper describes a 10-Gb/s transimpedance amplifier (TIA), fabricated in a 0.1-μm-p-HEMT technology. To improve the optical overload characteristics, an automatic gain control (AGC) circuit is included. The measured results show excellent performance, transimpedance of 63.3 dBΩ (1.46 kΩ), bandwidth of 8.0 GHz, and equivalent input noise current density of 6.5 pA/rtHz. When the bit error rate is 10^-9, the minimum sensitivity and the optical overload are -21.2 dBm, +4.3 dBm, respectively, using a 0.8 A/W pin photodiode (PD). The power dissipation is about 0.5 W from a single -5-V supply. The die area is 1.3×1.6 mm²     

Pseudomorphic 2DEG FET IC's for 10 Gb/s optical communicationsystems with external optical modulation

An optical modulator driver IC and a preamplifier IC for 10 Gb/s optical communication systems are developed using AlGaAs/InGaAs/GaAs pseudomorphic two-dimensional electron gas (2DEG) FETs with a gate length of 0.35 μm. The optical modulator driver IC operates at a data rate up to 10 Gb/s with an output voltage swing of more than 4 V_p-p . The bandwidth for the amplifier IC is 13.0 GHZ with ab 47 dB-Ω transimpedance gain. In addition, optical transmission experiments with external optical modulation using these ICs have successfully been carried out at 10 Gb/s     

Packaging technology for a 10-Gb/s photoreceiver module

We designed a 10-Gb/s photoreceiver module integrating a flip-chip avalanche photodiode (APD), a Si-preamplifier IC, and a slant-ended fiber (SEF). Flip-chip bonding minimizes parasitic reactances in the interconnect between the photodiode and the preamplifier IC. The optical coupling system consists of a slant-ended fiber and a microlens monolithically fabricated on the photodiode. This gives a flat IC-package assembly, which enables stripline interfaces to extract high-speed signals, increases misalignment tolerances, and lowers package height. Tolerances of over ±9 μm were obtained in every direction, which matched our theoretical predictions. To attach and hermetically seal the optical coupling, the fiber ferrule was directly laser-welded to the package wall with a double ring structure. The module withstood shock and vibration tests and had a 10-GHz bandwidth and -23-dBm minimum photosensitivity at 10 Gb/s     

Transimpedance optical preamplifier having a common-collector front end

A simple PIN photodiode-bipolar transistor (PIN-BJT), direct-coupled, transimpedance, optical preamplifier suitable for fabrication in monolithic IC form is described. The preamplifier basically consists of a common-collector, common-emitter configuration with shunt feedback. Measurements indicate that the receiver is capable of a sensitivity of ?35.8 dBm at 140 Mbit/s for an error rate of 10?9.     

SiGe HBT and BiCMOS technologies for optical transmission and wireless communication systems

Technologies for a self-aligned SiGe heterojunction bipolar transistor (HBT) and SiGe HBTs with CMOS transistors (SiGe BiCMOS) have been developed for use in optical transmission and wireless communication systems. n-Si cap/SiGe-base multilayer fabricated by selective epitaxial growth (SEG) was used to obtain both high-speed and low-power performance for the SiGe HBTs. The process except the SEG is almost completely compatible with well-established Si bipolar-CMOS technology, and the SiGe HBT and BiCMOS were fabricated on a 200-mm wafer line. High-quality passive elements, i.e., high-precision poly-Si resistors, a high-Q varactor, an MIM capacitor, and high-Q spiral inductors have also been developed to meet the demand for integration of the sophisticated functions. A cutoff frequency of 130 GHz, a maximum oscillation frequency of 180 GHz, and an ECL gate-delay time of 5.3 ps have been demonstrated for the SiGe HBTs. An IC chipset for 40-Gb/s optical-fiber links, a single-chip 10-Gb/s transceiver large-scale IC (LSI), a 5.8-GHz electronic toll collection transceiver IC, and other practical circuits have been implemented by applying the SiGe HBT or BiCMOS technique.     

A monolithic GaAs-on-Si receiver front end for optical interconnectsystems

The authors describe a monolithic technology for integrating GaAs with Si bipolar devices and demonstrate that such integration can provide improved system performance without degrading individual devices. The technology has been used to implement a 1-GHz GaAs/Si optical receiver with an equivalent input noise current density of less than 3 pA/√Hz for midband operation, and less than 4.5 pA/√Hz at 1 GHz. In this receiver an interdigitated GaAs metal-semiconductor-metal (MSM) photodetector is combined with a transimpedance preamplifier fabricated in silicon bipolar technology. The measured dark current of the GaAs/Si photodetector is 7 nA. The measured pulse response of an experimental integrated receiver is less than 550 ps FWHM. The integrated front end provides a wideband, low-noise optical receiver for use in local optical interconnections and demonstrates the successful application of integrated GaAs-on-Si technology to optoelectronics     

2．4Gb／s跨阻型光前置放大器CAD及验证

阐述了光纤通信前置放大器的设计原理，分析了光接收机中ＰＩＮ二极管和ＧａＡｓＦＥＴ器件的信号模型和噪声模型，提取了放大器用ＧａＡｓＦＥＴ器件的模型参数（包括大信号、小信号和噪声模型参数）。利用ＰＳＰＩＣＥ程序对光前置放大器进行了模拟分析和优化设计，并实际制作了用于２．４Ｇｂ／ｓ光纤通信的ＰＩＮ－ＨＥＭＴ前置放大器。实测结果表明放大器３ｄＢ带宽达到ＤＣ～４．４ＧＨｚ，增益为１８±１ｄＢ；加入ＰＩＮ二极管后的光接收模块的３ｄＢ带宽为ＤＣ～１．６８８ＧＨｚ，满足了２．４Ｇｂ／ｓ光纤通信的需要。     

10-Gb/s strained MQW DFB-LD transmitter module and superlattice APDreceiver module using GaAs MESFET IC's

This paper describes the design and performance of a 10-Gb/s laser diode (LD) transmitter and avalanche photodiode (APD) receiver, both of which are based on GaAs MESFET IC's. The LD transmitter consists of a strained MQW distributed-feedback LD and one chip LD driver IC. The module output power is +4.6 dBm at 10 Gb/s. The APD receiver consists of an InGaAsP/InAl/As superlattice-APD and an IC-preamplifier with the 10-Gb/s receiver sensitivity of -27.4 dBm. As for the LD transmitter, we discuss the optimum impedance-matching design from the viewpoint of high-speed interconnection between LD and driver IC's. As for the APD receiver, the key issue is input impedance design of preamplifier IC, considering noise and bandwidth characteristics. Total performance of the transmitter and receiver is verified by a 10-Gb/s transmission experiment and a penalty-free 10-Gb/s fiber-optic link over 80 km of conventional single-mode fiber is successfully achieved     

A variable transimpedance preamplifier for use in wide dynamic range optical receivers

A preamplifier with an automatic gain control (AGC) function based on a new circuit configuration suitable for monolithic integration is proposed as an approach for realizing optical receivers with wide dynamic ranges. This new preamplifier, intended for transmission systems operating above 100 Mb/s, is designed for fabrication using 3-/spl mu/m Si-bipolar IC technology. The fabricated IC exhibits a bandwidth of more than 220 MHz and an equivalent input noise current of about 3 pA//spl radic/Hz at a maximum transimpedance of 18 k/spl Omega/. To examine the AGC capability of the new preamplifier IC, a 140-Mb/s transmission experiment was carried out using a laser diode (LD) transmitter and a p-i-n receiver with its gain controlled by the new preamplifier. An optical dynamic range of 21.5 dB was achieved and thus it should be possible to realize optical receivers with wide dynamic ranges using this preamplifier.     

A 49-GHz preamplifier with a transimpedance gain of 52 dBΩusing InP HEMTs

This paper describes a new preamplifier IC with 0,15-μm gate InP-based high electron mobility transistors (HEMTs) for a high-speed fiber optic communication system. The preamplifier consists of a lumped-element transimpedance amplifier (TIA) for the input stage and a highly stabilized distributed amplifier with cascode-configured unit cells for the gain stage. A gain-peaking technique for a distributed amplifier was employed to enhance the bandwidth and gain flatness of the preamplifier. This gain peaking profile compensates for a lack of bandwidth of a TIA. As a result, we achieved a flat transimpedance gain of 52 dBΩ and a bandwidth of 49 GHz     

10 Gbit/s optical receiver module using plastic package

A novel optical receiver module using a plastic package, a glass V-groove substrate, an edge-illuminated refracting facet photodiode and a Si bipolar preamplifier IC has been developed. Its signal lines were designed using a three-dimensional electromagnetic field analysis. For a fabricated module, a frequency response of 7.7 GHz and a sensitivity of less than -14 dBm at 10 Gbit/s were achieved     

Modulator driver and photoreceiver for 20 Gb/s optic-fiber links

Two integrated circuits, a modulator driver and a photoreceiver integrating a metal-semiconductor-metal (MSM) photodetector, a differential transimpedance amplifier and two limiting amplifier stages for high-speed optical-fiber links are presented. The IC's were manufactured in a 0.2 μm gate-length AlGaAs-GaAs high-electron mobility transistor (HEMT) technology with a f_T of 60 GHz. The modulator driver IC operates up to 25 Gb/s with an output voltage swing of 3.3 V_p-p at each output. The 1.3-1.55 μm wavelength monolithically integrated photoreceiver optoelectronic integrated circuit (OEIC) has a bandwidth of 17 GHz with a high transimpedance gain of 12 kΩ. Eye diagrams are demonstrated at 20 Gb/s with an output voltage of 1 V_p.p     

A fully integrated 40-Gb/s clock and data recovery IC with 1:4DEMUX in SiGe technology

In this paper, a fully integrated 40-Gb/s clock and data recovery (CDR) IC with additional 1:4 demultiplexer (DEMUX) functionality is presented. The IC is implemented in a state-of-the-art production SiGe process. Its phase-locked-loop-based architecture with bang-bang-type phase detector (PD) provides maximum robustness. To the authors' best knowledge, it is the first 40-Gb/s CDR IC fabricated in a SiGe heterojunction bipolar technology (HBT). The measurement results demonstrate an input sensitivity of 42-mV single-ended data input swing at a bit-error rate (BER) of 10^-10. As demonstrated in optical transmission experiments with the IC embedded in a 40-Gb/s link, the CDR/DEMUX shows complete functionality as a single-chip-receiver IC. A BER of 10^-10 requires an optical signal-to-noise ratio of 23.3 dB     

Packaging technology for 40-Gb/s optical receiver module with anMU-connector interface

A compact 40-Gb/s optical receiver module with an MU-connector interface has been developed. Its packaging has three main technical features. (1) Coplanar waveguide (CPW) patterns of the waveguide photodiode (WG-PD) and of the preamplifier IC in the facing area of the flip-chip structure are optimized for impedance matching. (2) A film carrier is used to connect the preamplifier IC to an electrical coaxial connector for electrical signal output. (3) An MU-connector is used as the optical interface to reduce the module size. Optimum design enabled a module size of 14.0 mm wide, 40.4 mm long, and 9.65 mm high. Measurements showed a 3-dB down bandwidth of the optical/electrical response of at least 50 GHz and a clear open eye pattern for a 40-Gb/s nonreturn-to-zero (NRZ) signal input. This optical receiver module is suitable for large-capacity communication network systems     

Design and performance analysis of InP-based high-speed andhigh-sensitivity optoelectronic integrated receivers

A novel transimpedance optoelectronic receiver amplifier suitable for monolithic integration is proposed and analyzed by exploiting state-of-the-art high-speed MSM photodiodes and HBT's based on lattice-matched InGaAs-InAlAs heterostructures on InP substrates. The projected performance characteristics of this amplifier indicate a high transimpedance (≈3.6 kΩ), a large bandwidth (17 GHz), and an excellent optical detection sensitivity (-26.8 dBm) at 17 Gb/s for the standard bit-error-rate of 10^-9. The latter corresponds to an input noise spectral density, √(i_in²/B), of 2.29 pA/√(Hz) for the full bandwidth. The bandwidth of the amplifier can be increased to 30 GHz for a reduced transimpedance (0.82 kΩ) and a lower detection sensitivity, i.e., -21 dBm at 30 Gb/s. The amplifier also achieves a detected optical-to-electrical power gain of 21.5 dBm into a 50 Ω load termination. The design utilizes small emitter-area HBT's for the input cascoded-pair stage, followed by a two-step emitter-follower involving one small and one large emitter-area HBT's. The design strategy of using small emitter-area HBT's is matched by a low-capacitance novel series/parallel connected MSM photodiode. This combined approach has yielded this amplifier's combined high performance characteristics which exceed either achieved or projected performances of any receiver amplifier reported to-date. The paper also discusses the issues concerning IC implementation of the receiver, including the means of realizing a high-value feedback resistor