变温LPCVD沉积氮化硅薄膜的均匀性优化

以低压化学气相沉积(LPCVD)热壁立式炉为实验平台,由二氯硅烷和氨通过LPCVD工艺合成氮化硅薄膜,利用降温成膜提高氮化硅薄膜的膜厚均匀度.基于气体碰撞理论建立了氮化硅薄膜沉积速率与反应气体浓度的关系式.分析比较了LPCVD炉内不同升温速率沉积氮化硅薄膜的表面性能.发现在变温沉积阶段,选择合适的降温速率是实现薄膜沉积...     

Microwave sintering process model.

In order to simulate and optimize the microwave sintering of a silicon nitride and tungsten carbide/cobalt toolbits process, a microwave sintering process model has been built. A cylindrical sintering furnace was used containing a heat insulating layer, a susceptor layer, and an alumina tube containing the green toolbit parts between parallel, electrically conductive, graphite plates. Dielectric and absorption properties of the silicon nitride green parts, the tungsten carbide/cobalt green parts, and an oxidizable susceptor material were measured using perturbation and waveguide transmission methods. Microwave absorption data were measured over a temperature range from 20 degrees C to 800 degrees C. These data were then used in the microwave process model which assumed plane wave propagation along the radial direction and included the microwave reflection at each interface between the materials and the microwave absorption in the bulk materials. Heat transfer between the components inside the cylindrical sintering furnace was also included in the model. The simulated heating process data for both silicon nitride and tungsten carbide/cobalt samples closely follow the experimental data. By varying the physical parameters of the sintering furnace model, such as the thickness of the susceptor layer, the thickness of the allumina tube wall, the sample load volume and the graphite plate mass, the model data predicts their effects which are helpful in optimizing those parameters in the industrial sintering process.     

炉管制程工艺中的片数效应及其优化方案

随着半导体技术的发展,越来越多的立式炉管在200mm及300mm集成电路晶圆制造中被应用到。同时炉管制程中的片数效应随着集成电路芯片的集成度越来越高而被凸显出来。文章将以LPCVD氮化硅在0.16μm、64M堆叠式内存制造过程中的片数效应为例,阐述炉管制程工艺中的片数效应以及通过调整制程参数（温度、沉积时间）的方式予以解决的实例。文中通过调整炉管上中下的温度来补偿气体的分布不均匀,调整沉积时间来补偿不同片数的沉积速率的差异,两者结合并辅以基于片数的分片程式来解氮化硅电介质沉积的片数效应。同时以此为基础总结出炉管片数效应的解决方案。     

A methodology for optimizing a constant temperature polysilicondeposition process

A three-step approach to characterizing a low pressure chemical vapor deposition (LPCVD) constant temperature polysilicon process is discussed. This approach optimizes an LPCVD polysilicon process for both film uniformity and particles. The first step is to design and construct a constant deposition temperature polysilicon furnace to provide the best system performance possible in terms of particle generation and improved film uniformity. The second step is to characterize a process in this newly constructed furnace for both film uniformity and particles by using an experimental design that incorporated an L₁₈ orthogonal array. The hydrogen chloride preclean flow prior to deposition plays a key role in both defect generation and film uniformity. Both capacitance-voltage techniques and secondary ion mass spectrometry are used to understand this role. The third step is to verify the recommended setting from the experimental design by processing confirmation runs. Results from the confirmation runs in the optimally constructed polysilicon furnace show that particles can be reduced by up to 66% and film uniformity can be improved by 29% over the current production process     

Analysis of LPCVD process conditions for the deposition of low stress silicon nitride. Part I: preliminary LPCVD experiments

A wide range of process conditions were investigated to optimize conditions for the deposition of low stress silicon nitride films by low-pressure chemical vapor deposition. Experiments carried out in a standard, multi-wafer batch system generated films with an index of refraction ranging from about 2.04 to 2.82 and residual stress ranging from about 700 MPa tensile to –90 MPa compressive. The relationship between residual stress and index of refraction was characterized and results compared to those presented in the technical literature. Increase in the index of refraction beyond about 2.3 by means of increasing the gas flow did not reduce the residual stress appreciably but had a significant detrimental impact on the thickness uniformity and deposition rate. In contrast to results reported by other researchers, uniformity was not observed to increase with increasing DCS/NH₃ ratio in this study. Efforts to minimize thickness non-uniformity by suppressing deposition rate at the gas inlet region of the deposition system while increasing deposition rate at the rear were not successful. While increasing the temperature at the exhaust end of the system was intended to improve thickness non-uniformity, significant thickness and index of refraction uniformity was not realized. The reduction in deposition rate and corresponding increase in index of refraction at the exhaust end of the system indicated a variation in gas species from inlet to exhaust of the system. These experimental results revealed that the index of refraction decreased while the deposition rate decreased with increasing partial pressure of DCS. This suggests that the inhomogeneity observed within the repeatability runs is due to ammonia depletion along the length of the load.     

Effects of deposition temperature on the oxidation resistance andelectrical characteristics of silicon nitride

A study was made of the effects of deposition temperature on the oxidation resistance and electrical characteristics of silicon nitride. It was found that silicon nitride below a certain limit thickness has no oxidation resistance. This threshold falls as the deposition temperature is lowered. 3-nm-thick silicon nitride deposited at 600°C has sufficient oxidation resistance For wet oxidation at 850°C, while 5 nm film deposited at 750°C has no oxidation resistance. The electrical characteristics also improve as the deposition temperature is lowered. 6-nm-thick silicon nitride deposited at 600°C shows a TDDB lifetime that is about two orders longer than that of 6-nm-thick silicon nitride deposited at 700°C. It was also found that the silicon nitride transition layer which is deposited at the initial stage of deposition influences the oxidation resistance and electrical characteristics of thin silicon nitride. It was concluded that lowering the deposition temperature reduces the influence of the transition layer and improves the oxidation resistance and electrical characteristics of thin silicon nitride     

管式PECVD射频功率对氮化硅薄膜性能的影响

氮化硅薄膜作为传统的晶体硅太阳电池钝化减反膜,其性能的变化直接影响电池的转化效率。通过改变管式PECVD的射频功率,制备了不同膜厚和折射率的氮化硅薄膜,并分别进行了薄膜致密性以及硅片镀膜后少子寿命的测试。实验及测试结果表明,改变PECVD的射频功率对氮化硅薄膜的沉积速率及其薄膜的性能有重要影响。     

New applications of low temperature PECVD silicon nitride films for microelectronic device fabrication

Silicon nitride has been widely used in microelectronic device fabrication processes for encapsulation, surface passivation and isolation. In this paper we report new applications of plasma-enhanced chemical vapor deposition (PECVD) silicon nitride films that can be deposited at a temperature lower than the soft bake temperature of normal photoresists. Lift-off of the silicon nitride film was carried out using standard positive photoresist. GaAs MESFETs and InP MISFETs with self-aligned gates were successfully fabricated using this lift-off process of low temperature PECVD silicon nitride.     

Performance enhancement of multicrystalline silicon solar cells and modules using double‐layered SiNx:H antireflection coatings

Silicon nitride coating deposited by the plasma‐enhanced chemical vapor deposition method is the most widely used antireflection coating for crystalline silicon solar cells. In this work, we employed double‐layered silicon nitride coating consisting of a top layer with a lower refractive index and a bottom layer (contacting the silicon wafer) with a higher refractive index for multicrystalline silicon solar cells. An optimization procedure was presented for maximizing the photovoltaic performance of the encapsulated solar cells or modules. The dependence of their photovoltaic properties on the thickness of silicon nitride coatings was carefully analyzed. Desirable thicknesses of the individual silicon nitride layers for the double‐layered coatings were calculated. In order to get statistical conclusions, we fabricated a large number of multicrystalline silicon solar cells using the standard production line for both the double‐layered and single‐layered antireflection coating types. On the cell level, the double‐layered silicon nitride antireflection coating resulted in an increase of 0.21%, absolute for the average conversion efficiency, and 1.8 mV and 0.11 mA/cm² for the average open‐circuit voltage and short‐circuit current density, respectively. On the module level, the cell to module power transfer factor was analyzed, and it was demonstrated that the double‐layered silicon nitride antireflection coating provided a consistent enhancement in the photovoltaic performance for multicrystalline silicon solar cell modules than the single‐layered silicon nitride coating. Copyright © 2015 John Wiley & Sons, Ltd.     

A global model for rapid thermal processors

A simple model for the components that make up a rapid thermal processing system is given. These components are the furnace, the pyrometer used to measure temperature, and the control system that utilizes the pyrometer measurement to control the power to the lamps. The models for each of the components are integrated in a numerical code to give a computer simulation of the complete furnace operation. The simulation can be used to investigate the interaction of the furnace, temperature-sensing technique, and the control system. Therefore, the interplay of heat transfer (furnace) properties, optical (pyrometer) parameters, and control gains can be studied. The objective is to define variability in wafer temperature as process parameters change. The following three applications of the model are included: (1) a simulation of open-loop operation; (2) a simulation of the ramp up and subsequent operation with a step change in wafer optical properties; and (3) a simulation of the rapid thermal chemical vapor deposition of polysilicon on silicon oxide which demonstrates the applicability model for actual processes. A technique for correction of pyrometer output to improve temperature control is also presented     

Supervisory control of LPCVD silicon nitride

This paper presents a scheme for deposition time and temperature control of low pressure chemical vapor deposition silicon nitride off product wafers. A Kalman filter based estimation scheme is presented for deposition time control. Deposition temperature control is treated in additional detail, including the impact of sampling the furnace load. Furthermore, stability metrics are also derived capturing the allowable modeling error for ensuring closed-loop stability. This is important for enabling the same model to be used across multiple tools and processes. A two-step iterative scheme is presented for implementing a "batch as you go" controller. Finally, the controller is applied in high-volume production.     

Improvement in threshold voltage control by minimizing boronpenetration in a LV-GCMOS technology

Maintaining tight threshold voltage (V_T) control for a low-voltage CMOS process is critical due to the large impact of V_T on circuit performance at low power supply voltages. In this paper, PMOS V_T was shown to be sensitive to poly gate thickness and BF₂⁺ source/drain implant energy. This data helped identify boron penetration as a prime contributor to PMOS threshold voltage variation. SIMS measurements were used to investigate boron diffusion through the poly gate at various stages in the process flow. These SIMS profiles pointed to the low-temperature thermal cycle of the nitride spacer deposition as a key step which influenced the amount of boron penetration and thus the final device threshold voltage. Experimental evidence shows that the temperature gradient across the nitride spacer deposition furnace causes a variable amount of boron penetration resulting in a large variation in PMOS V_T. We adopted a process flow change which virtually eliminated boron penetration and significantly reduced the sensitivity of the devices to manufacturing variations. Threshold voltage variation was reduced by a factor of two     

采用DOE方法优化非晶硅溅射工艺

文中通过使用DOE实验设计方法对磁控溅射设备a-Si靶工艺特性进行能力研究,给出了该设备工艺随功率、压力、温度的设定条件下a-Si介质生长速率与均匀性的变化关系。结果表明,功率和压力是主要决定速率和均匀性的关键因素,基片温度从室温到300℃,a-Si淀积速率基本不变。降低工艺压力对改善均匀性最为明显;工艺温度和功率的降低虽也可以起到改善均匀性的作用,但效果不明显,且三者的变动同时会导致速率的变化,为今后的生产、开发应用提供了参考意见。     

大马士革铜阻挡氮化硅薄膜沉积工艺优化研究

在铜大马士革（Damascene）工艺中,为避免由于铜向FSG中扩散所致电迁移的问题,需要在铜表面沉积一层氮化硅作为隔离铜和随后的介电材料的直接接触,通常人们使用HDP—CVD来沉积该氮化硅层。但针对HDP—CVD沉积速率快和工艺设备成本高等问题,文中研究了一种优化了的PECVD氮化硅沉积工艺来取代HDP—CVD氮化硅工艺。优化主要包含硬件改进和工艺参数调整。硬件改进主要通过引入锥形阴极盘面代替传统的直通形阴极盘面,以实现气体分子的更有效电离。在工艺参数上从RF功率、SiH4流量等方面也有所调整。优化后形成的氮化硅薄膜与HDP—CVD氮化硅薄膜性能非常接近,完全符合大马士革工艺的要求。同时氮化硅薄膜的沉积速率也有明显提高,工艺成本随之降低。     

Model reduction for optimization of rapid thermal chemical vapordeposition systems

A model of a three-zone rapid thermal chemical vapor deposition (RTCVD) system is developed to study the effects of spatial wafer temperature patterns on polysilicon deposition uniformity. A sequence of simulated runs is performed, varying the lamp power profiles so that different wafer temperature modes are excited. The dominant spatial wafer thermal modes are extracted via proper orthogonal decomposition and subsequently used as a set of trial functions to represent both the wafer temperature and deposition thickness. A collocation formulation of Galerkin's method is used to discretize the original modeling equations, giving a low-order model which loses little of the original, high order model's fidelity. We make use of the excellent predictive capabilities of the reduced model to optimize power inputs to the lamp banks to achieve a desired polysilicon deposition thickness at the end of a run with minimal deposition spatial nonuniformity. Since the results illustrate that the optimization procedure benefits from the use of the reduced-order model, our future goal is to integrate the model reduction methodology into real-time and run-to-run control algorithms. While developed in the context of optimizing a specific RTP process, the model reduction techniques presented in this paper are applicable to other materials processing systems     

Manufacturing benefits of disilane as a precursor for polycrystalline silicon films for the advanced CMOS gate electrode

The polycrystalline silicon deposited by single-wafer rapid thermal chemical vapor deposition with both silane (SiH/sub 4/) and disilane (Si/sub 2/H/sub 6/) precursors have been characterized for across wafer uniformity, thickness repeatability, and basic material properties such as grain structure and surface topography. The results show that the disilane process greatly improves the manufacturability of the single-wafer polycrystalline silicon process. Specifically, a /spl sim/50% improvement in the thickness uniformity, /spl sim/25% improvement in surface roughness, and a significantly less sensitivity of the process to hardware have been achieved with similar particle performance. The grain structure of as-deposited and postimplant and anneal films have been compared by X-ray diffraction and transmission electron microscope. NMOS and PMOS capacitors have been fabricated with polycrystalline silicon using silane and disilane precursors. The grain structure and electrical parameters, such as gate leakage currents and gate capacitance, show no significant difference between these two precursors.     

氮化铝陶瓷烧结炉温度均匀性对烧结产品质量影响的研究

氮化铝陶瓷是近年来广受关注的一种新型陶瓷材料,是剧毒氧化铍的替代材料,其在高功率电子领域有着相当广泛的应用前景,但是氮化铝陶瓷是难烧结的非氧化物陶瓷,陶瓷的烧结对氮化铝陶瓷性能的影响非常大,尤其是在氮化铝陶瓷批量生产过程中,陶瓷烧结炉的温度不均匀,将导致陶瓷性能的巨大差异。简要介绍了氮化铝陶瓷烧结炉温度均匀性对烧结产品质量的影响。     

Bulk and surface passivation of silicon solar cells accomplished by silicon nitride deposited on industrial scale by microwave PECVD

Bulk and surface passivation by silicon nitride has become an indispensable element in industrial production of multicrystalline silicon (mc‐Si) solar cells. Microwave PECVD is a very effective method for high‐throughput deposition of silicon nitride layers with the required properties for bulk and surface passivation. In this paper an analysis is presented of the relation between deposition parameters of microwave PECVD and material properties of silicon nitride. By tuning the process conditions (substrate temperature, gas flows, working pressure) we have been able to fabricate silicon nitride layers which fulfill almost ideally the four major requirements for mc‐Si solar cells: (1) good anti‐reflection coating (refractive index tunable between 2·0 and 2·3); (2) good surface passivation on p‐type FZ wafers (S_eff<30 cm/s); (3) good bulk passivation (improvement of IQE at 1000 nm by 30% after short thermal anneal); (4) long‐term stability (no observable degradation after several years of exposure to sunlight). By implementing this silicon nitride deposition in an inline production process of mc‐Si solar cells we have been able to produce cells with an efficiency of 16·5%. Finally, we established that the continuous deposition process could be maintained for at least 20 h without interruption for maintenance. On this timescale we did not observe any significant changes in layer properties or cell properties. This shows the robustness of microwave PECVD for industrial production. Copyright © 2005 John Wiley & Sons, Ltd.     

Modeling the growth of PECVD silicon nitride films for solar cellapplications using neural networks

Silicon nitride films grown by plasma-enhanced chemical vapor deposition (PECVD) are useful for a variety of applications, including anti-reflection coatings in solar cells, passivation layers, dielectric layers in metal/insulator structures, and diffusion masks, PECVD nitride films are known to contain hydrogen, and defect passivation by hydrogenation enhances efficiency in polycrystalline silicon solar cells. PECVD systems are controlled by many operating variables, including RF power, pressure, gas flow rate, reactant composition, and substrate temperature. The wide variety of processing conditions, as well as the complex nature of particle dynamics within a plasma, makes tailoring Si₃N₄ film properties very challenging, since it is difficult to determine the exact relationship between desired film properties and controllable deposition conditions. In this study, silicon nitride PECVD modeling using neural networks has been investigated. The deposition of Si₃N₄ was characterized via a central composite experimental design, and data from this experiment was used to train optimized feed-forward neural networks using the back-propagation algorithm. From these neural process models, the effect of deposition conditions on film properties has been studied. It was found that the process parameters critical to increasing hydrogenation and therefore enhancing carrier lifetime in polysilicon solar cells are temperature, silane, and ammonia flow rate. The deposition experiments were carried out in a Plasma Therm 700 series PECVD system     

Optimization of saturation current density of PECVD SiN coated phosphorus diffused emitters using neural network modeling

Emitter surface passivation by low temperature plasma enhanced chemical vapor deposition (PECVD) silicon nitride is investigated and optimized in this paper. We have found that the saturation current density of a 90±10 μ/sq phosphorus diffused emitter with N_s ≈3 x 10¹⁹ and X_j ≈0.3 μm can be lowered by a factor of eight by appropriate PECVD silicon nitride deposition and photoassisted anneal. PECVD silicon nitride deposition alone reduces the emitter saturation density (J_oe) by about a factor of two to three, and a subsequent photoanneal at temperatures ≥350°C reduces J_oe by another factor of three. In spite of the larger flat band shift for direct PECVD silicon nitride coating, the silicon nitride induced surface passivation is found to be about a factor of two inferior to the thermal oxide plus PECVD silicon nitride passivation due to higher interface state density at the SiN/SiO₂ interface compared to SiO₂/Si interface. A combination of statistical experimental design and neural network modeling is used to show quantitatively that lower radio frequency power, higher substrate temperature, and higher reactor pressure during the PECVD deposition can reduce the J_oe of the silicon nitride coated emitter.