CCITT work in teletraffic engineering

The advantages and drawbacks of standardization in TTE (teletraffic engineering) are examined. It is pointed out that the TTE recommendations of CCITT are intended to be international standards. Unlike signaling systems, interfaces, or protocols, the necessity for standardization in this area is not self-evident. However, standardization of grade of service (GOS) definitions, values, and relevant reference conditions seems to be necessary. Support for engineering methods also offers advantages. TTE-related activities in different CCITT study groups try to satisfy many often contradictory demands. Trends in telecommunications strongly support the view that concentration of TTE studies in CCITT would be desirable     

On teletraffic applications to OBS

We provide teletraffic models for loss probability evaluation of optical burst switching (OBS). We show that the popular Engset formula is not exact for OBS modeling and demonstrate that in certain cases it is not appropriate. A new exact model is provided. The various models are compared using numerical results for various OBS alternatives with and without burst segmentation.     

Transient thermal analysis of an ACF package assembly process

Transient thermal simulation was performed to analyze thermal response of the assembly process for a package using anisotropic conductive film (ACF). The main purpose of the study is to simulate the actual assembly and manufacturing process, in order to provide a first-hand approximation and insight of the thermal behavior of the package and ACF film during the process. Two assembly processes were modeled: a simplified process where the package was fixed at two different temperatures during assembly, and a detailed process where the package experienced a ramping heating process, followed by a constant temperature curing process. A full convection-conduction case was conducted first. The results indicate a weak hydrodynamic field and radiation effects, hence for computational purposes (reduced CPU time), it was decided to model the process using a conduction-only investigation. Results from the detailed process modeling indicated that during the initial ramping, within 0.02 s, the die and nozzle head experienced a small temperature drop due to the cooling effect of the ACF material and substrate. The ACF material also displayed a steep increase in temperature after contacting the die, followed by a short decay, then ramped up again. At the end of the 10-s ramping process, the ACF reached a temperature of almost 203°C, while the die was at 206°C. During the 5 s of curing, all parts reached steady state in less than 2 s     

The teletraffic analysis of the multi-server loss model with renewal distributions

This paper presents a loss model in which a general renewal arrival stream is served by any number of general renewal servers, i.e., theGI/GI/s/s model. Using linear algebraic queueing theory (LAQT), we provide the exact steady-state solution of the number of customers in theGI/GI/s/s model at general, arrival, and departure times. We show that the steady-state solution at arrival times can be used to approximate those at general times and that the third moment of the arrival process significantly affects this approximation. Finally, we show that a conjectured inequality does not hold.This work was performed while at the University of Missouri-Kansas City.     

Process and design analysis for ultrafine-pitched wiresweep elimination in advanced copper heat spreader BGA package

The semiconductor device trend for increasing functionalities and performances yet with smaller overall feature sizes presents escalating obstacles to the decreasing form factor along with demanding thermal carrying capability required at the package level. To confront this compounding issue, ultrafine-pitch wirebond interconnect coupled with thermally enhanced copper heat spreader attached to the package are introduced. However, the additional copper heat spreader thickness introduced within the package challenges the design of the package's wire, its loop height, and the molding process control to prevent wire sweeping occurrences. This study investigates the impact of different ultrafine pitched wire types, wire loop designs, copper heat spreader structures, and mold material types on eliminating device short from occurring due to the wire sweeping phenomena. A full factorial experiment is performed using an active silicon device packaged in a thermally enhanced ball grid array (BGA) test vehicle. In addition, test characterization is carried out using x-ray and multiinsertions hot/cold continuity tests. Then, a detailed failure analysis is performed by package decapsulation and scanning electron microscopy/energy-dispersive x-ray (SEM/EDX) to confirm the experimental findings. In conclusion, the study finds that for an ultrafine-pitched thermally enhanced BGA package, wire type is insignificant to reduce wire shorting occurrences. However, mold material and copper heat spreader structure using an optimized wire loop design are significant factors in eliminating wiresweep shorting phenomena. This study concludes with a wirebond interconnect and heat slug design recommended along with an improved process parameters and assembly material sets found from the experiment.     

On the teletraffic capacity of CDMA cellular networks

The aim of this paper is to contribute to the understanding of the teletraffic behavior of code-division multiple-access (CDMA) cellular networks. In particular, we examine a technique to assess the reverse link traffic capacity and its sensitivity to various propagation and system parameters. We begin by discussing methods of characterizing interference from other users in the network. These methods are extremely important in the development of the traffic models. We begin with a review of several existing approaches to the problem of handling other-cell interference before presenting a novel characterization of the interference in the form of an analytic expression for the interference distribution function in the deterministic propagation environment. We then look at extending the capacity analyses that assume a fixed and equal number of users in every cell to handle the random nature of call arrivals and departures. The simplest way to do this is by modeling each cell of the network as an independent M/G/x∞ queue. This allows us to replace the deterministic number of users in each cell by an independent Poisson random variable for each cell. The resulting compound Poisson sums have some very nice properties that allow us to calculate an outage probability by analyzing a single random sum. This leads to a very efficient technique for assessing the reverse link traffic capacity of CDMA cellular networks     

Modal analysis of board-level electronic package

The reliability of board-level electronic package subjected to drop impact is one of the most concerned issues. After drop impact, the Printed Circuit Board (PCB) experiences free vibration which leads to the deformation of PCB, hence the failure of solder joints. The free vibration is dependent on the inherent parameters of PCB. So it is necessary to study the inherent parameters of board-level package. Modal analysis is a common way to characterize the inherent dynamic parameters of a system. By modal analysis, we can understand the inherent vibration features of board-level package system. In this paper, the theoretical vibration model of the JEDEC standard PCB assembled with three Chip Size Packages (CSPs) is performed. Then the results of theoretical analysis are validated by that of finite element analysis (FEA) and modal test. A series of modal parameters are obtained during the modal analysis such as the mode shapes, the natural frequencies and the damping ratios. These parameters are useful for studying the dynamic response of PCB and the strain rate of solder joints during drop test. The Modal Assurance Criterion (MAC) value is used to validate the correlation between two modal shapes obtained from two different modal parameters estimation methods during modal analysis. The MAC value is computed for the first two order mode shapes, indicating the high correlation between the experimental and predicted (including theoretical and FE results) mode shapes.     

Experimental power cycling on insulated TRIAC package: Reliability interpretation thanks to an innovative failure analysis flow

This paper presents the insulated TO-220AB TRIAC package aging when these devices are subjected to experimental power cycling test with various case temperature swings (ΔT_case). This study includes reliability tests set-up, results and failure analysis. An innovative failure analysis flow is proposed to identify the failure mechanism implied. This new failure analysis process flow is necessary due to the complex stack of these devices. Finally, thanks to the reliability tests and the complete failure analysis results, the thermal resistance (R_th) change is correlated to the physical defect modification. This whole study gives the first data collection that is required to propose a lifetime prediction model for insulated TO-220AB TRIAC package during power cycling accelerated aging tests.     

基于新型DCA封装的陶瓷风速风向传感器

An advanced direct chip attaching packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct chip attaching （DCA） packaging is adopted and this new packaged method simplifies the processes of packaging further. Simulations of the advanced DCA packaged sensor based on computational fluid dynamics （CFD） model show the sensor can detect wind speed and direction effectively. The wind tunnel testing results show the advanced DCA packaged sensor can detect the wind direction from 0° to 360° and wind speed from 0 to 20 m/s with the error less than 0.5 m/s. The nonlinear fitting based least square method in Matlab is used to analyze the performance of the sensor.     

Ceramic thermal wind sensor based on advanced direct chip attach package

An advanced direct chip attach packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct chip attach (DCA) packaging is adopted and this new packaged method simplifies the processes of packaging further. Simulations of the advanced DCA packaged sensor based on computational fluid dynamics (CFD) model show the sensor can detect wind speed and direction effectively. The wind tunnel testing results show the advanced DCA packaged sensor can detect the wind direction from 0° to 360° and wind speed from 0 to 20 m/s with the error less than 0.5 m/s. The nonlinear fitting based least square method in Matlab is used to analyze the performance of the sensor.     

The role of teletraffic modeling in the new communicationsparadigms

Teletraffic engineers provide models allowing communications networks to be planned and systems to be designed to meet the performance needs of users within a reasonable cost. The successful modeler combines analytical or simulation skills with a deep understanding of the technology. In the emerging information networking environment comprising new technologies such as ATM, Internet, wireless, etc., and new services such as video, multimedia, data and personal communications services, the old paradigms of circuit-switched calls and Erlang distributions have been severely challenged. The confluence of the shifts in technologies and services along with the convergence of computing, telecommunications, consumer electronics, and electronic media industries, and the shift from a monopolistic to competitive business paradigm, has created a tremendously rich lode of fundamental problems that need to be addressed by teletraffic engineers. In this article the author describes the historical role of the teletraffic engineer, reviews several of the major paradigm shifts, and discusses some of the challenges facing the teletraffic community with an emphasis on modeling wireless communications systems     

Adaptive algorithm for variable teletraffic demand in highway microcells

An adaptive algorithm is presented which ensures that the probability of a mobile radio call in progress being forced to terminate during handover in highway microcells is always small, even in the presence of high new call request rates.<>     

Thermal analysis of a multi-chip package design

Two-dimensional finite difference computer simulations were used for thermal analysis of an advanced multi-chip package design. In order to model high performance VLSI and ULSI applications, power dissipations ranging from 10 to 40 W/cm² on each chip and zero to 5 W/cm² on the substrate were simulated. It was found that heating due to resistive losses in the thin film interconnections between chips can impact package thermal performance. The calculated device-to-water thermal resistance was 0.4° C/W and the worst case chip-to-chip temperature variation was less than 22° C. This excellent thermal performance illustrates the effectiveness of the package’s water cooled heat sink with direct backside contact to each die. Methods to improve thermal performance are discussed.     

Multichip package delamination and die fracture analysis

Multichip mechatronic power packages have been developed in Motorola for automotive applications. Copper heat sink based metal substrates were used to improve thermal and electrical performance. In the early stage of development, mold delamination and die cracking have been observed after assembly. With some mold compound materials, die backside have large delaminated areas, while with other mold compound, delamination stops early but die cracks. Finite element analysis, incorporated with interface fracture mechanics method, has been conducted to understand these phenomena. Impact of mold material properties and package geometry on post-assembly delamination has been evaluated. Good agreements have been obtained between experimental data and the simulation results. The phenomenon of crack branching into the die was also studied. Finite element simulation can be used to predict whether and when the crack at the interface will turn and crack the die. With a thorough understanding of the failure mechanism, both mold delamination and die cracks have been eliminated in the final package development.     

PBGA封装热可靠性分析

对PBGA封装体建立了有限元数值模拟分析模型。模型采用无铅焊点,完全焊点阵列形式。研究了封装体在经历IPC9701标准下的五种不同温度循环加载后,受到的热应力、应变,以及可能的失效形式。结果表明,焊点是封装体结构失效的关键环节,焊点所受应力大小与焊点位置有关。比较了不同温度循环下封装体的疲劳寿命。其结果为提高封装体的可靠性和优化设计提供了理论依据。     

Crolles2联盟成员联合开发先进的CMOS晶圆检测和装配

Crolles2联盟成员飞思卡尔半导体飞利浦和意法半导体,将其半导体合作范围由现有的亚100nm　CMOS 工艺技术的开发扩展至晶圆测试和封装研发域。 联盟成员代表在联合声明中表示“飞思卡尔半导体、意法半导体和飞利浦所拥有的专业技术将帮助Crolles2联打造业界领先的封装和测试基地。根据此协议,三方将联合开发未来支持汽车消费、工业、网络和无线市场应用的半导体技术。” 该协议反映了采用 300mm 生产的90nm、65nm 及更小晶圆 CMOS 器件对晶圆测试和封装的特殊需求,也将涵盖所有晶圆的后制造工艺,如探针检测、磨、切割、贴片、焊线、flip…     

Worst-case fraction of CBR teletraffic unpunctual due tostatistical multiplexing

This paper quantitatively analyzes the queueing delay of the constant-bit-rate (CBR) traffic in a multiplexer, where the CBR traffic is mixed with the traffic of another session (interfering traffic) that has throughput and burstiness constraints. This paper focuses as a quality-of-service (QoS) measure on the fraction of the CBR traffic that fails to meet a certain delay requirement. Results include the worst-case QoS of CBR traffic as a function of the throughput and burstiness parameters imposed on the interfering traffic. Results of this paper can be applied to traffic management and call processing of asynchronous transfer mode (ATM) networks     

Multi-LED package design, fabrication and thermal analysis

An ultra-thin multi-LED package is designed,manufactured and its thermal performance is characterized. The objective of this study is to develop an efficient thermal modelling approach for this system which can be used for optimization of the thermal-performance of future ultra-thin designs.A high-resolution thermal imaging camera and thermocouples were used to measure the temperature distribution of the multi-LED package and the LED-die temperature for different operating powers.Finally,we compare the thermal measurements with the finite element simulation results.It is concluded that the modelling approach can assist in the thermal optimization of future multi-LED package designs.     

Parametric reliability analysis of no-underfill flip chip package

This research proposes a parametric analysis for a flip chip package with a constraint-layer structure. Previous research has shown that flip-chip type packages with organic substrates require underfill for achieving adequate reliability life. Although underfill encapsulant is needed to improve the reliability of flip chip solder joint interconnects, it will also increase the difficulty of reworkability, increase the packaging cost and decrease the manufacturing throughput. This research is based on the fact that if the thermal mismatch between the silicon die and the organic substrate could be minimized, then the reliability of the solder joint could be accordingly enhanced. This research proposes a structure using a ceramic-like material with CTE close to silicon, mounted on the backside of the substrate to constrain the thermal expansion of the organic substrate. The ceramic-like material could reduce the thermal mismatch between silicon die and substrate, thereby enhancing the reliability life of the solder joint. Furthermore, in order to achieve better reliability design of this flip chip package, a parametric analysis using finite element analysis is performed for package design. The design parameters of the flip chip package include die size, substrate size/material, and constraint-layer size/material, etc. The results show that this constraint-layer structure could make the solder joints of the package achieve the same range of reliability as the conventional underfill material. More importantly, the flip chip package without underfill material could easily solve the reworkability problem, enhance the thermal dissipation capability and also improve the manufacturing throughput