椭圆曲线密码体制中快速标量乘算法实现

椭圆曲线密码(ECC),是一种以椭圆曲线离散对数问题为出发点而制定出的各种公钥密码体制,在1985年由学者Koblitz和Miller两人分别独立提出。ECC的主要特征是采用有限域上的椭圆曲线有限点群而非是传统的基于离散对数问题密码体制中所采用的有限循环群。因为标量乘算法是ECC中最耗时同时也是最为重要的算法,因为其运算效率的高低将直接影响到ECC实现的效率。本篇论文即是研究椭圆曲线密码中的标量乘法,以期能够探寻出一种快速安全的标量乘算法。     

基于边信道原子的椭圆曲线标量乘算法

提出了一种能够抵抗简单能量分析攻击的边信道原子结构,减少了椭圆曲线密码体制中标量乘的倍点和点加运算次数,从而节省了运算时间,最后通过调用Crypto++库函数,对于NIST提供的160 bit素域上椭圆曲线编程实现算法,发现此算法的效率比Montgomery Ladder算法提高了37.6%。     

一种基于折半运算的Comb标量乘算法

通过将折半运算应用于Comb算法,提出了一种新的Comb标量乘算法,它可以提高域Fm2上的椭圆曲线标量乘法的效率.在预计算阶段和赋值阶段,新算法分别用高效的折半运算取代倍点运算.对新算法运行时间进行分析,并与传统的Comb算法进行比较,当窗口宽度w=4时,新算法效率提高58%~63%.     

面向多曲线的通用高性能ECC处理器设计

该文针对广泛应用的TLS1.3协议，提出了一种高性能的椭圆曲线密码处理器.该处理器支持TLS1.3协议中定义的两类素数域椭圆曲线的通用模数.通过对高基蒙哥马利算法的改进，提出了一种支持521 bit及以下位宽的模乘运算单元，并提出了一种双模乘单元并行结构的标量乘法器.基于该结构在两类椭圆曲线下设计了雅阁比坐标系下并行的点运算时序排布，使模乘单元的利用率在不同点运算情况下达到100%,95.4%和86.5%.与现有设计相比，本文中标量乘法运算消耗的周期更少，运算单元利用率更高，在相似的时间面积乘积前提下，具有更强的通用性和可配置性的优势.在TSMC 55 nm CMOS工艺下达到454 MHz的时钟频率，等效逻辑门数851k,Secp256r1曲线的标量乘运算速度为31 230 times/s.     

特征3有限域上椭圆曲线的Montgomery算法

研究了Montgomery算法在特征3有限域上椭圆曲线的应用.根据Montgomery算法的结构,省去y坐标的计算,提出新的点加和倍点计算公式,加快点乘计算速度.经过理论分析和实验验证,提出的点加和倍点计算公式可节省约15%的运算时间.     

抗SPA攻击的Twisted Edwards曲线标量乘法实现

椭圆曲线密码（Elliptic Curve Cryptography,ECC）是一种非对称密码，在信息安全领域中扮演着越来越重要的角色。目前对椭圆曲线密码的研究大多针对Weierstrass曲线，对于Twisted Edwards曲线的研究较少。针对Twisted Edwards曲线上标量乘法的效率及安全性，将Twisted Edwards曲线转换为Montgomery曲线，并采用Montgomery标量乘法在每次循环中都固定进行点加和倍点计算，从而能够抵抗简单能量攻击（Simple Power Analysis,SPA）。最后在复旦微电子公司型号为JFM7K325T的现场可编程门阵列（Field Programmable Gate Array,FPGA）中进行了实现和测试。结果表明，该方法能达到较理想的效果。     

基于MPI双处理器ECC标量乘算法的并行化研究

本文借鉴串行范畴内椭圆曲线密码体制中原有的二进制标量乘算法,从并行计算的角度提高ECC中标量乘运算的效率、进而提高ECC的整体性能。本文设计了基于MPI双处理器标量乘算法并行执行模型。通过分析ECC中的二进制标量乘算法和并行的2r标量乘算法,分别给出了相应的改进标量乘算法设计与实现,改进算法有效地提高了标量乘运算的效率。     

抗SPA攻击的椭圆曲线NAF标量乘实现算法

针对椭圆曲线非相邻形式（NAF）标量乘法不能很好地抵抗简单功耗分析攻击（SPA）的问题,对NAF标量乘的实现算法以及对NAF标量乘的SPA攻击原理进行了分析,提出一种新的标量乘实现算法——平衡能量NAF标量乘法。通过对智能卡功耗分析平台的实测波形进行分析验证,平衡能量NAF标量乘法不仅继承了NAF标量乘法运算效率高的优点,而且能够很好地抵抗SPA攻击,提高密码芯片的安全性。     

一种Montgomery型椭圆曲线的高效标量乘算法

椭圆曲线标量乘法是椭圆曲线密码系统的基本运算,安全高效的标量乘法将直接提高椭圆曲线密码系统的效率和安全性.本文将Fibonacei数列的概念进行了扩展,提出了Fibonacci型数列的概念,并用Fibonaeei型数列将Montgomery型曲线上点的加法运算公式进行了简化,得到了新的点加公式fibAdd.利用黄金比率...     

一类超椭圆曲线上的快速除子标量乘

 除子标量乘是超椭圆曲线密码体制中的关键运算.基于单除子标量乘的思想,将Duursma与Sakurai给出的关于奇素数域上一类特殊超椭圆曲线上的一个除子标量乘算法推广到奇素数域扩域上更一般的此类超椭圆曲线上,得到了两个效率更高的公式化的除子标量乘新算法.这两算法所需的运算量比二元法降低12%以上.     

一种基于边信道原子的快速标量乘算法

Simple power analysis is the most devastating attack on the security of elliptic curve scalar multiplication and can probably retrieve the secret key. In this paper, we analyze the formulas of point doubling and addition on Jacobi-quartic Curve in projective coordination. In addition, a fast and secure side-channel atomic scalar multiplication algorithm is proposed using the side-channel atomic block. Compared with the previous methods, the new algorithm is more efficient. For 192 bits scalar using NAF recoding, the efficiency of the new algorithm is increased by about 6.7%~23% if S/M=0.8 or 12.7%~33.2% if S/M=0.6.     

可重构点乘运算的FPGA设计

文章在深入分析ECC点乘运算的FPGA实现的基础上,提出了一种参数可重构的、基于正规基有限域运算的ECC点乘运算结构。该点乘运算结构采用了复用、并行化等措施,在FPGA上实现了GF（2^191）的ECC点乘运算。在Altera FPGA上的仿真结果表明：在50Mhz时钟下,一次点乘运算只需413．28us。     

Fast Reconfigurable Elliptic Curve Cryptography Acceleration for <Emphasis Type="Italic">GF</Emphasis>(2<Superscript><Emphasis Type="Italic">m</Emphasis></Superscript>) on 32 bit Processors

This paper focuses on the design and implementation of a fast reconfigurable method for elliptic curve cryptography acceleration in GF(2 ^m ). The main contribution of this paper is comparing different reconfigurable modular multiplication methods and modular reduction methods for software implementation on Intel IA-32 processors, optimizing point arithmetic to reduce the number of expensive reduction operations through a novel reduction sharing technique, and measuring performance for scalar point multiplication in GF(2 ^m ) on Intel IA-32 processors. This paper determined that systematic reduction is best for fields defined with trinomials or pentanomials; however, for fields defined with reduction polynomials with large Hamming weight Barrett reduction is best. In GF(2⁵⁷¹) for Intel P4 2.8 GHz processor, long multiplication with systematic reduction was 2.18 and 2.26 times faster than long multiplication with Barrett or Montgomery reduction. This paper determined that Montgomery Invariant scalar point multiplication with Systematic reduction in Projective coordinates was the fastest method for single scalar point multiplication for the NIST fields from GF(2¹⁶³) to GF(2⁵⁷¹). For single scalar point multiplication on a reconfigurable elliptic curve cryptography accelerator, we were able to achieve ∼6.1 times speedup using reconfigurable reduction methods with long multiplication, Montgomery’s MSB Invariant method in projective coordinates, and systematic reduction. Further extensions were made to implement fast reconfigurable elliptic curve cryptography for repeated scalar point multiplication on the same base point. We also show that for L > 20 the LSB invariant method combined with affine doubling precomputation outperforms the LSB invariant method combined with López-Dahab doubling precomputation for all reconfigurable reduction polynomial techniques in GF(2⁵⁷¹) for Intel IA-32 processors. For L = 1000, the LSB invariant scalar point multiplication method was 13.78 to 34.32% faster than using the fastest Montgomery Invariant scalar point multiplication method on Intel IA-32 processors.     

基于双基表示的并列点乘算法

 双基表示是一种整数表示法,它将任意整数表示成2和3的混合幂次的和或差的形式,并列点乘是一种快速的点乘算法,应用于一些椭圆曲线密码体制中.本文在现有的双基表示算法以及并列点乘算法的基础上,提出了新的双基表示算法以及基于该双基表示算法的并列点乘算法,该算法利用了一些特殊点的快速计算公式,从而有效地提高了并列点乘算法的执行效率.实验表明,在密钥长度为160比特,[S]/ =0.8时,当 /[M]=30,新算法的效率比基于JSF表示的并列点乘算法提高了22%;当 /[M]=10,新算法比JSF表示提高了6%;当 /[M]=8,新算法比JSF表示提高了3%.     

高性能可扩展公钥密码协处理器研究与设计

 本文提出了一种高效的点乘调度策略和改进的双域高基Montgomery模乘算法,在此基础上设计了一种新型高性能可扩展公钥密码协处理器体系结构,并采用0.18μm 1P6M标准CMOS工艺实现了该协处理器,以支持RSA和ECC等公钥密码算法的计算加速.该协处理器通过扩展片上高速存储器和使用以基数为处理字长的方法,具有良好的可扩展性和较强的灵活性,支持2048位以内任意大数模幂运算以及576位以内双域任意椭圆曲线标量乘法运算.芯片测试结果表明其具有很好的加速性能,完成一次1024位模幂运算仅需197μs、GF(p)域192位标量乘法运算仅需225μs、GF(2^m)域163位标量乘法运算仅需200.7μs.     

Pseudo 4D projective coordinate-based multi-base scalar multiplication

In order to address the problem of elliptic curve cryptosystem (ECC) for the expensive cost in scalar multiplication and the vulnerability to the power analysis attacks,a pseudo 4D projective coordinate-based multi-base scalar multiplication was proposed to optimize group operation layer and scalar multiplication operation layer,which aimed at increasing the performance of ECC and resisting common power analysis attacks.Experimental results show that compared with the state-of-the-art algorithms,the proposed algorithm decreases 5.71% of point doubling cost,3.17% of point tripling cost,and 8.74% of point quintupling cost under discrete group operations.When the key length is 160 bit,the proposed algorithm decreases 36.32% of point tripling cost,17.42% of point quintupling cost,and 8.70% of the system cost under continuous group operations.The analyzing of power consumption wave shows that the proposed algorithm can resist SPA and DPA attack.     

任意角度单杆天线感应电动势的矢量研究

将天线长度看作矢量,运用电场强度矢量与天线长度矢量之间的点乘,计算单杆天线的感应电动势。通过建立空间坐标系,将电场强度矢量与天线长度矢量进行分解,再运用矢量点乘规则,得到天线上的感应电动势。理论公式推导表明,将天线长度看作标量计算得到的单杆天线的感应电动势的结果,与将天线长度看作矢量计算得到的单杆天线的感应电动势的结果是一样的。因此,将天线长度看作矢量,运用矢量点乘规则来计算感应电动势的方法是可行的。     

Design of highly efficient elliptic curve crypto-processor with two multiplications over GF（2^163）

In this article, a parallel hardware processor is presented to compute elliptic curve scalar multiplication in polynomial basis representation. The processor is applicable to the operations of scalar multiplication by using a modular arithmetic logic unit (MALU). The MALU consists of two multiplications, one addition, and one squaring. The two multiplications and the addition or squaring can be computed in parallel. The whole computations of scalar multiplication over GF(2163) can be performed in 3 064 cycles. The simulation results based on Xilinx Virtex2 XC2V6000 FPGAs show that the proposed design can compute random GF(2163) elliptic curve scalar multiplication operations in 31.17 μs, and the resource occupies 3 994 registers and 15 527 LUTs, which indicates that the crypto-processor is suitable for high-performance application.